JPH10307932A - Plotting device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To optionally set a rewriting cycle for each plotting object on a screen and also to freely select a constitution in response to the character of the plotting data by distributing the plotting data to the graphic generators for each plotting object and performing a hidden surface removal process to output the pixel data on a plotting image through the comparison of Z value of output of the plotting data. SOLUTION: The plotting data are distributed to (n) stages of graphic generators 1a to 1n for each plotting object based on a plotting cycle. The Z value of outputs of generators 1a to 1n are successively compared with each other by the Z comparators 2a to 2n. That is, the output Z value of the generator 1a is compared with that of the generator 1b by the comparator 2a, and the hidden surface removal processes are carried out in sequence. Then the pixel data on a whole single image are produced, converted into the analog data by a D/A converter 3 and displayed on a CRT 4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a drawing apparatus for drawing an image on a CRT under the control of a CPU, and more particularly to a drawing apparatus for drawing at different drawing speeds for each drawing object on a screen.

[0002]

2. Description of the Related Art As this type of drawing apparatus used for games, amusement machines, simulators and the like, a graphic generator is conventionally known. FIG. 2 is a block diagram illustrating an example of the graphic generator. In FIG. 2, 3 is a D / A converter, 4 is a CRT, 7 is a command manager, 8 is a geometry processor, 9 is a rendering processor, 11 is a frame buffer,
100 denotes a CPU bus and 101 to 103 denote internal buses.

Next, the operation will be described. The graphic generator shown in FIG. 2 includes a plurality of stages of a geometry processor 8, a rendering processor 9, and a frame buffer 11 having a double buffer structure in order to enable high-speed drawing. Under the control, drawing data sent from a recording medium or the like (not shown) via the CPU bus 100 is sorted by the command manager 7 into data according to the number of the geometry processors 8, and is sent via the internal bus 101. The drawing data distributed to the geometry processor 8 is sent to the rendering processor 9 via the internal bus 102 to perform geometric conversion, and the image is stored in the frame buffer 11 as pixel data. The pixel data on the frame buffer 11 is sent to the D / A converter 3 via the internal bus 103 and is converted into analog data.
Displayed on CRT4.

The graphic generator shown in FIG. 2 includes a plurality of combinations of a geometry processor 8, a rendering processor 9, and a frame buffer 11 for performing high-speed drawing, and performs distributed processing in the same cycle by an internal bus. That is, each graphic generator is responsible for a plurality of pixels on one screen,
In one cycle, the entire screen is rewritten and updated.

[0005]

A drawing apparatus using the above-described graphic generator is configured to perform distributed processing in order to perform high-speed drawing. However, since rewriting is performed in the same cycle, the drawing target Different drawing speeds (rewriting speeds) cannot be drawn. For example, when drawing an image in which a plane is moving at high speed in a stationary background, it is necessary to adjust the drawing cycle to the drawing speed of the fast-moving airplane. Since rewriting is repeated, one cycle of drawing is performed with a small amount of data.
The resolution of a background still image that requires visually high resolution is reduced.

[0006] The image data to be drawn includes data that requires high-speed drawing such as movement of an airplane, data that can be drawn at low speed, and data that requires a small amount of data for a simple image. And the capacity varies depending on the data, but it is necessary for the hardware side to always perform rewriting in a cycle capable of high-speed drawing in order to correspond to these drawing data, and to have a performance capable of high-resolution drawing. However, there is a problem that a combination according to the drawing data cannot be freely taken.

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and it is possible to arbitrarily set a rewrite cycle for each drawing object on a screen and freely take a configuration suitable for the properties of drawing data. It is intended to provide a drawing device.

[0008]

According to the present invention, there is provided a drawing apparatus comprising: means for providing drawing data with information for distinguishing a drawing target (event); a geometry / rendering processor and a frame buffer having a double buffer structure; A plurality of graphic generators having a buffer and capable of arbitrarily setting a rewriting cycle of a frame buffer; a means for distributing the drawing data to each of the graphic generators for each of the drawing targets; and an output of each of the graphic generators A Z comparator for performing hidden surface elimination processing by comparing the Z values and combining them to complete pixel data of the drawn image.

[0009] Further, the drawing data has means for storing information for distinguishing a drawing target (event) and its drawing cycle, and has a geometry / rendering processor and a frame buffer having a double buffer structure, respectively.
An n-stage graphic generator capable of arbitrarily setting a frame buffer rewrite cycle; and the drawing data from the first-stage graphic generator to the n-th stage graphic generator for each drawing target in the drawing cycle order. Means for allocating, a first Z comparator for combining the output of the first-stage graphic generator and the output of the second-stage graphic generator by performing a hidden surface elimination process by comparing the Z values, and the first Z comparator Comparator output and third stage graphic
A second Z comparator for combining the output of the generator with the output of the graphic generator by performing a hidden surface removal process by comparing the Z value, and an m-th comparator for performing the hidden surface removal process and combining the outputs of the graphic generators up to the n-th stage in this way. Z of (m = n-1)
M comparators comprising a comparator and m comparators.

Further, the comparison of the Z value performed by the Z comparator for the hidden surface elimination processing is performed on a pixel basis.

Further, the comparison of Z values performed by the Z comparator for the hidden surface elimination processing is performed in units of blocks, which are sets of a plurality of pixels.

With the above-described configuration of the drawing apparatus of the present invention, it is possible to perform drawing at different drawing speeds for each drawing object (event) on the screen. It is possible to select low-resolution rewriting.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the drawing apparatus of the present invention. In FIG. 1, 1a, 1
b,... 1n are geometry / rendering
A graphic generator having a processor 10 and a frame buffer 11 having a double buffer structure and having a drawing performance of tens of thousands of polygons. The graphic generator outputs a depth in addition to ordinary color data (RGB). The data (Z value) shown is output, and the graphic generators 1a to 1
n indicates the asynchronous drawing cycle (rewriting cycle of the frame buffer 11), for example, 60 Hz, 30 Hz, 1
Hz,... Can be set arbitrarily.

2a to 2m (m = n-1) are 2
Output Z. R. G. FIG. A Z comparator composed of a comparator and a selector for comparing the Z value of the B data and performing hidden surface elimination processing, 3 is a D / A converter, 4 is a CRT, and 100 is a CPU bus.

Next, the operation of this embodiment will be described.
As shown in FIG. 1, the drawing apparatus according to the present embodiment includes an n-stage graphic generator, and distributes drawing data to each graphic generator for each drawing target based on the drawing cycle. That is, instead of sorting the drawing data in order as in the conventional drawing apparatus shown in FIG. 2, the drawing data is provided with information for distinguishing a drawing target (event) and its drawing cycle, and software is used for each drawing target. The drawing data is sorted in the drawing cycle order.

For example, when drawing an image in which a ship moves at a relatively low speed in a still background image and an airplane is moving at a high speed in front of the ship, the drawing data of the still background image is sent to the graphic generator 1a. The drawing data of the ship is distributed to the graphic generator 1b, and the drawing data of the airplane in front is distributed to the graphic generator 1c. As described above, the drawing cycle of each graphic generator 1 can be set arbitrarily asynchronously. Therefore, the drawing cycle of the graphic generator 1a is set to, for example, 1/10 Hz, and a large amount of data is used in one cycle to achieve a fine high-resolution Write,
The drawing cycle of the graphic generator 1b is 5H
z, the drawing cycle of the graphic generator 1c is set to 60 Hz, and rewriting is performed in accordance with the moving speed of the drawing target.

The Z values of the outputs from the graphic generators 1 are sequentially compared by Z comparators 2a to 2n, that is, the Z values of the outputs of the graphic generators 1a and 1b are compared by the Z comparator 2a. A hidden surface erasing process is performed, and then the Z value of this output and the output of the graphic generator 1c is converted to a Z comparator 2
b, a hidden surface erasing process is performed. In this way, the Z values are sequentially compared and a hidden surface erasing process is performed to produce pixel data of one entire image, which is converted into analog data by the D / A converter 3. Is displayed on the CRT 4.

The comparison of the Z values performed by the Z comparator 2 for the hidden surface elimination processing may be performed in units of pixels, or may be performed in units of blocks, which is a set of a plurality of pixels. In the embodiment shown in FIG. 1, each of the graphic generators 1 is used to enable high-speed processing.
The drawing data for each drawing target to be allocated to the graphic objects a to 1n is allocated on the basis of the drawing cycle. The outputs of the graphic generators 1a to 1n are output from the first stage and the second stage by a Z comparator. 2a, a hidden surface elimination process is performed, and the output of the third stage and the Z comparator 2a
Are output by the second Z comparator 2b, and thus the hidden surface elimination processing of the outputs from the first stage to the n-th stage is performed by m (n-1) Z comparators. However, the configuration may be such that all outputs of the n-stage graphic generators 1a to 1n are hidden at once by one Z comparator. In this case, each of the graphic generators 1a to 1n is used.
The drawing data may be distributed to each drawing target for drawing. The drawing apparatus of the present embodiment can select a drawing speed according to a drawing target by having the above configuration, and the conventional problem that the resolution of the entire image is reduced due to the necessity of matching the drawing target that requires high-speed drawing. Can be resolved.

[0019]

As described above, the drawing apparatus of the present invention is provided with a plurality of stages of graphic generators each having a frame buffer of a double buffer structure, and successively performs hidden surface elimination processing on these outputs to perform processing on one image as a whole. By outputting pixel data, it is possible to perform drawing at different drawing speeds for each drawing target, and select a speed / resolution according to the nature of the drawing target. In addition, since the number of graphic generators constituting the apparatus can be easily increased or decreased, a configuration suitable for drawing data can be taken as appropriate. Further, since hidden surface erasure is performed using the Z value, there is an effect that it is possible to mix different rendering methods such as volume rendering.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a diagram showing a conventional graphic device of this type;
It is a block diagram showing an example of a generator.

[Explanation of symbols]

1a, 1b,... 1n each graphic generator 2a to 2m each Z comparator 3 D / A converter 4 CRT 7 command manager 8 each geometry processor 9 each rendering processor 10 geometry / rendering processor 11 frame buffer 100 CPU bus 101-103 Internal bus

Claims (4)

[Claims] 1. A drawing apparatus for drawing an image on a CRT under the control of a CPU, means for providing drawing data with information for distinguishing a drawing target (event), a geometry / rendering processor and a double buffer, respectively. A plurality of graphic generators having a frame buffer having a structure and capable of arbitrarily setting a rewriting cycle of the frame buffer; a means for distributing the drawing data to each graphic generator for each drawing target; A Z comparator that performs hidden surface elimination processing by comparing the Z value of the output of the generator to synthesize and complete pixel data of the drawn image, and converts the output of the Z comparator into analog data to draw an image on a CRT Drawing device. 2. A drawing apparatus for drawing an image on a CRT under the control of a CPU, comprising: means for providing drawing data with information for distinguishing a drawing target (event) and a drawing cycle thereof; An n-stage graphic generator having a processor and a frame buffer having a double-buffer structure and capable of arbitrarily setting a rewriting cycle of the frame buffer; Means for distributing from the generator to the n-th graphic generator, and combining the output of the first-stage graphic generator and the output of the second-stage graphic generator by performing hidden surface elimination processing by comparing the Z value A first Z comparator and the first Z A second Z comparator for combining the output of the graphic generator and the output of the graphic generator of the third stage by performing the hidden surface elimination process by comparing the Z values, and thus the graphic generators up to the nth stage. M-th (m =
a drawing apparatus that includes m number of Z comparators including (n-1) Z comparators, and converts an output of the m-th Z comparator into analog data to draw an image on a CRT. 3. The drawing apparatus according to claim 1, wherein the comparison of the Z value performed by the Z comparator for the hidden surface elimination processing is performed on a pixel-by-pixel basis. 4. The drawing apparatus according to claim 1, wherein the comparison of the Z value performed by the Z comparator for the hidden surface elimination processing is performed in units of a block which is a set of a plurality of pixels.