JPS62286398A - Time slot converting device - Google Patents
Time slot converting deviceInfo
- Publication number
- JPS62286398A JPS62286398A JP12996686A JP12996686A JPS62286398A JP S62286398 A JPS62286398 A JP S62286398A JP 12996686 A JP12996686 A JP 12996686A JP 12996686 A JP12996686 A JP 12996686A JP S62286398 A JPS62286398 A JP S62286398A
- Authority
- JP
- Japan
- Prior art keywords
- time slot
- signal
- converter
- signals
- speed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims abstract description 21
- 108010076504 Protein Sorting Signals Proteins 0.000 claims description 9
- 230000005540 biological transmission Effects 0.000 abstract description 3
- 238000004891 communication Methods 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 5
- 239000002131 composite material Substances 0.000 description 3
- 230000004308 accommodation Effects 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Landscapes
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
Abstract
Description
【発明の詳細な説明】
３、発明の詳細な説明
技術分野
本発明は時分割多重化されたディジタル信号のタイムス
ロット変１ｆｊ！装置に関し、特に２種類の信号帯域を
有するディジタル多重化信号の複合タイムスロット変換
装置に関する。DETAILED DESCRIPTION OF THE INVENTION 3. Detailed Description of the Invention Technical Field The present invention provides a time slot variation 1fj! of a time division multiplexed digital signal. The present invention relates to an apparatus, and more particularly to a composite time slot conversion apparatus for digital multiplexed signals having two types of signal bands.
従来技術
従来、この種の複合タイムスロット変換装置は第２図に
示す様なものが利用されている。広帯域信号と狭帯域信
号が時分割多重化された複数のディジタル信号入力１６
は広帯域信号用のタイムスロット変換器１１及び狭帯域
信号用のタイムスロット変換器１３にてそれぞれタイム
スロット変換される。タイムスロット変換器１１．１３
を同じ速度でｌＪ＋作させる場合は狭帯域信号用のタイ
ムスロット変換２！ｉ１３の前後に速度変換器１２．１
４を必要とする。タイムスロット変換された広帯域信号
と狭帯域信号は多重化回路１５で多重化され複数のディ
ジタル出力信号１７となる。2. Description of the Related Art Conventionally, this type of composite time slot conversion device as shown in FIG. 2 has been used. Multiple digital signal inputs 16 with time division multiplexed wideband and narrowband signals
are subjected to time slot conversion by a time slot converter 11 for wideband signals and a time slot converter 13 for narrowband signals, respectively. Time slot converter 11.13
If you want to generate lJ+ at the same speed, time slot conversion 2 for narrowband signals! Speed converter 12.1 before and after i13
Requires 4. The time slot-converted wideband signal and narrowband signal are multiplexed by a multiplexing circuit 15 and become a plurality of digital output signals 17.
上述した従来の複合タイムスロット変換装置は、広帯域
信号と狭帯域信号用が時分割多重化されたディジタル信
号を、それぞれタイムスロット変換する前に分岐し、タ
イムスロット変換後、広帯域信号と狭帯域信号を多重化
するものであり、この広帯域信号および狭帯域信号はそ
の多重化タイムスロットがＩＩＩ限され、このことが伝
送路上の多重化収容効率の低下をもたらすという欠点を
有している。The conventional composite time slot conversion device described above branches the time-division multiplexed digital signals for a wideband signal and a narrowband signal before time slot conversion, and converts the wideband signal and narrowband signal after time slot conversion. The wideband signal and the narrowband signal have the disadvantage that the multiplexing time slots thereof are limited to three times, and this results in a reduction in multiplexing accommodation efficiency on the transmission path.
及Ｈａυ１煎
本発明は上記従来のものの欠点を解決すべくなされたも
のであって、その目的とするところは、広帯域信号と狭
帯域信号との夫々のタイムスロットを自由に配置可能と
したタイムスロット変換装置を提供することにある。The present invention has been made to solve the above-mentioned drawbacks of the conventional ones, and its purpose is to provide a time slot in which each time slot for a wideband signal and a narrowband signal can be freely arranged. The purpose of the present invention is to provide a conversion device.
発明の構成
本発明によるタイムスロット変換装置は、広帯域信号と
狭帯域信号とが共に時分割多重化された第１の信号系列
をタイムスロット変換し、前記狭帯域信号のみが多重化
された第２の信号系列を生成する第１のタイムスロット
変換器と、前記第２の信号系列を速度変換する第１の速
度変換器と、この第１の速度変換器の出力をタイムスロ
ット変換する第２のタイムスロット変換器と、この第２
のタイムスロット変換器の出力を速度変換する第２の速
度変換器とを有し、この第２の速度変換器の出力を前記
第１のタイムスロット変換器にて前記第１の信号系列と
共にタイムスロット変換するようにしたことを特徴とし
ている。Structure of the Invention The time slot conversion device according to the present invention performs time slot conversion on a first signal sequence in which both a wideband signal and a narrowband signal are time-division multiplexed, and a second signal sequence in which only the narrowband signal is multiplexed. a first time slot converter that generates a signal sequence, a first speed converter that converts the speed of the second signal sequence, and a second speed converter that converts the output of the first speed converter into a time slot. time slot converter and this second
a second speed converter for speed converting the output of the time slot converter, and the output of the second speed converter is time-transformed together with the first signal sequence by the first time slot converter. It is characterized by the ability to convert slots.
実施例 次に本発明について図面を参照して説明する。Example Next, the present invention will be explained with reference to the drawings.
第１図は本発明による実施例を示したブロック図であり
、第３図はその動作を示すタイミング図である。広帯域
信号と狭帯域信号とが時分割多重化された複数のディジ
タル入力信号５は広帯域信号用のタイムスロット変換器
１に入力され、タイムスロット上の信号はすべて広帯域
信号としてタイムスロット変換される。このときのタイ
ムスロット変換により、広帯域信号として扱われる複数
の狭帯域信号だけを集めて狭帯域ディジタル信号７を得
る。第３図でａ −＋ｂ 及びｂｌ−２，ａ→ｂ
及びｂ などがこの動作例である。FIG. 1 is a block diagram showing an embodiment according to the present invention, and FIG. 3 is a timing diagram showing its operation. A plurality of digital input signals 5 in which wideband signals and narrowband signals are time-division multiplexed are input to a time slot converter 1 for wideband signals, and all the signals on the time slots are time slot converted as wideband signals. By time slot conversion at this time, a narrowband digital signal 7 is obtained by collecting only a plurality of narrowband signals treated as wideband signals. In Figure 3, a −+b and bl-2, a→b
and b are examples of this operation.
これ等の狭帯域信号ｂ −ｂ は、広帯域信号
用のタイムスロット変換器１と同じ速度で動作する狭帯
域信号用のタイムスロット変換器３でタイムスロット変
換されるべく、速度変換器２で速度変換される。そして
タイムスロット変換（第３図□のｂ →Ｃ、ｂ
−４Ｇ ３−２等）後、広帯域信号とともにタイムス
ロット変換器１でタイムスロット変換するために速度変
換器４にて再び速度変換される。しかる後、狭帯域ディ
ジタル信号１０が得られる。この狭帯域ディジタル信号
１０と複数のディジタル入力信号５とをともにタイムス
ロット変換器１にてタイムスロット変換することにより
複数のディジタル出力信号６を得る（第３図でＣ及びＣ
→ｄ６．Ｃ２−１及びＣ→ｄ２等）。These narrowband signals b - b are time-slot converted by a speed converter 2 in order to be time-slot converted by a time-slot converter 3 for narrow-band signals which operates at the same speed as the time-slot converter 1 for wideband signals. converted. Then, time slot conversion (b → C, b in Figure 3 □)
-4G 3-2, etc.), then the speed is converted again in the speed converter 4 in order to convert the time slot together with the broadband signal in the time slot converter 1. Thereafter, a narrowband digital signal 10 is obtained. By time slot converting both this narrowband digital signal 10 and a plurality of digital input signals 5 in a time slot converter 1, a plurality of digital output signals 6 are obtained (C and C in FIG.
→d6. C2-1 and C→d2, etc.).
こうする゛ことにより、広帯域信号と狭帯域信号とは共
にタイムスロット変換器１にてタイムスロット変換処理
されるので、従来の多重化回路１５（輌“２図参照）の
機能が当該タイムスロット変換器１においてタイムスロ
ット変換機能と共に同時に行われることになり、よって
広帯域信号と狭帯域信号とのそれぞれのタイムスロット
が自由に配置可能となるのである。By doing this, both the wideband signal and the narrowband signal are subjected to time slot conversion processing by the time slot converter 1, so that the function of the conventional multiplexing circuit 15 (see Figure 2) can perform the time slot conversion. This is performed at the same time as the time slot conversion function in the device 1, so that the time slots for the wideband signal and the narrowband signal can be freely arranged.
発明の効果 ・
叙上の如く、本発明によれば、広帯域信号と狭帯域信号
とが共に時分割多重化されたディジタル信号におけるこ
れ等両帯域信号の夫々のタイムスロットを自由に配置可
能となって、伝送路上の多重化収容効率が一層向上され
、ひいては通信コストの低減が可能となるという効果が
ある。Effects of the Invention - As described above, according to the present invention, it is possible to freely arrange the respective time slots of a wideband signal and a narrowband signal in a digital signal in which both these signals are time-division multiplexed. As a result, the multiplexing accommodation efficiency on the transmission path is further improved, and communication costs can be reduced.
第１図は本発明の実施例のブロック図、第２図は従来技
術を示すブロック図、第３図は本発明の実施例のブロッ
クのタイムチャートの例を示す図である。
主要部分の符号の説明
１・・・・・・広帯域信号用タイムスロット変換器
２．４・・・・・・速度変換器
３・・・・・・狭帯域信号用タイムスロット変換器FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a block diagram showing a conventional technique, and FIG. 3 is a diagram showing an example of a time chart of blocks in the embodiment of the present invention. Explanation of symbols of main parts 1... Time slot converter for wideband signals 2.4... Speed converter 3... Time slot converter for narrowband signals
Claims (1)
１の信号系列をタイムスロット変換し、前記狭帯域信号
のみが多重化された第２の信号系列を生成する第１のタ
イムスロット変換器と、前記第２の信号系列を速度変換
する第１の速度変換器と、この第１の速度変換器の出力
をタイムスロット変換する第２のタイムスロット変換器
と、この第２のタイムスロット変換器の出力を速度変換
する第２の速度変換器とを有し、この第２の速度変換器
の出力を前記第１のタイムスロット変換器にて前記第１
の信号系列と共にタイムスロット変換するようにしたこ
とを特徴とするタイムスロット変換装置。A first time slot conversion that performs time slot conversion on a first signal sequence in which both a wideband signal and a narrowband signal are time-division multiplexed, and generates a second signal sequence in which only the narrowband signal is multiplexed. a first speed converter for speed converting the second signal sequence; a second time slot converter for converting the output of the first speed converter into a time slot; and a second time slot converter for converting the output of the first speed converter into a time slot. and a second speed converter for speed converting the output of the converter, and the output of the second speed converter is converted into the first time slot converter by the first time slot converter.
A time slot conversion device characterized in that the time slot conversion device performs time slot conversion together with a signal sequence.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12996686A JPS62286398A (en) | 1986-06-04 | 1986-06-04 | Time slot converting device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12996686A JPS62286398A (en) | 1986-06-04 | 1986-06-04 | Time slot converting device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62286398A true JPS62286398A (en) | 1987-12-12 |
Family
ID=15022833
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12996686A Pending JPS62286398A (en) | 1986-06-04 | 1986-06-04 | Time slot converting device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62286398A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01129698A (en) * | 1987-11-16 | 1989-05-22 | Nippon Telegr & Teleph Corp <Ntt> | Digital exchange circuit |
-
1986
- 1986-06-04 JP JP12996686A patent/JPS62286398A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01129698A (en) * | 1987-11-16 | 1989-05-22 | Nippon Telegr & Teleph Corp <Ntt> | Digital exchange circuit |
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