RU2025901C1 - System of transmission of discrete information - Google Patents

Abstract

FIELD: electric communication. SUBSTANCE: system of transmission of discrete information has on transmitting side; source 1 of information; multipliers 2, adder 3, clock generator 4, generator 5 of Walsh functions, keys 6 and frequency divider 7, on receiving side: frequency dividers 14 and keys 13. EFFECT: reduction of frequency band by decrease of effective width of channels carriers. 3 dwg

Description

 The invention relates to telecommunications.

 The purpose of the invention is to reduce the frequency band by reducing the effective width of the spectrum of channel carriers.

 Figure 1 shows the structural electrical diagram of the proposed system; figure 2 - diagram of the key; figure 3 is a diagram illustrating the operation of the system.

 The system contains on the transmitting side information sources 1, multipliers 2, adder 3, clock 4, function generator 5, keys 6, frequency divider 7; on the receiving side there are multipliers 8, a clock generator 9, a Walsh function generator 10, integrators 11, information receivers 12, keys 13, a frequency divider 14.

 The keys contain an inverter 15, multipliers 16, 17 and an adder 18.

 The system for transmitting discrete information works as follows.

 Discrete information in the form of “0” or “1” may appear at the outputs of information sources 1. The duration of zero or one is equal to the duration of the channel carrier supplied to the control input of the multiplier 2, the information input of which is connected to the output of the corresponding information source 1.

The clock generator 4 generates pulses whose duration is equal to half the period of its frequency arriving at the clock input of the generator 5 of Walsh functions, at the outputs of which 2 ⁿ Walsh functions are formed. The output pulses of the clock generator 4 are also supplied to the input of the frequency divider 7, having a division ratio of 2 ^n-1 . Thus, during the first half-period of the formation of the Walsh function at the output of the frequency divider 7, "0" is generated, which is supplied to the control inputs of the keys 6. During the second half-cycle of the formation of the Walsh functions at the output of the frequency divider 7, "1" is formed, which goes to the control inputs of the keys 6 .

 Upon receipt of the key 6 "0" at the control input, a signal is generated at its output that is transmitted to its first information input, and when a key 6 "1" is received at the control input of the key, a signal is generated at its output that comes to its second information input.

Let us consider in more detail the functioning of the keys 6. Upon receipt of the key 6 “0” at the control input Z, the input of the element is NOT 15 and the first input of the second multiplier 17 receives “0”. As a result, the signal supplied to the first information input x _{1 of the} key 6, through the multiplier 16 and the adder 18, is output y. The signal supplied to the second information input x ₂ does not go to the output y, since the first input of the multiplier 17 receives "0" from the control input z.

Upon receipt of the control input z of the key 6 "1" to the input of the element NOT 15 and the first input of the multiplier 17 receives "1". As a result, the signal supplied to the second information input x of key 6, through the multiplier 17 and the adder 14, is supplied to the output y of key 6. The signal fed to the first information input x _{1 of} key 6 does not go to output y, since the first input of the multiplier 16 receives "0" from the output of the element NOT 15.

 Thus, during the formation of "0" or "1" at the output of the information source 1 and the arrival of this information symbol to the information input of the multiplier 2, the channel carrier receives the output of the corresponding key 6. The channel carrier has the form of two "cross-linked" half-periods of the corresponding Walsh functions. After multiplication, the channel information carrier through the adder 3 enters the communication line. Similarly, channel information carriers are formed in the remaining channels.

 At the receiving side, the group signal is fed to the information inputs of the multipliers 8. At the same time, the second inputs of the multipliers 8 receive reference oscillations from the outputs of the corresponding keys 13, which are formed in the same way as the channel information carriers on the transmitting side. In multipliers 8, the group signal is multiplied by the corresponding reference oscillations and the results for the duration of the channel information carriers are integrated in the respective integrators 11. At the outputs of the integrators 11, the received discrete information is supplied to the inputs of the information receivers 12.

 Figure 3 shows the timing diagrams illustrating the process of forming the channel carrier S / 6, θ / in the eight-channel discrete information transmission system in the case of receipt of "1" from the output of the information source 1 to the information input of the corresponding multiplier 2.

The diagrams show the temporary state.
a) the output of the clock generator 4;
b) the seventh output of the generator 5 of Walsh functions, on which the function Wal / 6, θ /, which is fed to the first information input of the seventh key 6;
c) the second output of the generator 5 of Walsh functions, on which the function Wal / 1, θ / is generated, which arrives at the second information input of the seventh key 6;
d) the output of the frequency divider 7;
d) the output of the seventh key 6, on which the signal S / 6, θ /;
e) the output of the seventh source 1 information;
g) the output of the seventh multiplication block 2, on which the channel carrier S / 6, θ / is formed.

Claims (1)

DISCRETE INFORMATION TRANSMISSION SYSTEM containing information sources on the transmitting side, the outputs of which are connected to the first inputs of the multipliers, the outputs of which are connected to the inputs of the adder, the output of which is connected to the communication line, a clock generator whose output is connected to the input of the Walsh function generator, and on the receiving side - a clock generator, the output of which is connected to the input of the Walsh function generator, multipliers, the outputs of which are connected to the inputs of integrators, the outputs of which are connected to the inputs of information receivers, etc. than the first inputs of the multipliers are connected to the communication line, characterized in that, in order to reduce bandwidth by reducing the effective width of the spectrum of channel vectors, introduced at the transmitting side 2 ⁿ keys (where 2 ⁿ - the number of the Walsh function generator output) and a frequency divider, wherein the output of the clock generator is connected to the input of the frequency divider, the output of which is connected to the control inputs of the keys, the first information input of each i-th (where i = 1, ..., 2 ⁿ ) key is connected to the i-th output of the Walsh function generator, the second information at od each i-th switch is connected to the (2 ⁿ -1-i) -th Walsh function generator output, and the output of each switch is connected to the second input of a corresponding multiplier, and at the receiving side - administered 2 ⁿ keys and a frequency divider, the output clock generator is connected to the input of the frequency divider, the output of which is connected to the control inputs of the keys, the first information input of each key is connected to the i-th output of the Walsh function generator, the second information input of each key is connected to the (2 ⁿ + 1-i) -th output of the function generator Walsh, and each key's output connected to a second input of the corresponding multiplier.

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