JPS622845Y2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a circuit for correcting shedding distortion caused by an optical system, etc. disposed between a self-scanning type document reading element and a document in a plane scanning type facsimile device. .

Generally, when reading a document using a flat scanning facsimile machine, for example, as shown in Fig. 1,
Irradiating the surface of the original 1 with a light source 3 such as a fluorescent lamp,
The reflected light is imaged by a lens 2 or the like on a self-scanning document reading element 4 made of a CCD or the like,
An image signal is obtained by electronically scanning this scanning element 4.

In the case of such reading scanning, if the illuminance reflected by the light source 3 on the surface of the original 1 is uniform in the scanning line direction, then
Due to the so-called shading distortion of the lens 2, the amount of light incident on the scanning element 4 is lower in the portion corresponding to the peripheral portion of the scanning line than in the portion corresponding to the central portion. The gain of the image signal derived from 4 changes as shown in FIG. In addition, in Fig. 2, the dashed arrow indicates any 1
Represents a scan line.

Conventionally, in order to correct the shedding distortion of such an optical system, a sine wave signal that approximates the shedding characteristic as shown in Fig. 2 is electrically created, and this signal is used to control the gain of the image signal amplification circuit. Ta.

However, in the conventional circuit using this method,
The sine wave signal for correction is uniquely determined at the time of design to match the original characteristics of the light source and lens, so if the characteristics of the light source deteriorate due to long-term use, sufficient correction must be performed. In addition, the magnitude of shading distortion depends not only on the amount of light from the light source but also on the reflection characteristics of the original, so when originals with different background colors are used, However, in each case, there was a drawback that faithful correction could not always be performed.

In view of this, the present invention proposes a shedding distortion correction circuit that can always perform substantially faithful correction regardless of the aging of the light source or the like or the reflection characteristics of the original.

Hereinafter, details of the present invention will be explained with reference to the drawings.

FIG. 3 schematically shows the main parts of a facsimile machine embodying the present invention. In the figure, 4 is a self-scanning type document reading element, for example, 1024
It has a capacity of 2 bits. This element is driven by a clock pulse φa after the start pulse ST shown in FIG. It's starting to repeat. On the other hand, the document (not shown) read and scanned by this element 4 is moved in the sub-scanning direction by a distance equivalent to one line for every odd-numbered pulse ST. For this reason, the above element 4
The same line of the original is read twice in succession, and the output signal VD thereof is amplified by the image signal amplification circuit 5 and then input to the peak hold circuit 6.

The start pulse ST is also introduced into the 1/2 frequency divider circuit 7, and the AND gate 8 takes the AND of the output SR and the pulse ST, and the output is a pulse obtained by extracting only the odd numbered pulse ST.
RD is obtained. This pulse is then applied as a reset pulse to the peak hold circuit 6. Therefore, the output of the hold circuit 6 becomes like VP in FIG. 2, and this is applied as a control signal to a variable gain amplifier circuit, which will be described later.

The start pulse ST is also applied as a signal for presetting the down counter 9. That is, this counter 9 calculates the number of bits of the reading element 4 when the pulse ST is applied.
Preset to 1024. Simultaneously with the presetting, the counter 9 starts counting the clock pulses φa, and when it counts 1024 clock pulses, its output CO becomes low level.

This counter output CO is applied as another input to an AND gate 10 which has the clock pulse φa as one input, and an output pulse φb is obtained from this AND gate. This pulse is then input to the 1/n frequency divider circuit 11. When obtaining a correction signal that approximates the shading curve shown in Fig. 2 by, for example, 16 straight lines, this frequency dividing circuit uses 1024
Since ÷16=64, it is constituted by a 1/16 frequency dividing circuit, and its output pulse φc is introduced into a shading correction signal generating circuit 12 whose details are shown in FIG.

In FIG. 4, 16 pulses (FIG. 6 φ
c) is input to the first stage S1 of each of the cascade-connected 4-bit shift registers S1 to S4.

Each bit output of the shift registers S1 to S4 is connected to eight two-input OR gates O1 to O as shown in the figure.
8 inputs. Therefore, a pair of two pulses as shown in Q1 to Q8 in FIG. 6 are derived from each OR gate.

Each of these pulses Q1 to Q8 corresponds to each small period when one scanning period 1L is equally divided into 16. Each of these pulses is connected to input adjustment resistors R1 to R8.
Operational amplifier through (R1>R2>...>R8)
Input to OP1.

A feedback resistor R9 and a capacitor C are connected to the operational amplifier OP1, and each pulse Q
The amplification degree for each of the resistors R1 to Q8 is determined by the ratio of the resistor R9 to each of the resistors R1 to R8 described above. Therefore, if the values of these resistors are appropriately set within the above-mentioned ranges, together with the smoothing effect of the capacitor C, a signal for correcting shedding distortion such as SH in FIG. 6 can be obtained from the amplifier OP1. . This signal SH is then input to the next variable gain amplifier circuit 13.

The variable gain amplifier circuit 13 acts as a variable impedance element using the input adjustment resistor R10 and the output of the peak hold circuit 6 described above.
The main element is an operational amplifier OP2 to which the correction signal SH is input via a parallel connection circuit of FETs (ETs), and a feedback resistor R11 is connected between the input and output terminals of this amplifier. For this reason,
Correction signal inverted by this operational amplifier OP2
The magnitude (amplitude) of SH' (see FIG. 5) is varied according to the output of the peak hold circuit 6 (VP in the figure), and the larger VP is, the larger the amplitude of S'H' becomes.

Correction signal from the variable gain amplifier circuit 13
SH' is introduced as one input of the differential amplifier circuit 14 in FIG. 3, and the image signal (VD' in FIG. 5) from the image signal amplifier circuit 5 is introduced as the other input of this circuit. Therefore, from this differential amplifier circuit 14, an image signal such as VD'' in FIG. 5, in which the shedding distortion is corrected, is obtained.
Since SH' is varied according to the peak value of the image signal VD', which is influenced by the light intensity of the light source and the reflection characteristics of the original, substantially faithful shading correction is always performed. In this way, the image signal VD'' corrected by the differential amplifier circuit 14 is introduced into the gate circuit 16 which uses the inverted output from the inverter 15 of the 1/2 frequency divider circuit 7 as an opening/closing signal, and is used for the second time of each scanning line. Only the image signals corresponding to the scanning are sequentially extracted.

Up to now, a symmetrical correction signal has been obtained by configuring the correction signal generation circuit 12 as shown in FIG. This is because, due to the characteristics of If the shedding strain does not exhibit such symmetry, generally n
It is sufficient to generate the pulses individually and introduce each pulse to the operational amplifier OP1. Furthermore, in order to improve the correction accuracy, the frequency division ratio of the frequency dividing circuit 11 may be decreased to increase the number of pulses n.

As described above, the shading distortion correction circuit of the present invention is configured such that the shading distortion correction signal created using the drive clock pulse of the document reading element is varied according to the peak value of the image signal output of the reading element. None. Since this signal is used to correct the shading distortion, it almost matches the actual shading characteristics of the lens used, and is faithful and unaffected by the deterioration of the light source or the background color of the original. Correction can be achieved,
Ideal for facsimile devices.

[Brief explanation of the drawing]

FIG. 1 schematically shows the document reading mechanism of a flat scanning facsimile device to which the present invention is applied.
The figure is a diagram for explaining the shading distortion of the facsimile device. FIG. 3 is a block diagram showing a schematic configuration of one embodiment of the shading distortion correction circuit of the present invention, FIG. 4 is a circuit diagram showing a specific configuration of its main parts, and FIGS. FIG. 3 is a waveform diagram for explaining operation. 4: Original reading element, 5: Image signal amplification circuit, 6:
Peak hold circuit, 7: 1/2 frequency divider circuit, 9: Down counter, 11: 1/n frequency divider circuit, 12: Correction signal generation circuit, 13: Variable gain amplifier circuit, 14:
Differential amplifier circuit, 16: Gate circuit, S1 to S4:
Shift register, OP1, OP2: operational amplifier.

Claims (1)

[Claims for Utility Model Registration] (1) In a plane scanning type facsimile device using a self-scanning type document reading means, the reading means is configured to read the same scanning line of the document twice each time. and a correction signal generating means for obtaining a driving clock pulse for the reading means to generate a correction signal representing a shading characteristic in the scanning line direction caused by an optical system or the like disposed between the document and the reading means; a peak hold means that is reset every time the second scan of each scanning line by the reading means is completed and holds the peak value of the image signal output from the reading means; and a peak hold means for holding the peak value of the image signal output from the reading means; variable gain amplification means for controlling the amplification gain of the signal; differential amplification means for differentially amplifying the output from the variable gain amplification means and the image signal output; A shading distortion correction circuit for a facsimile apparatus, which is provided with an extraction means for extracting a signal corresponding to scanning, and obtains an image signal with shading distortion corrected from the extraction means. (2) The correction signal generating means includes a circuit that frequency divides the clock pulse to generate pulses corresponding to each of the sub-periods when each scanning period is divided into a plurality of parts, and a circuit whose amplification degree is sequentially increased by the output pulses. A shedding distortion correction circuit according to claim 1, characterized in that the shedding distortion correction circuit is comprised of a circuit that changes the pulse and amplifies the pulse.