JPS6228264U - - Google Patents

Info

Publication number
JPS6228264U
JPS6228264U JP11860285U JP11860285U JPS6228264U JP S6228264 U JPS6228264 U JP S6228264U JP 11860285 U JP11860285 U JP 11860285U JP 11860285 U JP11860285 U JP 11860285U JP S6228264 U JPS6228264 U JP S6228264U
Authority
JP
Japan
Prior art keywords
output
circuit
reset signal
input
falls
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11860285U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11860285U priority Critical patent/JPS6228264U/ja
Publication of JPS6228264U publication Critical patent/JPS6228264U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の実施例を示す電気回路図、第
2図は出力状態を示すタイミングチヤートである
。 1……マイコン、2……ウオツチドツグ回路、
6……スイツチングトランジスタ、31……フロ
ツプフロツプ回路、32……オア回路。
FIG. 1 is an electric circuit diagram showing an embodiment of the present invention, and FIG. 2 is a timing chart showing the output state. 1...Microcomputer, 2...Watchdog circuit,
6... Switching transistor, 31... Flop-flop circuit, 32... OR circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ウオツチドツグ回路のリセツト信号出力とck
出力とを入力し、ck出力が高値の時のリセツト
信号の立ち上がりにより出力が立ち下がり、ck
出力が低値の時のリセツト信号の立ち下がりによ
り出力が立ち上がり、リセツト信号の高値時のc
k出力の立ち上がりにより出力が立ち下がるフリ
ツプフロツプ回路と、一方の入力端にこのフリツ
プフロツプ回路の出力を、他方の入力端にマイコ
ンのトラブル出力をそれぞれ入力し、出力端が被
制御機器の駆動電源供給回路を開閉するスイツチ
ングトランジスタのベースに接続されるオア回路
とを設けたことを特徴とするマイコン暴走時の安
全装置。
Watchdog circuit reset signal output and ck
When the ck output is high, the output falls due to the rise of the reset signal, and the ck
The output rises when the reset signal falls when the output is low, and c when the reset signal is high.
A flip-flop circuit whose output falls when the k output rises, the output of this flip-flop circuit is input to one input terminal, the trouble output of the microcomputer is input to the other input terminal, and the output terminal is a drive power supply circuit for the controlled equipment. A safety device in the event of a runaway microcomputer, characterized by having an OR circuit connected to the base of a switching transistor that opens and closes the circuit.
JP11860285U 1985-07-31 1985-07-31 Pending JPS6228264U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11860285U JPS6228264U (en) 1985-07-31 1985-07-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11860285U JPS6228264U (en) 1985-07-31 1985-07-31

Publications (1)

Publication Number Publication Date
JPS6228264U true JPS6228264U (en) 1987-02-20

Family

ID=31005208

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11860285U Pending JPS6228264U (en) 1985-07-31 1985-07-31

Country Status (1)

Country Link
JP (1) JPS6228264U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5587252A (en) * 1978-12-26 1980-07-01 Komatsu Ltd Display and prevention circuit for computer reckless run
JPS5851356B2 (en) * 1977-12-12 1983-11-16 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション optical data storage

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5851356B2 (en) * 1977-12-12 1983-11-16 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション optical data storage
JPS5587252A (en) * 1978-12-26 1980-07-01 Komatsu Ltd Display and prevention circuit for computer reckless run

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