JPS6228093Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic gain control (AGC) circuit that automatically suppresses fluctuations in input voltage and maintains an output voltage at a substantially constant level.

Generally, communication networks are constructed mainly of telephone lines, and therefore, in order to transmit digital signals over such lines, modulation/demodulation is required to convert digital signals into analog signals similar to voice signals and inversely convert them. A device (MODEM; Modulator-Demodulator) is provided at the line terminal. The voltage level of the transmitted analog signal may fluctuate due to fading or the like, and this fluctuation is unfavorable for the operation of the demodulator on the receiving side of the modulator/demodulator. Therefore, this voltage level fluctuation is automatically suppressed,
An automatic gain control circuit that always maintains a substantially constant output level is connected upstream of the demodulator. This automatic gain control circuit converts, for example, a voltage at a level of 0 to -40 dB to a voltage at a level of ±0.5 dB.

Conventionally, automatic gain control circuits are configured as negative feedback circuits. That is, the output voltage of this circuit is rectified and smoothed, the difference voltage between this DC voltage and a preset reference voltage is used as the control voltage, and the gain of the automatic gain control circuit is set so that the control voltage becomes smaller.
That is, the above-mentioned DC voltage is controlled so as to approach the reference voltage. In this case, as the element that determines the gain, an element whose resistance value changes depending on the control voltage value, such as a diode or a MOS transistor, is used. However, in this conventional type, a DC offset occurs in the output due to an increase in the DC component of the input voltage or an increase in the DC component due to variations in circuit elements, and especially when the element that determines the gain is a diode, Since the control voltage itself is added to the input voltage of the automatic gain control circuit, it leaks to the output side as DC noise, so there is a problem that a DC offset occurs in the output in this case as well.

The purpose of this invention is based on the concept of providing a DC negative feedback loop that extracts only the DC component from the output of the automatic gain control circuit, and by adding this DC negative feedback component to the control voltage or to the input voltage. The object of this invention is to eliminate the DC offset in the output of the automatic gain control circuit, thereby solving the problems of the conventional type described above.

The present invention will be explained below with reference to the drawings.

FIG. 1 is a block circuit diagram showing an example of a communication network to which an automatic gain control circuit is applied. In Figure 1, the central processing unit (hereinafter referred to as CPU) 1
An analog transmission line (hereinafter referred to as
5 (simply referred to as a line). In this case, modem devices 2 and 3 are provided between the CPU 1 and the line 5, and between the line 5 and the terminal device 4, respectively. This modem converts the digital signal from the CPU 1 or the terminal device 4 into an analog signal when sending an analog signal to the line 5, and converts this analog signal into a digital signal when receiving the analog signal from the line 5. It is for converting. For example, the transmission side of the modulation/demodulation device 2 includes a modulator 21 that converts a digital signal from the CPU 1 into an analog signal,
It consists of a filter 22 that cuts off the noise of this analog signal, and a transformer 23 that insulates the modem 2 from the line 5. On the other hand, the receiving side includes a transformer 23 that insulates the modem 2 from the line 5. 24, a filter 25 that cuts off noise in the analog signal from the line 5, an automatic gain control circuit 26 that automatically converts the level of this analog signal to a substantially constant level, and a filter 25 that cuts off noise in the analog signal from the line 5; Demodulator 2 converts into signal
It consists of 7. In this way, the automatic gain control circuit 26 is connected before the demodulator 27, and even if the level of the analog signal fluctuates due to fading or the like on the line 5, the level of the analog signal input to the demodulator 27 is almost constant. It is configured to be held constant.

FIG. 2 is a block circuit diagram of a conventional automatic gain control circuit. In FIG. 2, an input voltage Vi is converted into an output voltage Vo at a substantially constant level by a voltage control amplifier 61 whose gain is controlled by a control voltage Vc. In other words, in the negative feedback loop,
The output voltage Vo is converted into a DC voltage Vo' by a rectifier 62 and a smoother 63, and further calculated by a calculator 64 with a preset reference voltage _VR . In this case, the arithmetic unit 64 performs a subtraction operation. The differential voltage thus obtained is amplified by the amplifier 65 and becomes the control voltage Vc. In such a negative feedback loop, the gain of the voltage control amplifier 61 is automatically controlled so that the control voltage Vc becomes small, that is, the output voltage Vo' of the smoother 63 approaches the reference voltage _VR . Ru.
However, in this format, the input voltage
If a DC offset occurs in the output due to an increase in the DC component of Vi or variations in elements within the voltage control amplifier 61, and if the element that determines the gain is a diode, the control voltage Vc will also change from the voltage control amplifier 61. Since it is added to the input voltage, it leaks to the output side as DC noise, causing a DC offset.

FIG. 3 is a block circuit diagram of an automatic gain circuit as an embodiment of the present invention, which solves the above-mentioned problems. In FIG. 3, the same elements as those in FIG. 2 are given the same reference numerals. In FIG. 3, unlike the case in FIG. 2, there are two negative feedback loops. The first negative feedback loop is for the AC component of the output voltage Vo, and includes a voltage control amplifier 61, a rectifier 62, a smoother 63, arithmetic units 64 and 67, and an inverting amplifier 68. Further, the second negative feedback loop is for the DC component of the output voltage Vo, and includes a voltage control amplifier 61, a smoother 66, an arithmetic unit 67, and an inverting amplifier 68. This second negative feedback loop is designed to remove the DC offset at the output of voltage controlled amplifier 61. That is,
The DC component included in the output voltage Vo is detected by a smoother 66 made of, for example, a resistor and a capacitor, and is further superimposed on the first negative feedback loop by an arithmetic unit 67. On the other hand, in the first negative feedback loop, the output voltage
The AC component of Vo is converted into a DC voltage Vo' by a rectifier 62 and a smoother 63, and further subtracted from a preset reference voltage V _R by a calculator 64. The differential voltage is superimposed on the second negative feedback loop by the calculator 67.
The calculation result of the calculation unit 67 is inverted and amplified by the inverting amplifier 68 to become the control voltage Vc. When the DC component increases in the output voltage Vo in this way, the control voltage Vc automatically changes in a direction in which the DC component decreases. Therefore, the DC component in the output voltage Vo becomes small.

In addition, in FIG. 3, the second negative feedback loop component for the DC component of the output voltage Vo is configured to be added to the control voltage Vc of the voltage control amplifier 61, but the second negative feedback loop component It is also possible to invert the signal and add it to the input voltage Vi, thereby removing the DC offset at the output of the voltage control amplifier 61.

FIG. 4 is a block circuit diagram of an automatic gain control circuit as another embodiment of the present invention. In FIG. 4, the same reference numerals are given to the same elements as those in FIG. 3. In other words, unlike the case in Figure 3, as a voltage controlled amplifier, the input voltage
A voltage control amplifier 61' that inputs Vi as it is,
A voltage control amplifier 61'' that inverts and inputs the input voltage Vi is provided.These two voltage control amplifiers 61' and 61'' have the same configuration as the voltage control amplifier 61 in FIGS. 2 and 3. and are simultaneously controlled by one control voltage Vc. The difference between these output signals "a" and "b" is calculated by the arithmetic unit 72, and harmonic distortion contained in each output signal and DC offset due to leakage of the control voltage Vc are canceled out. Ru. Also, as in the case of FIG. 3, there are two negative feedback loops. The first negative feedback loop is for the AC component of the output voltage Vo, and is for each voltage control amplifier 6.
1' and 61'', an arithmetic unit 72, a rectifier 62, a smoother 63, an arithmetic unit 64, and an inverting amplifier 68.The second negative feedback loop is for the DC component of the output voltage Vo, and the inverter 71 , voltage controlled amplifiers 61' and 61'', an arithmetic unit 72, a smoother 66, an inverter 69, and an arithmetic unit 70. This second negative feedback loop removes the DC offset in each output of the voltage control amplifiers 61' and 61''. That is, the DC component included in the output voltage Vo is removed by a smoother composed of, for example, a resistor and a capacitor. 66, then inverted by the inverter 69, and further added to the input voltage Vi by the arithmetic unit 70. In this way, when the DC component increases in the output voltage Vo, this DC component increases. Input voltage in the direction of decreasing component
Vi changes automatically. Therefore, although the DC offset amount due to leakage of the control voltage Vc is canceled by the two voltage control amplifiers, the input voltage
By varying Vi, the DC offset is removed more completely.

In addition, in Fig. 4, the second negative feedback loop component for the DC component of the output voltage Vo is the input voltage.
It is configured to be added to Vi, but the second
It can also be configured to add the negative feedback loop component of to the control voltage Vc. Furthermore, in the above embodiment, the DC offset at the output of the voltage control amplifier due to leakage of the control voltage Vc is removed, but the DC offset at the output of the voltage control amplifier due to the DC offset of the input voltage Vi itself is also removed. Needless to say, it can be removed.

According to the present invention, it is possible to remove the DC offset due to leakage of the control voltage and the DC offset due to the DC offset of the input voltage itself at the output of the automatic gain control circuit, which helps to solve the problems of the conventional type described above. It is something.

[Brief explanation of the drawing]

Fig. 1 is a block circuit diagram showing an example of a communication network to which an automatic gain control circuit is applied, Fig. 2 is a block circuit diagram of a conventional automatic gain control circuit, and Fig. 3 is a block circuit diagram showing an example of a communication network to which an automatic gain control circuit is applied. Block circuit diagram of gain control circuit FIG. 4 is a block circuit diagram of an automatic gain control circuit as another embodiment of the present invention. 1: central processing unit, 2, 3: modem, 4:
Terminal device, 5: Line, 21: Modulator, 22: Filter, 23, 24: Transformer, 25: Filter, 2
6: automatic gain circuit, 27: modulator, 61,6
1', 61'': Voltage control amplifier, 62: Rectifier, 6
3: Smoother, 64: Arithmetic unit, 65: Amplifier, 6
6: smoother, 67: arithmetic unit, 68: inverting amplifier,
69, 71: Inverter, 70, 72: Arithmetic unit.

Claims (1)

[Claims for Utility Model Registration] An amplification stage 61 for amplifying an input signal Vi to generate an output signal Vo; 1 voltage and constant voltage V _R
a first negative feedback loop circuit 62, 63, 6 that applies the voltage difference between the
4, 67, 68, extracting a second voltage according to the DC component of the output signal, and using the second voltage as the control voltage of the amplification stage.
A second negative feedback loop circuit 66, 67, 6 which is applied as Vc or added to the input stage of the amplification stage.
8, 69, 70, and an automatic gain control circuit comprising: