JPS62280662A - Control method for measurement accuracy of measuring instrument for semiconductor device - Google Patents

Control method for measurement accuracy of measuring instrument for semiconductor device

Info

Publication number
JPS62280662A
JPS62280662A JP61124202A JP12420286A JPS62280662A JP S62280662 A JPS62280662 A JP S62280662A JP 61124202 A JP61124202 A JP 61124202A JP 12420286 A JP12420286 A JP 12420286A JP S62280662 A JPS62280662 A JP S62280662A
Authority
JP
Japan
Prior art keywords
semiconductor device
measurement accuracy
measurement
reference semiconductor
accuracy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61124202A
Other languages
Japanese (ja)
Inventor
Hiromi Nishimura
西村 弘実
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP61124202A priority Critical patent/JPS62280662A/en
Publication of JPS62280662A publication Critical patent/JPS62280662A/en
Pending legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

PURPOSE:To shorten the loss time in measurement accuracy confirmation and to secure the accuracy of measurement by providing a reference semiconductor device storage part in a test handling device, and switching a conveyance line and storing a reference semiconductor device. CONSTITUTION:Rails 4 for conveyance are switched to take the reference semiconductor device out of the reference semiconductor device storage part 6 of the test handling device automatically, the device is measured plural times at semiconductor device measurement parts 2 and 3 and stored in the storage part 6 again, and the rails 4 are returned to a conveyance path for normal operation. Therefore, the measurement accuracy is confirmed at desired time in a short time even during operation and the accurate measurement accuracy is secured at any time.

Description

【発明の詳細な説明】 3、発明の詳細な説明 [発明の目的コ (産業上の利用分野) 本発明はrc(集積回路)やLSI(大規模集積回路)
等の半導体装置を測定する装置の測定精度管理方法に関
する。
[Detailed Description of the Invention] 3. Detailed Description of the Invention [Purpose of the Invention (Industrial Application Field) The present invention is applicable to RC (integrated circuit) and LSI (large scale integrated circuit)
The present invention relates to a measurement accuracy control method for an apparatus for measuring semiconductor devices such as the above.

(従来の技術) 通常、テストハンドリング装置において測定部における
測定精度確認に管理する必要がらり、測定精度は基準半
導体装置に対するものでなくてはならない。また基準半
導体装置の測定は通常作業と同状態でなければ、測定結
果に誤差がでるため測定装置の測定精度を正しく管理で
きない。
(Prior Art) Normally, in a test handling device, it is necessary to manage the measurement accuracy confirmation in the measurement section, and the measurement accuracy must be with respect to a reference semiconductor device. Furthermore, unless the reference semiconductor device is measured under the same conditions as in normal work, errors will occur in the measurement results, making it impossible to correctly manage the measurement accuracy of the measuring device.

従来のテストハンドリング装置で測定部における測定精
度を管理するKは、テストノ・ント9リング装置を通常
作業状態よシ一度解除し、搬送ライン上に基準半導体装
置を置き、通常作業状態にして測定結果を得る。そして
再度通常作業状態を解除し、搬送ライン上にある基準半
導体装置を取り出し、通常作業として稼動できる結果で
あれば通常作業として使用するが、1回の測定精度を確
認するために上記の作業が必要とな)、その間通常作業
はで@なくなり、測定精度確認と生産数は反比例の関係
となる。
K, who manages the measurement accuracy in the measuring section using a conventional test handling device, releases the test notebook 9 ring device from its normal working state, places the reference semiconductor device on the transfer line, puts it into its normal working state, and calculates the measurement results. get. Then, the normal work state is canceled again, the reference semiconductor device on the transfer line is taken out, and if the result allows it to be operated as normal work, it is used as normal work, but the above work is performed to confirm the accuracy of one measurement. (necessary), during which time normal work ceases, and measurement accuracy confirmation and production volume become inversely proportional.

第2図は上記問題点を説明するためのものであシ、今ま
でのテストハンドリング装置には、半導体装置の搬送ラ
インまたは搬送ラインに接するところに基準半導体装置
収納部がない。従って基準半導体装置の測定部における
測定結果を得るためには、半導体装置ローブ部1よシ搬
送するか、半導体装置搬送用レール4の途中より搬送し
、第1の測定部2、M2の測定部3にで測定後、半導体
装置アンローダ部5よシ基準となる半導体装置を抜き取
る方法しかないものでめった。
FIG. 2 is for explaining the above-mentioned problem, and the conventional test handling apparatus does not have a reference semiconductor device storage section on the semiconductor device transport line or in a place adjacent to the transport line. Therefore, in order to obtain the measurement results at the measurement section of the reference semiconductor device, the semiconductor device must be transported through the lobe section 1 or from the middle of the semiconductor device transport rail 4, and then transferred to the measurement section of the first measurement section 2, M2. After the measurement in step 3, the only method available was to remove the reference semiconductor device from the semiconductor device unloader section 5.

(発明が解決しようとする問題点) 上記測定精度確認は、テストハンドリング装置において
不可欠の作業であり、ロス時間が生じても行なわなけれ
ばならず、確認回数を多くするためにもロス時間の長さ
が問題となる。
(Problem to be solved by the invention) The above measurement accuracy confirmation is an essential operation in the test handling device, and must be performed even if there is lost time. This becomes a problem.

本発明は上記実情に鑑みてなされたもので、測定精度確
認時に生じるロス時間の短縮と、測定精度自身の正確さ
を得ることができる半導体装置の測定装置の測定精度管
理方法全提供しようとするものである。
The present invention has been made in view of the above-mentioned circumstances, and it is an object of the present invention to provide a complete method for controlling the measurement accuracy of a semiconductor device measuring device, which can shorten the loss time that occurs when confirming measurement accuracy and improve the accuracy of the measurement itself. It is something.

[発明の構成] (問題点を解決する之めの手段と作用)本発明は、テス
トハンドリング装置内に、基準となる半導体装置の収納
部を設け、任意回数測定後、基準となる半導体装置を前
記収納部より自動的に取り出し、テストハンドリング装
置の搬送ラインに流し、測定部にて測定を行ない、再度
前記収納部へ自動的に納めること?特徴とし、測定精度
確認時に生じるロス時間の短縮と測定精度自身の正確さ
を得るため、ラストノ1ンドリング装置の搬送ラインに
基準半導体装置の収納部を設けるものである。
[Structure of the Invention] (Means and Effects for Solving Problems) The present invention provides a storage section for a reference semiconductor device in a test handling device, and after measuring an arbitrary number of times, the reference semiconductor device is placed in a test handling device. Automatically take out the sample from the storage section, flow it to the transfer line of the test handling device, measure it in the measurement section, and automatically put it back into the storage section? A storage section for the reference semiconductor device is provided in the transport line of the last-no-1 handling device in order to reduce the loss time that occurs when confirming the measurement accuracy and to improve the accuracy of the measurement itself.

(実施例) 以下図面を参照して本発明の一実施例全説明する。第1
図は同冥施例の構成図であるが、これは第2図のものと
対応させた場合の例であるから対応する個所には同一符
号を付して説明を省略囮特徴とする点の説明を行なう。
(Embodiment) An embodiment of the present invention will be fully described below with reference to the drawings. 1st
The figure is a configuration diagram of the same example, but since this is an example in which it corresponds to the one in Figure 2, corresponding parts are given the same reference numerals and explanations are omitted. Give an explanation.

即ち本発明によるテストハンドリング装置は、該装置の
半導体装置搬送用レール4に接する場所に基準半導体装
置収納部6を設け、ここに基準半導体装置全納めておく
、そして測定精度確認時には、搬送ラインを切υ換えて
第1の411定部2、第2の測定部3にて測定結果?出
し、搬送用レール4を通り再び収納部6へ基準となる半
導体装置全収納する。即ち測定精度確認時には、基準半
導体装置収納部6、半導体装置測定部2.3、半導体装
置搬送用レール4を使用する。これに対し通常作業時に
は、搬送ライン切り換えにより半導体装置ローダ部1、
測定部2.3、搬送用レール4.半導体装置アンローダ
部5を使用するものである。
That is, in the test handling device according to the present invention, a reference semiconductor device storage section 6 is provided at a location in contact with the semiconductor device transport rail 4 of the device, and all the reference semiconductor devices are stored here, and when checking measurement accuracy, the transport line is closed. Switching between the first 411 constant part 2 and the second measuring part 3, the measurement results? Then, all the semiconductor devices serving as a reference are stored again through the transport rail 4 into the storage section 6. That is, when confirming measurement accuracy, the reference semiconductor device storage section 6, the semiconductor device measurement section 2.3, and the semiconductor device transport rail 4 are used. On the other hand, during normal work, the semiconductor device loader section 1,
Measuring section 2.3, transport rail 4. A semiconductor device unloader section 5 is used.

通常作業と測定精度確認の切り換えは、任意回数指定に
よシ行なうため、通常作業途中でろっても測定精度の確
認がとれる。また搬送ラインが異なるため、基準半導体
装置と通常作業半導体Ift置は混らないものである。
Switching between normal work and measurement accuracy confirmation can be done by specifying an arbitrary number of times, so measurement accuracy can be checked even if there is a problem in the middle of normal work. Furthermore, since the transport lines are different, the reference semiconductor device and the normal work semiconductor device Ift location do not mix with each other.

[発明の効果コ 以上説明した如く本発明によれば、搬送ラインの切9換
えのみで測定精度確認と通常作業がでさるため、大幅な
ロス時間の削減となシ、作業能率全向上することができ
る。また同一の基準半導体装tjlLにより測定精度が
確認でき、正確な判断が行なえるものである。
[Effects of the Invention] As explained above, according to the present invention, measurement accuracy can be checked and normal work can be carried out just by switching the conveyor line, thereby significantly reducing lost time and completely improving work efficiency. Can be done. Furthermore, measurement accuracy can be confirmed using the same reference semiconductor device tjlL, and accurate judgment can be made.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の構成図、第2図は従来のテ
ストハンドリングを説明するための構成図である。 1・・・半導体装置ローダ部、2.3・・・半導体装置
測定部、4・・・半導体装置搬送用レール、5・・・半
導体装置アンローブ部、6・・・基準半導体装置収納部
FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram for explaining conventional test handling. DESCRIPTION OF SYMBOLS 1... Semiconductor device loader part, 2.3... Semiconductor device measurement part, 4... Semiconductor device transport rail, 5... Semiconductor device unlobe part, 6... Reference semiconductor device storage part.

Claims (1)

【特許請求の範囲】[Claims] テストハンドリング装置内に、基準となる半導体装置の
収納部を設け、任意回数測定後、基準となる半導体装置
を前記収納部より自動的に取り出し、テストハンドリン
グ装置の搬送ラインに流し、測定部にて測定を行ない、
再度前記収納部へ自動的に納めることを特徴とする半導
体装置の測定装置の測定精度管理方法。
A storage section for the reference semiconductor device is provided in the test handling device, and after measuring an arbitrary number of times, the reference semiconductor device is automatically taken out from the storage section, placed on the transfer line of the test handling device, and placed in the measurement section. take measurements,
A measurement accuracy control method for a semiconductor device measuring device, characterized in that the device is automatically stored in the storage section again.
JP61124202A 1986-05-29 1986-05-29 Control method for measurement accuracy of measuring instrument for semiconductor device Pending JPS62280662A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61124202A JPS62280662A (en) 1986-05-29 1986-05-29 Control method for measurement accuracy of measuring instrument for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61124202A JPS62280662A (en) 1986-05-29 1986-05-29 Control method for measurement accuracy of measuring instrument for semiconductor device

Publications (1)

Publication Number Publication Date
JPS62280662A true JPS62280662A (en) 1987-12-05

Family

ID=14879512

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61124202A Pending JPS62280662A (en) 1986-05-29 1986-05-29 Control method for measurement accuracy of measuring instrument for semiconductor device

Country Status (1)

Country Link
JP (1) JPS62280662A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6350071U (en) * 1986-09-20 1988-04-05
JPH0772202A (en) * 1993-09-03 1995-03-17 Nec Corp Ic handling device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6350071U (en) * 1986-09-20 1988-04-05
JPH0772202A (en) * 1993-09-03 1995-03-17 Nec Corp Ic handling device

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