JPS62275373A - Electronic equipment - Google Patents

Abstract

PURPOSE:To prevent destruction of the contents of a volatile memory in spite of the loading/unloading actions of a memory cartridge, by using the chip enable signals of plural systems to secure connection between the main body of an electronic equipment and a RAM cartridge. CONSTITUTION:A RAM cartridge 11 is provided with a RAM chip 111, a RAM back-up battery 112 which holds the contents of the chip 111 when the cartridge 11 is removed, a power supply separating diode 113 which works when the cartridge 11 is removed, a pull-up resistance 114 which keeps a RAM chip enable signal S5 at '1' to inhibit the writing of data to the chip 111 when the cartridge 11 loaded and unloaded or while the cartridge 11 is removed, and a NOR gate 115 which keeps a chip enable terminal CE1 of the chip 111 at a low level in due period. The gate 115 can give an access to the chip 111 only when all inputs are kept at low levels and therefore functions as an AND circuit to the noise signal.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention [Field of Application in Industry A] The present invention relates to an electronic device in which a storage cartridge is configured to be detachably attached, and in particular to an electronic device in which a storage cartridge using volatile memory is attached or removed. The present invention relates to an electronic device that significantly reduces the possibility that the contents of the memory will be damaged when the device is deactivated.

[Prior Art] In recent years, there has been an increase in the number of devices in which volatile semiconductor memories are configured in the form of cartridges that are removable from the main bodies of devices, and the cartridges can be removed and stored when not in use. However, since conventional electronic devices of this type use a mechanical contact system for the attachment/detachment mechanism, the peripheral driver circuit of the volatile memory becomes unstable due to the contact sliding noise generated when the cartridge is attached or removed. When it did, the contents of memory were often destroyed.

[Problems to be Solved by the Invention] The present invention has been made in view of the above-mentioned drawbacks, and its purpose is to provide a simple structure and a volatile solution, regardless of the operation of attaching and detaching the storage cartridge. An object of the present invention is to provide an electronic device that can prevent memory contents from being destroyed.

[Means for Solving the Problems] In order to solve the above-mentioned problems, the electronic device of the present invention includes a control means for outputting a control signal indicating whether or not data can be accessed to a storage cartridge to be attached or detached; A connection means is provided for connecting control signals from the control means through a plurality of connection terminals.

[Operation] In this configuration, the control means sets the control signal 00 to the negative level in advance, which indicates whether or not data can be accessed to the storage cartridge to be attached or detached. Control signals generated by the control means are supplied to the storage cartridge through a plurality of connection terminals of a detachably configured connection means.

In this way, stable operation of the memory in the storage cartridge is guaranteed by utilizing the fact that sliding noise rarely occurs at the same time on a number of connection terminals.

[Examples] Examples of the present invention will be described in detail below with reference to the accompanying drawings. Figure 1 shows an example of an electronic typewriter (hereinafter referred to as ETW).
FIG. 2 is a detailed block diagram of the ETW printer section. In the figure, 1 is a central processing unit (CPU), which will be described later.
Read program instructions from M2, perform calculations, judgments, etc. necessary for the typewriter function according to them, and display the display 5,
Controls the keyboard 4, printer controller 7, etc. 2 is a read-only memory (ROM), and the CPU
A system program for I to operate, a character code necessary for printing, a dot pattern (character generator CG) corresponding to the character code, a time table necessary for printing and motor operation, etc. are stored. Reference numeral 3 denotes a RAM, which is a read/write memory in which data during command execution by the CPUI, calculation results, character codes entered manually from the keyboard 4, data input from the voltage detector 12, etc., which will be described later, are stored. . 4 is a keyboard, which is an input device for inputting various key data necessary for character printing and sentence 9m'J. Reference numeral 5 denotes a display unit that displays key data entered manually from the keyboard 4, information that the ETW is in operation, and other information necessary for the operator (
messages, symbols, etc.).

7 is a printer controller which, as shown in FIG. 2, includes a pulse motor output latch 70, a carriage motor driver 71, and a vapor feed motor driver 72.
, thermal head output latch 73, thermal head heater driver 74, thermal head up/down output latch 75, thermal head up/down DC motor driver 76, left margin limiter detection human capo door 7, etc. The printer 6 is controlled according to the control signal.

6 is a printer, which includes a carriage control motor 60, a vapor feed control motor 61, a printing machine 111 section 62,
Thermal head up/down DC motor 63, thermal head up/down mechanism 64, thermal head 65,
It consists of a carriage left margin position detection sensor 66, etc., and prints and prints according to instructions from the printer controller 7.
Perform thermal head up/down, vapor feed, etc.

Reference numeral 8 denotes an external cartridge attachment/detachment controller which sets a control signal indicating whether or not data access to the RAM cartridge is possible to a negative level prior to attaching or detaching the external RAM cartridge 11 to or from the ETW main body. Reference numeral 91 denotes a door switch, which is in an ON state while the door cover is opened to install or remove the RAM cartridge 11, and is in an OFF state while it is closed. A connector 10 is fixed to the ETW main body, and connects and supports an external RAM cartridge 11 in a detachable manner.

Reference numeral 11 denotes an external RAM cartridge, which stores input character codes and the like in the same way as RAM 3, and can be freely attached to and removed from the ETW main body. In addition, to prevent the memory contents in the RAM cartridge 11 from being erased even after removal,
A backup battery 112 is built-in.

Reference numeral 12 denotes a voltage detection circuit, which can detect voltage levels of two systems to be described later. 13 is the power supply circuit, battery 1
From the voltage of 6, two systems of constant voltage are generated: the voltage necessary for logic circuits such as CPUI, ROM2, RAM3, etc., and the mold pressure for thermal heating. The mold pressure for thermal heating can be changed by the print density setting volume 14, and thereby the print density can be adjusted. The voltage for the various motors is supplied directly from the battery. 15 is a power switch. 16 is a battery, which is an operating energy source for this ETW. A timer counter 17 can be loaded with a predetermined value, and counts up or down at certain fixed time intervals. The CPUI reads and writes the contents of the counter 17 as necessary.

Sl is a common bus for CPU 1, and is connected to CPU I and RO.
This is a group of signal lines for transmitting information with M2, RAM 3, printer controller 7, etc. S2 is c
It is an external interrupt signal to put t, and an interrupt is applied to CPU 1 when the level of No. 18 changes from °0'' (LO level) to "t" (Hl level).
This is the temporary stop control f knee 3 (IIALT signal) line of U1, and when this control j output line is "0", the CPU I is operating and the signal is "BI".

It will stop when . S4 is 0N10F of door switch 9
This is a signal line that notifies the cartridge attachment/detachment controller 8 of the F signal. S5 stores the RAM in the RAM cartridge 11 before attaching or removing the RAM cartridge 11.
This is a signal line that controls the chip enable signal. A plurality of signal lines S5 are provided. Alternatively, the connector may have multiple terminals. S6 is a signal line that includes some signals necessary for connecting and operating the RAM cartridge 11 to the main body, among the signal lines of the bus S1. S
7 is a battery voltage line, S8 is a thermal head heat voltage line, and the voltage levels of these voltages are monitored by the voltage detection circuit 12. S9 is a logic power supply voltage line.

FIG. 3 is a detailed circuit diagram showing the inside and peripheral circuits of the CPU 1, RAM cartridge attachment/detachment controller 8, and external RAM cartridge 11 shown in FIG. 1. In the figure, 81 is a pull-up resistor that maintains the logic level at HIGH level when the contact of the door switch 91 is OFF (lid 92 is closed). 82 is a Schmitt circuit for reducing chattering of the door switch 91.

Resistor 83 and capacitor 84 together with the input threshold of NAND gate 85 form a CR circuit for signal delay. 86 is a RAM cartridge 11.

This is a drive transistor for the RAM chip enable terminal. In this embodiment, a plurality of drive transistors and their output lines are used to ensure reliability of control. 87 is an output port, which outputs logic levels of "0" and '1" under the control of the CPUI. 88 is an AND
It is a gate.

As shown in FIG. 3, the RAM cartridge 11 has a structure in which it cannot be installed or removed without first opening the door cover 92 of the cartridge storage section. The door switch 91 is turned on when the door cover 92 is opened, and turned off when the door cover 92 is closed. Therefore, the level of S4 becomes "O" when opened and "1" when closed.
become.

Therefore, when mounting or removing the RAM cartridge 11, S
Level 4 is always “O”.

The RAM cartridge 11 includes a RAM chip 111 and a RAM backup lithium battery 1 for retaining the contents of the RAM chip 111 when the cartridge is removed.
12, a power isolation diode 113 that operates when the cartridge is removed, and a RAM chip enable signal S5 to prevent data from being written to the RAM chip 111 when the cartridge is installed or removed. During this period, the pull-up resistor 114 is kept at “1” and the chip enable terminal CE of the RAM chip 111 is
It consists of a NOR gate 115 that keeps I at a LOW level (inaccessible state). Here, NOR gate 11
5 makes the RAM chip 111 accessible only when all inputs are at LOW level, so the NOR gate 11
5 functions as an AND circuit for noise signals.

Two of the three inputs of the NOR gate 115 are provided directly from the drive transistor 86 via the connector 10, and the remaining one is the chip enable signal Sl' that the C1PUI controls to access the RAM cartridge 11 and the drive transistor. It is given by the AND output with the signal from 86. , RAM cartridge 11
This is a control line when you do not want to access data even if the terminal is connected and in normal use.

Now, in the tree ETW, when the power switch 15 is turned on, various voltages on the power lines 57 to S9 rise, and the CPU 1 first performs various initialization processes. In the initialization process, for example, the work area in the RAM 3 is cleared, the initial display is displayed on the display 5, the carriage of the printer 6 is moved to the left margin position, and the 8wJ1 thermal head is moved up. When the initialization process is completed, manual input from the keyboard 4 becomes possible, and the CPU displays information on the display 5 based on the key data entered from here, or displays information on the printer 6 through the printer controller 7.
control and print operation.

FIG. 4 is a timing chart of the RAM cartridge attachment/detachment operation, and FIG. 5 is a flowchart showing the control for the RAM cartridge attachment/detachment operation and its operation transition. E
Attachment and detachment of the RAM cartridge 11 to and from the TW is started by opening the door cover 92 (step 5100).

When the door cover 92 is opened, the door switch 91 is turned on, and the level of S4 changes from "1" to "0" (step 5).
IOI), and this changes the level of 52 from MO'' to ``1'', causing an interrupt to the CPUI (step 51).
02). Chattering occurs when the door switch 91 is turned on, but it is eliminated by the Schmitt circuit 82. Even if the interrupts are not removed sufficiently, there is no problem because the CPU 1 performs processing to disable multiple interrupts in the first processing input to the interrupt routine. In the wood ETW, the bus S1 of the CPU 1 is directly connected to the bus of the RAM chip 111 through the connector 10, so even if the RAM chip 111 is not accessed when the RAM cartridge 11 is installed or removed, for example, one cartridge is inserted or removed. There is a possibility that the CPU will run out of control due to sliding noise of the connector terminal due to operation. Therefore, CPU1 is halted (temporarily stopped) during attaching or detaching operation.
There is a need to. In the interrupt routine, cput first performs processing for this purpose (halt preprocessing). For example, if the printer is in operation, stop the printer, and RAM chip 1
11 is currently being accessed, the access is stopped (step 5103). Next, change the output of the output boat 87 from 0' to 1.
Then, the AND circuit 88 changes the level of S3 from "ON" to "1", and the CPU enters the halt mode (step 5104). Bus S in halt mode
1 is in a high impedance state. door switch 91
The series of interrupt routine processing time to from when the CPU 1 is turned on until the CPU 1 enters the halt mode is on the order of several ms, which is a time that can be ignored compared to human sensations and operations.

On the other hand, the level of S5 is determined by the action of the CR delay circuits 83 to 85, as shown in FIG.
After reaching N, it changes from "O" to "1" with a delay of tz (this time can also be ignored compared to human sensory movements), and the CEI input of the RAM chip 111 is inactive (IQ (LO level)). be made into That is, access to the RAM chip 111 is blocked (step 5105).
. In this case, since it is set so that t 1 > t o, the RA
Access to the M chip 111 is not prohibited. Next, the RAM cartridge 11 is manually moved or removed (step S106).

At this time, sliding noise is generated at the contacts of the connector 10. Looking at the contact status of the connector 10 at this point, we see that the CPU
I is in a halt state, all transistors 86 are turned off, and the three inputs of the NOR gate 115 are pulled up by the resistor 114. Therefore, the logic level of inputs other than these three manual inputs becomes unstable due to the sliding noise of the connector contacts. Furthermore, even when the NOR gate 115 is operated by three people, if the sliding noise is large, its output may become active. However, no matter how irregular the characteristics of this sliding noise, it is usually impossible for three people to be active at the same time and for a sufficient period of time for the RAM chip 111 to be accessed.
By calculating the logical product of the three human forces for the sliding noise,
When the RAM cartridge 11 and the connector 10 are attached and detached, the contents of the RAM chip 111 are not destroyed by the sliding noise of the connector contacts.

Now, when this attaching or detaching operation is completed and the door cover 92 of the cartridge storage section is closed (step 5107),
The door switch 91 is turned OFF and the level of S4 is “0”.
” becomes “1”, and this causes S2.S3.S
The level of 5 changes from "1" to 0", and at the same time the halt mode of the CPUI is released, access to the RAM chip 111 becomes possible. After this, the CPUI changes the output of the output port 87 from "1" to "0". It is returned to "0" and the interrupt routine ends (step 5IO8).

In this embodiment, the start of the mounting operation or rib removal of the RAM cartridge 11 was predicted by detecting the open/closed state of the door cover 92. However, there are other cases in which, for example, the CPUI requests the operator to replace the RAM cartridge 11 depending on the process. In such a case, even if there is no switch means for detecting the opening/closing state of the door cover 92, it is possible to predict in advance the start of the attachment/detachment operation of the RAM cartridge 11.

Therefore, the present invention can be easily applied to such cases as well.

[Effects of the Invention] As described above, according to the present invention, the main body of the device and the RAM cartridge are connected using multiple chip enable signals, so even if the RAM cartridge is roughly installed and removed, the contents of the RAM in the cartridge will not be destroyed. do not have.

[Brief explanation of drawings]

Fig. 1 is a block diagram of an electronic typewriter according to an embodiment, to which a RAM cartridge is applied. Fig. 2 is a detailed block diagram of an ETW printer section. Fig. 3 is a block diagram of the electronic typewriter shown in Fig. 1 and a RAM cartridge. A detailed circuit diagram showing the internal and peripheral circuits of the attachment/detachment controller 8 and the external RAM cartridge 11, FIG. 4 is a timing chart of the RAM cartridge attachment/detachment operation, and FIG. 5 is the control for the FLAM cartridge attachment/detachment operation and its operation transition. It is a flowchart which shows. In the figure, 1...CPU, 2...ROM, 3...RAM. 4... Keyboard, 5... Display, 6... Printer, 7... Printer controller, 8... Detachable controller, 91... Door switch, 10... Connector, 11... RAM cartridge, 12... voltage detection circuit, 13... power supply circuit, 15... power switch, 16... battery.

Claims (2)

[Claims] (1) In an electronic device in which a storage cartridge is configured to be detachably attached, a control means outputs a control signal indicating whether or not data can be accessed to the storage cartridge to be attached or detached, and a plurality of control signals from the control means are output. An electronic device characterized by comprising a connecting means for connecting through a connecting terminal. (2) A door case that is opened before attaching or removing a storage cartridge, and a detection means that detects the open state of the door case, and the control means is activated when the detection means detects the open state of the door case. 2. The electronic device according to claim 1, wherein the control signal for indicating whether or not data access is allowed is set to a no level.