JPS62273609A - Magnetic head circuit - Google Patents

Abstract

PURPOSE:To improve the amplitude margin of a write current by providing a means adjusting the amplitude of an input signal of one transistor (TR) pairs proportional to a head current to the pre-stage of a write circuit whose 1st and 2nd TR pairs are connected with the magnetic head. CONSTITUTION:Emitters of TRs Q21, Q22 are connected to a constant current source CC0, the same bias Vc is applied and the current is branched to give much power to the TR Q21. Resistors R1, R2 are provided between TRs Q1, Q2 whose emitters are connected in common and the power supply voltage Vcc to form a differential amplifier PA and write signals (d), the inverse of (d) are fed to the base of a write amplifier WA. A differential output is level-shifted, and fed to bases of TRs Q13, Q14 at the lower stage of a write amplifier WA and a level difference with the lower- stage is given to write control signals D, the inverse of D of the upper stage. In decreasing the current of the TR Q21 to reduce the current of a load L, the current of the TR Q22 is decreased, the switch speed of the TRs Q11, Q12 is increased and the speed of the TRs Q13, Q14 is increased, the switch speed of the upper/lower component pair is made constant regardless of the amplitude of the passing current of the WA, no distortion is caused to the current flowing to the head, no deterioration exists in the write characteristic and the write amplitude margin is also improved.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a technology that is particularly effective when applied to semiconductor integrated circuit technology and further to magnetic head circuits.

For example, the present invention relates to a technique that is effective when used in the configuration of a head drive section of a semiconductor integrated circuit for recording and reproducing in a magnetic disk device.

[Prior Art] Fig. 3 shows a write amplifier for writing that constitutes the head drive of a recording/reproducing IC (semiconductor integrated circuit) in a magnetic storage device such as a hard disk driver or a floppy disk driver, particularly in a magnetic disk device. It is shown. That is, the write amplifier WA is a read/write terminal A to which a power supply voltage Vcc and an inductance load are connected.

Bipolar transistors Q i i f Q 12 are connected in pairs between terminals A, B and constant current source CC3, and transistors a+Qt* are connected in pairs between terminals A and B and constant current source CC3. including. and.

An inductance load constituting a magnetic head such as a thin film head is externally connected between the terminals A and B. Complementary write data signals D and d, d are applied to the base terminals of transistor pairs +Q1□ and Q i ) t Q x 4, respectively. Signals d and d are signals obtained by level-shifting D. As a result, when the write data signal changes, the transistor, Ql,
, Q, and Ql4 are switched in a complementary manner to change the direction of the current in flowing to the head, and data is written to the magnetic disk by the reversal of the magnetic field at this time.

An example of an invention related to a circuit for a magnetic head is Japanese Patent Application No. 1983-95498.

[Problems to be Solved by the Invention] The magnitude of the inductance load of a magnetic head connected to a recording/reproducing IC is not constant and varies depending on the type of head. Furthermore, in conventional recording and reproducing ICs, the constant current source cc0 of the write amplifier WA is configured with an external circuit, so that the magnitude of the current flowing to the write amplifier WA can be changed according to the head. .

Here, the input signals of transistor 1□ and Q unit 2 are shown.

If the amplitude of D is VEI and the head inductance is L), the change in current 1H (i') is din/dt=Ve/
It is represented by LH. This means first order.

In other words, the current i flowing through the load depends on the type of head.
When the magnitude of H changes, the upper stage transistor Q,
The switching speed of 1□ changes, specifically, when the current iH becomes smaller (however, Va is constant), the switching time becomes shorter. However, the lower transistor Q
131 Ql4 is a current switch circuit connected to a common constant current source CC0, and a transistor Ql4 is a current switch circuit connected to a common constant current source CC0.
The input voltages d and d of i 3 and Q 14 are constant amplitude signals generated inside the IC. Therefore, the switching speed of the lower stage transistors Q x 3 and Q l 4 is substantially constant regardless of the magnitude of the current flowing through the head.

As a result, when the magnitude of the current flowing through the load L (head) changes, the upper stage transistor Q□0. Switching speed of QU2 and lower stage transistor Q□.

When there is a deviation in the switching speed of Q14 and the current iH and inductance LH are large, the write current is normal as shown in Figure 4 (B), but when the current io and inductance Lo become small, the write current is normal as shown in Figure 4 (C). The present inventors have revealed that there is a problem that distortion occurs in the current waveform as shown in FIG.

That is, for example, when D and d change from low level to high level, and conversely when D and d change from high level to low level, the change in current iH is as follows. Transistors Q8□ and Q12 are changed from an off state to an on state, and from an on state to an off state, respectively, at a relatively early timing by decreasing the value of at least one of L and io. Transistoro x
During such a transition period when mQ12 is on and off,
Transistors Q, , Q□, are still turned on and off. In other words, there is a period in which the transistors in the cross relationship and Q14 are not in the on state at the same time. This creates a condition in which the change in iH is interrupted. As a result, distortion as shown in FIG. 4(C) appears.

An object of the present invention is to prevent current distortion from occurring even if the inductance of a magnetic head connected to a magnetic head circuit or the current flowing therein differs, thereby preventing deterioration of write characteristics, and It is an object of the present invention to provide a write circuit for a magnetic head that can also improve the amplitude margin of the magnetic head.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means for Solving the Problems] Representative inventions disclosed in this application will be summarized as follows.

That is, focusing on the fact that the switching speed of the transistor pair that constitutes the light amplifier is proportional to the amplitude of the input signal, we have developed a current means for passing a current proportional to the current flowing through the light amplifier, and this current means. A differential amplifier circuit with a constant current source is provided in front of the write amplifier, and the amplitude of the write control signal supplied to the write amplifier is changed according to the magnitude of the current flowing through the write amplifier. It is something.

[Operation] According to the above-mentioned means, when the current flowing through the light amplifier becomes smaller, the amplitude of the input signal of the light amplifier is reduced, thereby speeding up the switching of the lower stage transistor pair or increasing the switching speed of the upper stage transistor pair. By slowing down the switching speed and keeping the switching speed of the upper and lower transistor pairs approximately constant regardless of the magnitude of the current flowing through the write amplifier, the current flowing through the head is prevented from being distorted. Thus, the above-mentioned objectives of preventing deterioration of write characteristics and improving the amplitude margin of write current can be achieved.

C Embodiment FIG. 1 shows an embodiment of a magnetic head circuit according to the present invention.

The circuit of this embodiment is formed on a silicon single crystal semiconductor substrate by known monolithic integrated circuit technology.

The write amplifier WA as a write circuit in this embodiment is as follows:
It has the same configuration as the write amplifier in the conventional magnetic head circuit shown in FIG. That is, the write amplifier WA includes a pair of transistors QiL*Qlm connected between a pair of read/write peripheral terminals A and B to which a power supply voltage Vcc and an inductance load are connected, and the read/write terminals A and B. For example, a transistor pair Q, connected between the external constant current source cc,
Q engineering.

It is composed of. Then, the transistor pair QLl and QL2 are switched in a complementary manner by an input signal D, and the transistor pairs Q, . . . By operating it, the inductance load on the head is bridge-driven. This allows writing on a magnetic disk or the like to be performed by changing the direction of the current flowing through the head and reversing the magnetic field.

In this embodiment, the transistor Q is connected between the external constant current source CC0 and the common emitter terminal of the transistor Q x3p Q14. is connected, and a shunt transistor Q, 2 is provided in parallel with this transistor 2. The emitter terminals of the transistors Q21 and Q2□ are each connected to a constant current source CC0, and the same bias voltage Vc is applied to the base terminals.

As a result, a current is passed through the transistors Q21 and Q2x such that the constant current I0 is divided at a ratio corresponding to the ratio of the element dimensions. In other words, the current flowing through the constant current source CC0 is divided by the transistors Q21 and Q22.

In this embodiment, the transistor Q on the write amplifier WA side
The size ratio is determined so that a larger amount of current is allowed to flow during t t.

The current shunted by the transistor Q2□ is made to flow through a differential amplifier circuit PA as a preamplifier provided at the front stage of the write amplifier WA.

That is, a differential amplifier circuit PA is constructed by the transistors Q□l Q2 whose emitters are commonly connected to each other, and the resistors R and R2 connected between the collector terminals of the transistors Q, , Q, and the power supply voltage terminal VCC, respectively. is configured,
A write signal d is applied to the base terminals of transistors Q1 and Q2.
d is applied.

Further, a signal d j is obtained by level-shifting the differential output of the differential amplifier circuit PA at a level shift stage LS.

' is applied to the base terminal of the lower transistor transistor 3tQi4 of the write amplifier WA. The level shift stage LS is for providing an appropriate level difference to the lower stage control signal with respect to the upper stage write control signal D of the write amplifier WA.

In the circuit of the above embodiment, when the current flowing to the load by the constant current source CC0, that is, the current flowing to the transistor Q2□, is reduced, the current flowing to the differential amplifier circuit PA by the transistor Q2□ also decreases. tend to be smaller. Therefore, the amount of voltage drop across the collector resistor R11R2 of the transistors Q, Q2 decreases, and the write control signal d applied to the base terminal of the lower stage transistor Q31Q14 forming the write amplifier WA.
F.

The amplitude of d'' becomes smaller.As mentioned above, when the current flowing through the load becomes smaller, the upper stage transistor Q1□,
The switching speed of Q becomes faster, but as mentioned above, when the amplitude of the control signals d'', d' applied to the base terminals of lower stage transistors Q□ and Q becomes smaller, the switching speed of transistors Q13゜Ql , the switching speed is also faster.

In the conventional light amplifier shown in FIG.

When the write current iH becomes smaller, the upper stage transistor Q
Only the switching speeds of 2□ and Ql2 became faster, resulting in an imbalance between the switching speeds of the upper and lower stages. According to this embodiment, as the write current becomes smaller, the upper stage transistor Q L L + Q
If the switching speed of l2 becomes faster, the lower transistor QeLIQL! As the amplitude of the write control signal supplied thereto becomes smaller, the switching speed of each becomes faster. As a result, even if the write current changes, the switching speeds of the upper and lower stages of the write amplifier are kept balanced, and distortions as shown in FIG. 4(C) do not occur in the current waveform.

FIG. 2 shows a second embodiment of the magnetic head circuit according to the present invention.

Similar to the first embodiment, this embodiment uses a transistor Q211Q22 for shunting current I0 of constant current source CC0.
In addition, a differential amplifier circuit PA is provided before the write amplifier WA. The difference from the first embodiment is that the upper stage transistor pair Q transistor 0.0. Q1
The point is that the control signal for □ is provided from the differential amplifier circuit PA. Also, the upper stage transistor Q
1t t Q Write control signal DI, 10'' for 12.

Since it is formed based on (2), the level shift stage LS between the differential amplifier circuit PA and the write amplifier WA is also unnecessary.

In this embodiment as well, when the current flowing through the load of the write amplifier WA is reduced, the current flowing through the differential amplifier circuit PA is reduced, and the transistor output x+Qhz
The amplitude of the control signals D' and D'' applied to the base terminals of the write amplifier is reduced.As the amplitude of the base voltage of the transistors Q11 + Q12 of the upper stage of the light amplifier becomes smaller, the voltage of the base voltage of the transistors of the lower stage is reduced. 3fQ Yu,
On the contrary, it acts to slow down the switching speed.

As a result, even if the current flowing through the load is reduced and the switching time is shortened, the amplitude of the base voltage (Va)
is made small and the switching speed is slowed down, so the overall switching time of the upper stage transistors Q□□ and Q□2 remains approximately constant regardless of the magnitude of the write current. On the other hand, the switching time of the lower transistor transistor 31Qi4 is constant regardless of the magnitude of the current. Therefore, the switching time of the upper and lower transistor pairs of the light amplifier is maintained in balance.
Distortion of the current waveform is prevented.

In the above embodiment, it has been explained that the constant current source cc0 is configured as an external circuit, but the present invention is not limited to this.
It may be formed on the same semiconductor substrate as the write amplifier WA. Also, in that case.

Shunt transistor Q21. Instead of Q2□, a transistor connected in a current mirror with a constant current transistor may be provided to cause a current proportional to the write current flowing through the write amplifier WA to flow through the differential amplifier circuit PA.

As explained above, this embodiment focuses on the fact that the switching speed of the transistor pair constituting the write amplifier is proportional to the amplitude of the input signal.

A current means for passing a current proportional to the current flowing through the write amplifier and a differential amplifier circuit using this current means as a constant current source are provided in the front stage of the write amplifier, and write control is provided to the write amplifier. Since the amplitude of the signal is changed according to the magnitude of the current flowing through the light amplifier, when the current flowing through the light amplifier becomes smaller, the amplitude of the input signal of the light amplifier is reduced, and this causes the lower stage transistor to change. The switching speed of the pair of transistors in the upper stage and the lower stage is made almost constant regardless of the magnitude of the current flowing through the light amplifier, by either increasing the switching speed of the transistor pair in the upper stage or slowing down the switching speed of the transistor pair in the upper stage. This prevents distortion from occurring in the current flowing through the head, thereby preventing deterioration of write characteristics and improving the amplitude margin of the write current.

Although the invention made by the present inventor has been specifically explained above based on examples, it goes without saying that the present invention is not limited to the above-mentioned examples, and can be modified in various ways without departing from the gist thereof. For example, in the above embodiment, the amplitude adjustment means is configured by the current branching transistor and the differential amplifier circuit PA, but the amplitude adjustment means adjusts the input signal according to the current flowing through the write amplifier WA. D
Alternatively, any configuration can be used as long as the amplitudes of d and d can be changed.

In the above description, the invention made by the present inventor was mainly applied to a magnetic head circuit in a recording/reproducing IC in a magnetic disk device, which is the field of application in which the invention was made, but the present invention is not limited thereto. It can also be used in a magnetic head drive circuit of a magnetic tape device.

[Effects of the Invention] The effects obtained by typical inventions disclosed in this application are briefly explained below.

That is, it becomes possible to prevent distortion in the write current, prevent deterioration of the write characteristics, and improve the amplitude margin.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of a magnetic head circuit according to the present invention. FIG. 2 is a circuit diagram showing a second embodiment of the magnetic head circuit according to the present invention. Figure 3 is a circuit diagram showing a typical configuration example of a write amplifier in a magnetic head circuit. FIG. 3 is a waveform diagram showing differences in current waveforms due to differences in power. WA...Writing circuit (write amplifier), PA...
・Differential amplifier circuit, CC, ~CC7...constant current source, Q
1□tQmz...First transistor pair Q...
Q8. ...Second transistor pair, Q2□, Q□2・
...Current branching means (shunting transistor). Figure 1 Figure 2

Claims (1)

[Claims] 1. A pair of connection terminals to which a magnetic head constituting an inductance load is connected; A write circuit comprising a first pair of transistors and a second pair of transistors connected to connection terminals, and a pair of transistors connected to the first pair of transistors at a stage preceding the write circuit in proportion to the magnitude of the current flowing through the magnetic head. Alternatively, a circuit for a magnetic head, comprising amplitude adjusting means for changing the amplitude of an input signal to the second transistor pair. 2. The amplitude adjustment means is constituted by a current branching means for branching a part of the current flowing through the writing circuit, and a differential amplifier circuit driven by the current branched by the current branching means. Claim 1 characterized by
The magnetic head circuit described in .