JPS62267815A - Data protecting method - Google Patents

Abstract

PURPOSE:To prevent occurrence of data errors when a package hot line is inserted by stopping the output delivered from a package for a period during which the supply of power is stabilized to the package when said hot line is inserted. CONSTITUTION:A data protecting circuit consists of a voltage detecting circuit 1 and a signal line output stop switch circuit 2 and clamps the base input of an open collector transistor TRQ6 of inverter circuits 3 and 4 at a low level for a prescribed time in an insertion mode of the hot line of a package containing those circuits 1-4. Thus the output of the TRQ6 is stopped (set at a high impedance). The wired OR logic is secured between the output lines of open collectors of both circuits 3 and 4 and those of the inverter circuits of the package and outputted to a signal line.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a data protection method, and in particular, connects a plurality of packages in multiple ways, performs wired-or logic on the output from each package, and outputs it to a signal line. VCr! is a data protection method suitable for avoiding data errors that occur when a package is inserted into a live circuit in electronic circuits. lA.

[Conventional technology J] For example, in an interface circuit installed between a subscriber circuit and a line concentrator in a digital exchange, multiple packages are connected in multiple ways and the output from each package is connected using wired-or logic. Many electronic circuits have been used that have a configuration in which signals are output to signal lines. For example, JP-A-56-
Publication No. 20597 describes a wired-or logic subscriber telephone status detection circuit, and NTT Research Practical Application Report Vol. 31 No. 11 (1982) R Concentration System of Digital Subscriber Line Switching System and Subscriber Circuit J describes a technique for realizing a collection of functions using wired-OR logic in time-division multiplexing.

[Problem that the invention seeks to solve]

In an electronic circuit configured to perform wire-OR logic on the outputs from multiple packages and output a signal Httc, if one of the packages is inserted while it is energized (hereinafter referred to as hot-wire insertion), the hot-wire inserted package Since the power supply inside the package becomes unstable for a predetermined period of time from the time of insertion, there is an inconvenience that an erroneous output is output from the package to the signal line, disturbing the data of other packages.

SUMMARY OF THE INVENTION An object of the present invention is to provide a data protection method that eliminates the drawbacks of the prior art described above and prevents data errors from occurring during hot insertion of a package.

[Means for Solving the Problems] The above object is derived from K, which is to stop the output from the package for the time required until the power supply to the package becomes stable when the package is inserted into a hot line.

[By stopping the output from the package from the time the package is hot-wired until the Rt source stabilizes, the I
Even if an erroneous signal is generated within the package due to E source instability, no erroneous output is output to the signal line. Therefore, the data of other packages will not be disturbed.

[Example] Hereinafter, an example of the present invention will be described with reference to the drawings.
.

FIG. 1 is a block diagram of an electronic circuit equipped with a data protection circuit to which an embodiment of the present invention is applied. The data protection circuit according to this embodiment consists of a voltage detection circuit 1 and a signal line output stop switch circuit 2, and is configured to detect pace input from open collector transistors l of inverter circuits 3 and 4 (inverter circuit 4 is not shown). , when a hot wire is inserted into the package mounted on the voltage detection circuit 1, stop switch circuit 2, inverter circuits 3 and 4, etc., the voltage is turned to a low level for a predetermined period of time,
This is to stop the output of transistor Q6 (put it in a high impedance state). Inverter circuit 3, 4
The output line of the open collector is connected to the output line of the open collector of an inverter circuit in another package (not shown) in a wired-OR logic, and is output to a signal line.

It should be noted that the details of the inverter circuit are not related to the present invention, so a description thereof will be omitted.

The voltage detection circuit 1 has a power supply voltage of vo. If the package is closed, high voltage will be applied to the resistor Q1 when the package is inserted into the hot wire.
And, constant glue Q2. from the time of inserting the package live wire. It is equipped with Q3. Resistors R, , R, R2H that provide the above voltage
, are selected to satisfy the relation.

The signal line output stop switch circuit 2 includes the transistor Q
2. The collector of the transistor Q4 is connected to the pace of the transistor Q6 of the inverter circuit 3, and the collector of the transistor Q5 is connected to the transistor of the inverter circuit 4 (not shown). Q6 base IC
! It is continued.

The operation of the data protection circuit having such a configuration will be explained with reference to FIG.

When the package is hot inserted, 1. The voltage at the power supply terminal rises in steps from ground to VCO. This vo. Upon application of transistor Q2. Q3's best transistor Q
The pace potential of transistor Q4.1 changes as shown by the dotted line in FIG. When Q5 is turned on, the terminals of the transistors Q6 of the inverter circuits 3 and 4 are grounded via the collector emitters of the transistors Q4 and q5. 9.The period of t above is.

Regardless of the input signals to the inverter circuits 3 and 4, their output signals are stopped. When period t passes, transistor Q4. When Q5 is turned off, a voltage corresponding to the input signal is applied to the transistor Q6, and an open collector signal of the active transistor Q6 is output.

The data storage circuit according to this embodiment can take a plurality of outputs from the voltage detection circuit (collectors of Q2 and Q3) as described above. Therefore, the same number of inverter circuits, signal line output stop switch circuits, and voltage detection circuits as the number of outputs can be combined into one IC.

[Effect of the Invention J] According to the present invention, it is possible to eliminate data errors when a package is inserted into a hot wire, and a highly reliable system can be constructed.

[Brief explanation of drawings]

FIG. 1 shows a data protection circuit 't- according to an embodiment of the present invention.
FIG. 2 is a block diagram of the equipped electronic circuit, and a timing chart explaining the operation of the circuit shown in FIG. 1. 190. Voltage detection circuit, signal sparse output stop switch circuit for 2, 3.4...inverter circuit. ;”;',' 7””＞

Claims (1)

[Claims] 1. In an electronic circuit where multiple packages are multi-connected and the output from each package is output to a signal film using wired-or logic, when a package is inserted into a hot line, it takes a long time until the power supply to the package becomes stable. A data protection method characterized by stopping output of the package to the signal line for a required period of time.