JPS62267669A - Signal observing device - Google Patents

Abstract

PURPOSE:To observe a ratio of components of '1' and '0' with high accuracy by bringing a digital 1/10 series signal inputted from the outside, to sampling count at every '1' level and '0' level, and executing a division with a value of a unit time register. CONSTITUTION:The titled device is provided with a '0' level sampling counter 104 and a '1' level sampling counter 103 for bringing a digital 1/10 series signal inputted from an external device, to sampling by an internal clock signal of a signal observing device, dividing circuits 112, 113 for dividing the values of these counters 104, 103 by a count value of a unit time register 107 which has been set in the signal observing device, and display means 114, 115 for comparing and displaying a result of the division. In this way, a ratio of components of '1' and '0' can be derived by bringing the externally input digital 1/10 series signal to sampling count at every '1' level and '0' level, and executing a division with a value of the unit register.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a waveform observation device for observing digital signals.

[Prior art] In this type of signal observation device, 11
The 0 series signal represents the operating status of the device under test, with a "1" level meaning it is in operation and an "O'° level meaning it is stopped. Conventional equipment displays the input digital I10 signal on a cathode ray tube; The signal was visually measured as the time of logic level 1 (111) and logic level "OIT".

[Problems to be Solved by the Invention] The above-described conventional signal observation device has the drawbacks that the observation accuracy cannot be improved because it performs visual observation using an oscilloscope or the like, and that input waveforms cannot be observed for a long period of time.

An object of the present invention is to provide a device that improves observation accuracy.

[Means for Solving the Problems] The present invention includes a "0 99 level sampling counter and a "1" level numbering counter for lengthening a digital I10 serial signal input from an external device using an internal clock signal of a signal observation device. , a circuit for dividing the value of the "OIT level sampling counter" and the value of the "1" level sampling counter by the count value of a unit time register set in the signal observation device, and a display means for displaying the division result as a ratio. This is a signal observation device characterized by having the following.

[Example] Next, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of the present invention.

The serial signal of the device under test is input as an external input digital I10 serial signal 101. The jg I H level of the external input signal 101 is input to the d(1H level sampling counter 103 , and the "0" level is inputted to the "01 level sampling counter 104 through the inverter 102 .

The transmitter 105 generates a square wave of arbitrary time (can be set in 7 ways in 10 times increments from 10 ns to 10 m5) from the switch of this signal observation device, and the square wave is sent to the gate circuit 1.
11 as a clock signal to the counters 103 and 104, and the "'1" level width of the signal 101 is input to the counter 103 and ll01? A counter 104 samples and counts the level width.

On the other hand, the unit time register 107 sets the number of clocks for observing the input digital 110 serial signal 101 from the switch of the signal observation device. In other words, if you want to observe the input digital I10 series signal 101 for 30 seconds with the square wave of the oscillator 105 as 10m5, then 30sec/10m.
A value of 5ec=3000 is manually set in the unit time register 107.

The square wave from the oscillator 105 is counted by a counter 106 and compared with the value of the unit time counter 107 by a comparator circuit 108 . Counter 10 by comparison
When the values of B and 107 match, the comparison result holding circuit 1
The square wave of the oscillator 105 held by 09 and input to the circuit 111 is stopped, and the sampling counter 1
03.104 is stopped, and the value of the counter 103 and the value of the counter 104 are each divided by the value of the counter 107. These divisions are performed by 1411# level division circuit 11
2. This is performed in the OTt level division circuit 113 and the results are displayed as a ratio on the ll 1 IT level display 114 and the OIT level display 115, respectively. Also start switch 1
10 is input to reset the counter 106 and the comparison result holding circuit 109, and the reset is canceled at the start of observation.

[Effects of the Invention] As explained above, according to the present invention, the external input digital I10 serial signal is sampled and counted at each "1" level and "Ott level," and "iZl" is calculated by dividing the value by the value of the unit time register. "It has the effect of being able to determine the OT+acid component ratio.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention. 101... Input digital I10 series signal 102...
Inverter 103..."1 level sampling counter 104
..."Ore level sampling counter 105...
- Transmitter 106... Counter 107... Unit time counter 108... Comparison circuit 109... Comparison result holding circuit 110... Start switch 111... Gate circuit 112... Lebel division circuit 113. ...O level division circuit 114...Level display 115...○ level display

Claims (1)

[Claims] (1) In a signal observation device that handles digital signals, a “0” level sampling counter and a “1” level sampling counter that sample a 1/0 series signal input from an external device using an internal clock signal of the signal observation device; “0” level sampling counter value and “
1. A signal observation device comprising: a circuit that divides the value of a 1” level sampling counter by a count value of a unit time register set in each signal observation device; and display means for displaying the division result as a ratio.