JPS62261068A - Trigger system for digital memory - Google Patents

Abstract

PURPOSE:To stabilize a trigger position, by detecting a gradient of an input signal to perform the operation of writing into a memory when the gradient of the input signal meets a specified requirement. CONSTITUTION:An input signal is latched 8 via an A/D converter 4. An latch output of the circuit 8 is supplied to a latch circuit 10 and a memory 5 and further, to a subtractor 9 as subtracting number while an latch output of the circuit 10 is supplied to the subtractor 9 as number to be subtracted. A subtracted value of the subtractor 9 gives a gradient data at each sampling point of the input signal and compared 7A with a set gradient data of a register 6A. A borrow output of the subtractor 9 is supplied to the comparator 7A through an FF 11. First and second comparison condition setting signals are supplied to the comparator 7A to make a selection on whether the input signal is triggered at the rising or falling thereof according to the first set signal and on whether the gradient data of the input signal is above or below a set gradient data according to the second set signal. An output of the comparator 7A is supplied to the memory 5 as writing start signal thereby enabling stable triggering near the inflection point of a waveform as well.

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to a trigger method that converts an input signal from analog to digital and instructs to start writing converted digital data to a digital memory, and is applicable to a digital storage oscilloscope, etc. It is.

(Background of the Invention) In the conventional trigger method, taking an analog real-time oscilloscope as an example, as shown in Fig. 2, an input signal attenuated by an attenuator 1 is amplified by an amplifier 2 and then supplied to a CRT deflection circuit. . The output of the amplifier 2 was simultaneously supplied to a comparator 3 and compared with a set voltage, and the output of the comparator 3 was used as a trigger signal.

Even if there is no drift in attenuator 1 and amplifier 2, comparator 3 has hysteresis, and this hysteresis may cause the trigger point to shift or if there is noise in the input waveform. There is a problem with the discs shifting.

For this reason, the trigger circuit is equipped with a high frequency rejection function and a low frequency rejection function.

However, it is difficult to apply a trigger to accurately observe low-speed phenomena, and there is a problem in that jitter occurs due to noise and the like. Further, it is difficult to apply a trigger near an inflection point such as a peak of an input signal waveform, and there is a problem in that jitter and loss of synchronization occur due to drift.

On the other hand, as shown in FIG. 3, the conventional trigger method for digital memory converts the output of an amplifier 2 into digital data using an analog/digital converter (referred to as an A/D converter) 4. , and is supplied to the memory 5 as stored data. On the other hand, the output digital data from the A/D converter 4 is constantly compared with the setting data set in the trigger level setting register 6 in the digital comparator 7, and the output of the digital comparator 7 is used as a write start signal to the memory 5. give.

However, when using this method, the reproducibility of the trigger level is good, but the trigger conditions of high frequency exclusion and low frequency exclusion like in the case of the analog method can be set, and when processing low-speed signals, the A/D
There is a problem in that the trigger position may become unstable due to quantization errors in the converter 4, etc.

SUMMARY OF THE INVENTION An object of the present invention is to provide a trigger method for a digital memory that solves the above problems.

(Means for Solving the Problems) In order to solve the above problems, the present invention is configured as follows.

In a memory trigger method that converts an input signal into digital data and instructs to start writing the converted digital data to a digital memory (hereinafter simply referred to as memory), the slope at each sampling point of the input signal is detected. It is determined whether the slope of the input signal thus obtained satisfies a predetermined condition, and when the predetermined condition is met, an instruction is given to start writing the converted digital data to the memory.

(Function) In the present invention configured as described above, the slope at each sampling point of the input signal is detected.

When the slope of each detected sampling point satisfies a predetermined condition, for example, when the slope of each detected sampling point is a rising edge and is larger than a set slope, an instruction is given to start writing the converted digital data to the memory. It turns out.

The instruction to start writing the digital data converted into the memory as described above is given when the slope of the input signal satisfies a predetermined condition. This is equivalent to having an exclusion function. For example, when the slope of the input signal exceeds a predetermined condition, it will not be triggered, which is the same as the high frequency rejection function.

(Example of the invention) Hereinafter, the present invention will be explained by examples.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

In one embodiment of the present invention, the same components as in FIG. 3 are denoted by the same reference numerals.

The digital data converted by the A/D converter 4 is supplied to a latch circuit 8 and latched therein. The latch output of the launch circuit 8 is supplied to the latch circuit 10 and the memory 5
It is supplied as stored data to. Furthermore, the launch output of the latch circuit 8 is supplied to the subtracter 9 as a subtraction number. The launch output of the launch circuit 10 is also supplied to the subtractor 9 as the minuend.

When the next A/D conversion is completed in the A/D converter 4, the latch output of the launch circuit 8 is latched in the latch circuit 1°,
A subtracter 9 subtracts the latch output of the latch circuit 8 from the launch output of the latch circuit 1°. The subtracted value output from the subtracter 9 is slope data at each sampling point of the input signal. The subtracted value from the subtracter 9 is supplied to the digital comparator 7A, and the subtracted value from the subtracter 9 is supplied to the register 6.
Is it larger than the set gradient data set in A?
Compare for less than or equal to.

On the other hand, the borrow output from the subtracter 9 is supplied to the flip-flop 11 constituting the pollo flag, and the flip-flop 11 is sent to the center. The state of flip-flop 11 is supplied to digital comparator 7A and indicates whether the input data is in the rising direction or in the falling direction.

A first comparison condition setting signal for selecting the detection of the output state of the flip-flop 11 and a second comparison condition setting signal for selecting the detection of the slope state are supplied to the digital comparator 7A.

The first comparison condition setting signal selects whether the input signal is triggered at the rising edge or the falling edge. Whether the input signal is rising or falling is detected by determining cent and reset of the flip-flop 11. The second comparison condition setting signal selects whether the slope data of the input signal is greater than, less than, or equal to the set slope data set in the register 6A. Whether the slope data of the input signal is greater than or equal to the slope data set in register 6A can be determined by selecting the case of [subtraction result of subtractor 9 > slope set in register 6A] in comparator 7A. [Subtraction result of subtractor 9]
By selecting the case of [Slope set in register 6A], whether they are equal is determined by [subtraction result of subtractor 9 = register 6A].
The output of the digital comparator 7A is supplied to the memory 5 as a write start signal.

Therefore, (^) when the input signal is rising, (a)
A trigger is applied depending on whether the slope of the input signal is steeper than a set value, (El) gentler than a set value, or (c) equal to a set value, or (B) when the input signal rises. In the case of a downward slope, (a) the slope of the input signal is steeper than the set value, (El) it is gentler than the set value, or (
c) A trigger can be activated based on one of six types of conditions in total, such as whether a trigger is activated depending on whether the value is equal to a set value or not.

Therefore, the trigger conditions for high frequency exclusion and low frequency exclusion in the case of the conventional analog system can be used.

The latch output of the latch circuit 8 written and stored in the memory 5 by the write start signal generated as described above may be converted into an analog display on a CRT or displayed on a floppy disk. Of course, the information may be stored in a computer or the like and then processed by a computer.

It is also possible to combine the above embodiment with a delay function capable of positive or negative delay.

(Effects of the Invention) As explained above, according to the present invention, the slope of an input signal is detected, it is determined whether the slope of the detected input signal is under a certain condition, and when the certain condition is satisfied, a writing operation to the memory is performed. Because this is done, a stable trigger can be applied even near the inflection point of the waveform when capturing a low-speed phenomenon.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. FIGS. 2 and 3 are block diagrams showing conventional examples. 4... A/D converter, 5... Memory, 6A... Register, 7A... Digital comparator, 8 and 10...
...Latch circuit, 9...Subtractor, 11...Flip-flop.

Claims (1)

[Claims] In a digital memory trigger method that converts an input signal into digital data and instructs the digital memory to start writing the converted digital data, the slope at each sampling point of the input signal is detected, and the slope of the detected input signal is A digital memory trigger method that determines whether a predetermined condition exists and instructs to start writing converted digital data to the digital memory when the predetermined condition is met.