JPS62258154A - Data back-up device - Google Patents

Abstract

PURPOSE:To continuously carry out a stable control by retracting data in a microcomputer into a RAM while forbidding the writing in of data into said RAM when the source voltage of said microcomputer has lowered in an engine control device using said microcomputer. CONSTITUTION:When a microcomputer consisting of a CPU 1 and a RAM 2 is normally operated by means of a voltage fed from a constant voltage circuit 3, if the voltage is lowered for some cause or other, the detecting signal 4a of a voltage lowering detecting circuit 4 becomes a low level. As a result, a delay circuit 5 is triggered and, after a certain time has elapsed, a delay signal 5a and a reset signal 6a become low levels. On the other hand, at the starting point of time of the detecting signal 4a accompanying said lowering of the voltage, an interruption NM1 of the highest priority is given to the CPU 1 and required data are retracted into the RAM 2. And, at the same time the CPU 1 is reset due to a reset signal 6a, the RAM 2 is disabled, thereby, preventing the runaway of the CPU 1.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a computer control method when the power supply voltage drops, and in particular to a method for controlling data in a control device using a computer suitable for a control device for an automobile engine. Regarding backup methods.

[Conventional technology]

In order to fully satisfy the demands for energy saving in automobiles and cleaner exhaust gas, comprehensive engine control is required with a high degree of opening.

For this reason, in recent years, engine control devices using microcomputers have become widely adopted.

By the way, in a system using such a microcomputer,
During use, it is inevitable that the program of this microcomputer will run out of control, especially in automobiles, where the power supply conditions are poor.
Due to the significant voltage fluctuations during the II production, the frequency of runaway microcontroller occurrences is also quite high.

Conventionally, engine control devices using automotive microcomputers have traditionally reset the microcomputer to prevent the inevitable occurrence of a change in power supply voltage by resetting the microcomputer until the voltage returns to normal. That's what I was doing.

In addition, in conventional devices, when the power supply voltage fluctuates, the random access memory (hereinafter referred to as "random access memory")

(referred to as RAM).

This is to prevent incorrect data from being written.

However, in the conventional iQU, no consideration was given to protecting the data stored in the RAM when the power supply voltage is restored.

In addition, related devices of this type include:

For example, JP-A-54-112 can be mentioned.

[Problem that the invention seeks to solve]

In the above conventional technology, when the power supply voltage is restored, the RAM
No consideration has been given to the protection of internal data, and for this reason, [aK When the microcomputer runs out of control due to changes in ffi pressure,
There was a problem in that erroneous writing to the RAM when the agw pressure was restored was not detected, and sufficient continuity of engine control could not be obtained.

The present invention addresses the problems of the prior art described above.

The purpose of the present invention is to provide a data backup device that allows sufficient continuity of control in an engine control device using a microcomputer.

[Means for solving problems]

According to the present invention, when the microcomputer is reset due to a drop in the power supply voltage of the microcomputer, predetermined data in the microcomputer is first reset to RA.
It was evacuated to M, and then RA? The problem is solved by prohibiting data writing to A.

[For production]

If there is a risk that the microcomputer may run out of control due to ms voltage fluctuations, data will be saved to RAM in advance, and data will not be written to RAM until the microcomputer starts operating normally. The operation before and after resetting the microcontroller is as follows:
Sufficient continuity is maintained and engine control can be performed smoothly.

〔Example〕

The following is a description of the engine control device according to the present invention.

This will be explained in detail with reference to the illustrated embodiment.

FIG. 1 shows an embodiment of the present invention. In FIG. 1, 1 is a CPU (central processing unit) of an engine control microcomputer, 2 is a RAM, 3 is a constant voltage circuit, 4 is a voltage drop detection circuit, and 5 6 is a delay circuit, 6 is a reset circuit, and 7 is a RAM backup circuit.

The CPU, together with RAM2, constitutes a microcomputer for engine control, which captures the engine operating status from various sensors, creates control codes based on them, and supplies them to various actuators for engine control to control the engine appropriately. Execute control.

The constant voltage circuit 3 takes in a predetermined voltage Ve from the battery that is the ffi source of the automobile, and converts it into a stabilized voltage Vcc.
Plow the output as. Note that this voltage Vcc is C
PU1. It is supplied as a power source for R-4M2 and other circuits, and has a voltage of, for example, 5V.

The voltage drop detection circuit 4 detects the output voltage 3a of the constant voltage circuit 3.
(-Vcc) is input, and the voltage is a predetermined value.

For example, it functions to generate a detection signal 4a which becomes low level when the voltage drops to 4.6V and returns to high level when it returns to a different predetermined value of 1, for example 4.7V.

The delay circuit 5 detects (uses No. 4 4a as input).

The signal falls to the low level after a predetermined first time delay τ1 from the time of falling to the low level, and then generates the delayed signal 5a which rises simultaneously with the detection signal 4a.

The reset circuit 6 receives the input signal 5a.

At the same time, it falls to low level, and then the delay signal 5
It functions to generate a reset signal 6a that rises with a predetermined second time delay τ2 from the rising point of a.

The RAM /< pull-up circuit 7 includes a capacitor inside, is directly connected to the fli'g battery, and is configured so that its output voltage will not be lost in the event of a short-term loss of power supply voltage. RAM2
moves to preserve the data so that it does not disappear.

Next, regarding the moving tie of this embodiment, tie 11 in FIG.
This will be explained using a chart.

Now, the microcomputer consisting of the CPU 1 and RAM 2 is operating normally with the voltage Vcc supplied from the constant voltage circuit 3.
For some reason 1 For example, a sudden change in engine rotation speed f
Assume that this voltage Vcc drops to Vl (=4.6V) at time tz, as shown in FIG. 2 (1) d, due to changes in the load on electrical components such as electric shocks and flashing of automobile lights.

Then, at this point, the voltage drops sideways! The detection signal 4a of 64 falls from high level to low level, and as a result, the delay circuit 5 is triggered, and the
(=200 μs) after the delay signal 5a at time t2
falls, and this causes

Reset (FF1 No. 6a also falls.

On the other hand, the detection signal 4a of the voltage drop detection circuit 4 is as follows.

Since it is also supplied to the NMI input of the CPU 1, the NM process (highest priority interrupt) is applied to this CPTJI at the rising time tz of the detection signal 4A due to a drop in the power supply voltage Vcc, and as a result, The data processing shown in FIG. 3 starts, and at this time, among the data stored in the registers in the CPUI.

Data selected in advance as important, such as engine speed, intake air flow rate, program counter count value, etc., are saved to the RAM 2, and as a result, the first time point t1 given by the delay circuit 5 is saved. During the period from the elapse of the predetermined delay time τl to the time tg, all the predetermined data in the CPU 1 is stored in the RAM 2.
It was evacuated to and safely stored there.

In this way, when time t2 arrives and the delay signal 6a falls,
This signal 6a is connected to the reset input RE of CPtJl and the RA
Since it is supplied to the enable human power EN of M2, CPtJl is reset here.

In addition, RAM2 is disabled (writing and reading prohibited), and as a result +fl! ! ? I! The runaway of the CPUI due to a decrease in the pressure Vcc is suppressed, and this +1r
Writing of erroneous data to RAM 2 in I is also suppressed.

After that, a certain amount of time passes, and the power supply voltage Vcc recovers.
Assuming that this voltage Vcc rises to a predetermined value v2 (=4.7V) at time t3, the detection No. 18 5a rises from a low level to a high level at this time t3. The delay signal 5a also rises accordingly, and as a result, the reset circuit 6 is triggered at this time ts. And this result is 1 time tl! At time t4 after a second predetermined delay time τ2 has elapsed from I, the reset circuit 6
Reset (No. F 6a rises from low level to high level, thereby canceling the reset of CPU L, and at the same time, RAM 2 is enabled and its write/read inhibited state is also canceled. Therefore,
After this time tj, the microcomputer consisting of the CPUI and RAM 2 returns to its normal operating state and enters into the same engine control state as before time t1.

Therefore, according to this embodiment, ? i! The data in R,4M2 is always reliably protected even under the power supply voltage.
'Enough backup'? Can you do 5 things?

At this time, according to this embodiment, the data stored in the RAM 2 is the data immediately before the CPU 1 was reset at time t1, so the engine control continues before the reset. This means that the stability will be maintained at a perfect level and smooth control will continue.

Next, a detailed example of the voltage drop detection circuit 4 and delay circuit 5 in this example will be explained with reference to FIG. 4.

First, the voltage drop detection circuit 4 includes a comparator 40. Zener diode 41, diode 42.43° and resistor 44
~49, a Zener diode 40 and a resistor 44
．． By the constant voltage created at point a by 45,
The comparator 40 monitors the power supply voltage Vcc, and detects 1:
No. 1 4a is output. At this time, the detected voltage vl when falling and the detected voltage v2 when rising
The difference is obtained by providing a hysteresis characteristic using a diode 43 and a resistor 49.

Next, delay time i! 35 is a comparator 50. capacitor 51
, and resistors 52 to 56, and a capacitor 51.
A comparator 50 compares the discharge voltage of an integrating circuit consisting of a resistor 52 and a resistor 52 to obtain 1 at a predetermined delay time.

In addition, other constant voltage circuits 3. As for the reset circuit 6 and the RAM backup circuit 7, any known configuration may be used.

A detailed explanation of these circuits will be omitted.

〔Effect of the invention〕

As explained above, according to the present invention, the problems of the prior art can be fully addressed, data in RAM can always be reliably protected, and it is not affected by fluctuations in power supply voltage, etc. This prevents the microcomputer from running out of control and allows for smooth engine control.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the data backup device according to the present invention, FIG. 2 is a time chart for explaining its operation, FIG. 3 is a flowchart for explaining the operation, and FIG. 4 is for voltage drop detection. FIG. 2 is a circuit diagram showing an example of a circuit and a delay circuit. ■... CPU (Central Processing Unit), 2... RAM (Random Access Memory), 3... Constant voltage circuit, 4... Voltage drop detection circuit, 5... delay circuit, 6...reset circuit,
7...RAM backup circuit・Fig. 2

Claims (3)

[Claims] 1. In a computer-based engine control device equipped with a non-destructive random access memory, there is provided a voltage drop detection circuit that monitors the power supply voltage of the computer, and a voltage drop detection circuit that detects a voltage drop from a point in time that is delayed by a first predetermined period of time. A delay circuit that continuously generates a delayed signal until the voltage is restored; and a reset circuit that continuously generates a reset signal from the time when the delayed signal is generated until a second predetermined time delay from the time when the delayed signal disappears, By supplying the delayed signal to the highest priority interrupt input of the computer, predetermined data among the data existing in the computer at the time the delayed signal is generated is saved to the random access memory, and the reset signal is activated. A data backup device characterized in that it is configured to control resetting of the computer and deactivation of the random access memory by supplying power to the computer and the random access memory. 2. 2. A data backup device according to claim 1, wherein said non-destructive random access memory is comprised of a random access memory with power backup. 3. In claim 1, the predetermined data is data representing the rotational speed of the engine to be controlled;
The data is configured to include at least one of data representing an intake air flow rate and count data of a program counter in the computer.
Backup device.