JPS62256150A - Input and output processing system - Google Patents

Abstract

PURPOSE:To inform the error of an input and output device detected by a central processing unit to a channel processor with less overhead by erecting a prescribed flag in a corresponding sub-channel when an unit having no func tion for resetting the input and output device directly detects the error with respect to the input and output device and performing the resetting and an the error processing of a channel processor. CONSTITUTION:When the lock byte 13 of the sub-channel 12 is not cleared but remains, the central processing unit 1 enforcedly clears the lock byte 13 and changes the contents, thereafter, sets a bit indicating that the abnormality is detected on the sub-channel 12 and enqueues to a queue similarly to the case when an ordinary input and output request is generated in this sub-channel. The channel processor 3 dequeues this queue to start the processing, and when an error condition is recognized, the input and output device 7 corresponding to the sub-channel 12 is selectively reset.

Description

[Detailed Description of the Invention] [Summary] When a unit, such as a central processing unit, that does not have the function of directly resetting a human output device, detects an error regarding the human output device, it sends a predetermined signal to the subchannel corresponding to the input/output device. When a flag is set and the channel processing device recognizes it, it resets the input/output device and performs error processing.

[Industrial application field]

The present invention is applicable to computer systems, particularly large-scale computer systems in which a channel processing unit provided separately from the central processing unit and the central processing unit cooperate to perform input/output processing. Concerning input/output related error handling methods.

[Conventional technology]

Currently, input/output requests issued by programs running on the central processing unit are not executed immediately, but are queued once, and when the appropriate conditions are met, the channel processing unit dequeues them and executes them. The technology that can be transferred has become mainstream. There are various implementation methods as to which unit enqueues and dequeues this input/output request, but if the central processing unit does this, the central processing unit will directly instruct the input/output device to reset. Since there is no path, it becomes necessary to request this processing to the channel processing device when an error occurs.

[Problem to be solved]

In the conventional technology, these processes were performed by the central processing unit directly requesting the channel processing unit through a specially provided hardware interface. However, during processing via this interface, the central processing unit and channel processing unit, which should normally be able to operate asynchronously, must operate synchronously, resulting in a large overhead.

The present invention was created in view of the above points, and is an input/output processing method that enables a central processing unit to notify a channel processing device of an error detected in an input/output device with little overhead. The purpose is to provide a method.

[Means for solving problems]

In summary, the invention is as follows.

According to the present invention, processing requests from the central processing unit-channel processing unit, which should be processed in a part invisible to software, are placed in subchannels provided corresponding to individual input/output devices. This is accomplished by providing a flag indicating that an error condition has occurred, and setting this flag by the central processing unit to notify the channel processing unit of this. The central processing unit detecting the error condition connects this subchannel to the queue of input/output requests described above. At this time, the error occurrence flag mentioned above is also sent. The channel processing device checks this error occurrence flag when dequeuing the queue, and if the error occurrence flag is set, selectively resets the input/output device. If this reset is successful, the channel processor performs a channel control check C for this attendance device.
CC etc. are generated and the subchannel is placed in the 10LE state. Also, if an interrupt occurs for this subchannel even before dequeuing this subchannel, the channel processing unit detects an error occurrence flag, also generates a channel control check CCC, and dequeues this subchannel. ■Make your mouth LIE. An example of an error could be a discrepancy in the contents of a subchannel due to MS ACCESSERROR, etc., but if the central processing unit performs a channel control check only on the subchannel, and the subchannel is not cleared without actually clearing the input/output device. IDLI! If the state is reset, there is a possibility that the subchannel, which should accurately reflect the state of the input/output device, and the actual state of the subchannel device may be inconsistent, so the central processing unit resets the channel processing device. The action of requesting is essential.

FIG. 1 is a diagram showing the configuration of one embodiment of the present invention.

In FIG. 1, 1 is a central processing unit, 2 is a storage controller, 3 is a channel processor, 4 and 5 are channels, 6 is an input/output controller, 7 is an input/output device, 9 is a main storage, l
O indicates a user space that can be used by the OS, etc., and 1) indicates a hardware system area. In Figure 1,
Although only one input/output device 7 is shown in the figure, it goes without saying that a plurality of input/output devices 7 actually exist. A subchannel corresponding to each input/output device 7 exists in the hardware system area 1).

FIG. 2 is a diagram showing an example of the configuration of subchannels in the present invention. In FIG. 2, 12 is a subchannel, 13 is a lock byte, 14 is a subchannel status byte (scsB), bus management information, and 16 is a word indicating the status of this input/output device as seen from the software. 17
18 indicates auxiliary information, and 18 indicates a pointer. Lock byte 13 is for exclusive control. Subchannel status byte 14 indicates the status of the subchannel, ie, the status of the corresponding input/output device. Bus management information 1) 5 is used when selecting a channel bus to use this input/output device. The auxiliary information 17 includes information used by the CC ADDRESS and the channel dynamic conversion mechanism. The pointer 18 points to the subchannel located next to this subchannel 12 in a state where this subchannel 12 is enqueued in various queues.

The input/output request queue has subchannel 12 as an entry.
(queue element), place the pointer of its first subchannel 12 at a predetermined address in the hardware system area 1), and sequentially point to the next subchannel with the pointer.

Now, consider a case where lock byte 13 of subchannel 12 remains uncleared due to an intermittent failure in one of the units. When the central processing unit 1 next tries to refer to this subchannel 12, it will wait for 1.7 seconds, and will eventually detect a timeout. At this time, the central processing unit 1
After forcibly clearing this lock byte 13 and changing its contents accordingly, it also clears the 0th bit (error occurrence bit) of subchannel status byte 14, that is, the abnormality is detected on this subchannel 12. Sets a bit indicating that it has been detected. Furthermore, the central processing unit f enqueues this subchannel in the queue in the same way as when a normal input/output request occurs.

The channel processing device 3 dequeues this queue and starts processing. However, if the dequeued subchannel 1
If the Oth bit of subchannel status by I.2 of 14 is not on, normal input/output processing is started. However, if the Oth bit of subchannel status byte 14 is on at this point, channel processor 3 recognizes an error condition with respect to this subchannel I2, and the I/O device 7 corresponding to this subchannel 12 selectively resets the subchannel 12, and changes the contents of this subchannel 12 according to the case where the channel control check CCC condition is reported from the input/output device 7 side,
Report to software or O8.

Also, this subchannel is not at the top of the input/output request queue, and the channel processing device 3
Even if you do not dequeue 2, input/output device 7 is 1)
Channel processing device 3 that generated the 0 interrupt and detected it
writes this condition into subchannel 12, locks this subchannel 12 to report to O8, and when fetching, this error occurrence bit is also checked, and if this error occurrence bit is on, the channel processing WZ3
processes as if a channel control check CCC condition had been reported from the input/output device 7 and resets the input/output device.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, the process of notifying the channel processing device of an error condition related to an input/output device detected by the central processing unit can be performed with less overhead than in the conventional method. .

[Brief explanation of drawings]

FIG. 1 is a diagram showing the configuration of one embodiment of the present invention, and FIG. 2 is a diagram showing an example of the configuration of subchannels. 1... Central processing unit, 2... Storage control device, 23.
...Channel processing device, 4 and 5...Channel, 6...
・Human output control device, 7... Input/output device, 9...
Main storage device, 10... User space, 1)... Hardware system area, 12... Subchannel, 13
...Lock byte, 14...Subchannel status byte, 15...Path management information, 16...
Word indicating the status of the input/output device, 17... Auxiliary information, 18... Pointer. Patent Applicant: Fujitsu Ltd. Representative Patent Attorney: Yotsube Kyotani So June/) 1 shot! Tsuyui 1$6' Figure 1

Claims (1)

[Claims] A computer in which a unit (3) that has the function of directly resetting the input/output device (7) and a unit (1) that does not have that function cooperate to perform input/output processing.
In the system, when the unit (1) that does not have the reset function detects an error condition related to a certain device (7), both of the units (1) provided corresponding to the device (7) , (3) and is referenced by the unit (3) having the reset function to control the device (7).
), the unit (1) that does not have the reset function records that an error has been detected, and when the unit (3) that has the reset function refers to this information later, the unit (3) that does not have the reset function writes the information that the error has been detected. ) is the device (7
), and at the same time perform error reporting and error recovery processing in accordance with the case where the device (7) generates an error during input/output processing.