JPH0435781B2 - - Google Patents

Description

[Detailed Description of the Invention] [Summary] When a unit such as a central processing unit that does not have a function to directly reset an input/output device detects an error regarding the input/output device, a predetermined flag is set in the subchannel corresponding to the input/output device. When the channel processing device recognizes this, it resets the input/output device and performs error processing.

[Industrial application field]

The present invention is applicable to computer systems, particularly large-scale computer systems in which a channel processing unit provided separately from the central processing unit and the central processing unit cooperate to perform input/output processing. Concerning input/output related error handling methods.

[Conventional technology]

Currently, input/output requests issued by programs running on the central processing unit are not executed immediately, but are queued once, and when the appropriate conditions are met, the channel processing unit dequeues them and executes them. Transfer technology has become mainstream. There are various implementation methods as to which unit enqueues and dequeues this input/output request, but if the central processing unit performs this, the central processing unit must directly instruct the input/output device to reset. Since there is no path, it becomes necessary to request this processing to the channel processing device when an error occurs.

[Problem to be solved]

In conventional technology, these processes were performed by the central processing unit directly requesting the channel processing unit through a specially provided hardware interface. However, during processing via this interface, the central processing unit and the channel processing unit, which should normally be able to operate asynchronously, must operate synchronously, resulting in a large overhead.

The present invention was created in view of the above points, and provides an input/output device that is capable of notifying a channel processing device of an error in an input/output device detected by a central processing unit with little overhead. The purpose is to provide a method.

[Means for solving problems]

In summary, the invention is as follows.

According to the present invention, processing requests from a central processing unit to a channel processing unit, which should be processed in a part invisible to software, are placed in subchannels provided corresponding to individual input/output devices. This is accomplished by providing a flag indicating that an error condition has occurred, and setting this flag by the central processing unit to notify the channel processing unit of this. The central processing unit detecting the error condition connects this subchannel to the I/O request queue. At this time, the aforementioned error occurrence flag is also set. The channel processor checks this error flag when dequeuing the queue, and if the error flag is set, selectively resets the input/output device. If the reset is successful, the channel processing unit generates a channel control check, CCC, etc. for this I/O device and places the subchannel in the IDLE state. Also, if an interrupt occurs for this subchannel even before dequeuing this subchannel, the channel processing unit detects an error occurrence flag, also generates a channel control check CCC, and places this subchannel in the IDLE state. do. An example of an error is MS
There may be a discrepancy in the contents of the subchannel due to ACCESS ERROR, etc., but if the central processing unit performs a channel control check on only the subchannel and puts the subchannel in the IDLE state without actually clearing the input/output device, then
There is a possibility that the subchannel, which should normally accurately reflect the status of the input/output device, and the actual status of the input/output device may be inconsistent, so it is essential for the central processing unit to request the channel processing unit to reset. be.

FIG. 1 is a diagram showing the configuration of one embodiment of the present invention. In FIG. 1, 1 is a central processing unit, 2 is a storage control unit, 3 is a channel processing unit, 4 and 5 are channels, 6 is an input/output control unit, 7 is an input/output device, 9 is a main storage unit, and 10 is a 11 indicates a user space that can be used by an OS, etc., and a hardware/system area. Although only one input/output device 7 is shown in FIG. 1, it goes without saying that a plurality of input/output devices 7 actually exist. A subchannel corresponding to each input/output device 7 exists in the hardware system area 11.

FIG. 2 is a diagram showing an example of the configuration of a subchannel in the present invention. In FIG. 2, 12 is a subchannel, 13 is a lock byte, 14 is a subchannel status byte (SCSB), 15 is path management information, 16 is a word that indicates the status of this input/output device as seen from the software, and 17 is a Supplementary information, 1
8 each indicate a pointer. Lock byte 13 is for exclusive control. Subchannel status byte 14 indicates the status of the subchannel, ie, the status of the corresponding input/output device. The path management information 15 is used when selecting a channel path for which this input/output device should be used. Auxiliary information 17 is
Contains information used by CCWADDRESS and the channel dynamic conversion mechanism. The pointer 18 points to the subchannel located next to this subchannel 12 when this subchannel 12 is enqueued in various queues.

The input/output request queue uses the subchannel 12 as an entry (queue element), places the pointer of the first subchannel 12 at a predetermined address in the hardware system area 11, and points to the next subchannel in order with the above pointer. It is assumed that it is composed of

Currently, due to an intermittent failure in one of the units,
Consider the case where lock byte 13 of subchannel 12 remains uncleared. When the central processing unit 1 next attempts to refer to this subchannel 12, it will wait for a lock and will eventually detect a timeout. At this time, the central processing unit 1 forcibly clears this lock byte 13, changes its contents appropriately, and then clears the 0th bit (error occurrence bit) of the subchannel status byte 14, that is, the error has occurred. A bit is set to indicate that it is detected on subchannel 12.
Furthermore, the central processing unit 1 enqueues this subchannel in the queue in the same way as when a normal input/output request occurs.

The channel processing device 3 dequeues this queue and starts processing. However, if the subchannel status of dequeued subchannel 12
If the 0th bit of byte 14 is not on, normal I/O processing begins. However, if the 0th bit of subchannel status byte 14 is on at this point, channel processing unit 3
recognizes an error condition regarding this subchannel 12, selectively resets the input/output device 7 corresponding to this subchannel 12, and checks the contents of this subchannel 12 when a channel control check CCC condition is reported from the input/output device 7 side. If the software or OS
Report to.

In addition, even if this subchannel is not at the top of the input/output request queue and the channel processing device 3 has not dequeued this subchannel 12, the input/output device 7 generates an I/O interrupt and the channel that detected this When the processing unit 3 writes this condition into the subchannel 12, locks this subchannel 12 to report it to the OS, and fetches it, this error occurrence bit is also checked, and if this error occurrence bit is on, the channel is Processing device 3 is a channel control check
Processing is performed as if a CCC condition had been reported from the input/output device 7, and the input/output device is reset.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, the process of notifying the channel processing device of an error condition related to an input/output device detected by the central processing unit can be performed with less overhead than the conventional method. .

[Brief explanation of drawings]

FIG. 1 is a diagram showing the configuration of one embodiment of the present invention, and FIG.
The figure is a diagram showing an example of the configuration of a subchannel. 1...Central processing unit, 2...Storage control device, 3
... Channel processing device, 4 and 5 ... Channel, 6
...Input/output control device, 7...Input/output device, 9
... Main storage device, 10 ... User space, 11 ...
Hardware system area, 12...Subchannel, 13...Lock byte, 14...Subchannel status byte, 15...Path management information, 16...Word indicating input/output device status, 17...Auxiliary Information, 18...pointer.

Claims (1)

[Claims] 1 In a computer system in which the unit 3 which has the function of directly resetting the input/output device 7 and the unit 1 which does not have that function cooperate to perform input/output processing, the unit without the above-mentioned reset function 1 detects an error condition related to a certain device 7, the unit 3 which is accessible from the above-mentioned both units 1 and 3 provided corresponding to the device 7 and has the above-mentioned reset function resets the error condition of the device 7. When the unit 1 that does not have the reset function records that an error has been detected in the control information table 12 that is referred to for control, and when the unit 3 that has the reset function refers to this information later, the reset function An input/output processing method characterized in that a unit 3 having a device 7 resets the device 7, and at the same time performs error reporting and error recovery processing in accordance with the case where the device 7 generates an error during input/output processing.