JPS62249522A - Output buffer - Google Patents

Abstract

PURPOSE:To immediately change the level of an output line and to attain the rapid operation of a system by adding a pull-up transistor(TR) to be driven by an one-shot pulse to an open drain type buffer. CONSTITUTION:The one-shot pulse generating circuit 102 generates a low level pulse 113 synchronously with the trailing edge of a control signal 101 for an n-channel TR QN 105 and inputs its output 103 to a p-channel TR QP104. At the leading edge 111 of the signal 101, the QN 105 is turned on and its output 106 is turned to a low level. At the trailing edge 112 of the signal 101, the signal 101 is turned to the low level, the QN 105 is turned off and the output 106 tries to keep its low level. Since the pulse 113 is generated on the output 103 of the circuit 102 and the QN 104 is turned on, the output 106 is immediately turned to a high level.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to output buffers, and more particularly to open-drain output buffers for CMOS integrated circuits.

[Conventional technology]

Typically, open drain buffers have a configuration as shown in Figure 2a. Fig. 2a is a circuit diagram showing an example of a conventional open-drain buffer, Fig. 2b is a block diagram showing an example of a general use of an open-drain buffer, and Fig. 2C is an example of use of a conventional open-drain buffer. FIG.

Generally, open-drain type buffers 201 are used by connecting a plurality of them by wire as shown in FIG. In particular, it is necessary to provide a pull-up resistor 212 that pulls the signal line 211 to a high level and maintains the high level when the signal line 211 is turned off.

[Problem that the invention seeks to solve]

In the conventional output buffer described above, if a large value pull-up resistor 212 is used, the second
As shown in the waveform of the signal line 211 shown in Figure C, it takes time to return to a high level after outputting a low level, and sometimes the output of the device itself is taken in as an input, leading to malfunction. Conversely, if you use a pull-up resistor with a small value,
There is a drawback that the current (through current) that flows when outputting a low level increases, leading to a deterioration in the output level or an increase in power consumption. In other words, there are conflicting demands such as reducing the pull-up resistor for high-speed operation, but increasing the pull-up resistor from the point of view of level or power consumption. The situation is close to that of

[Means for solving problems]

The output buffer of the present invention has a one-shot pulse generation circuit that generates a pulse based on a control signal that controls the final-stage transistor on the ground side, and controls the final-stage transistor on the power supply side with the output of the one-shot pulse generation circuit. There is.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1a is a circuit diagram showing an embodiment of the output buffer of the present invention, and FIG. 1b is an operation waveform diagram in FIG. 1a.

In the figure, the one-shot pulse generation circuit 102 has Q
A low-level pulse 113 is generated in synchronization with the fall of the control signal 101 at s105, and the output 103 is input to a P-channel transistor (hereinafter referred to as Qp) 104. Assuming that the control signal 101 changes as shown in FIG. 1b, the QN 105 turns on at the rising edge 111, and its output 106 becomes low level. Next, falling point 11
When the control signal 101 becomes low level at 2, Qs105
is turned off, but the output 106 attempts to maintain low level 3. However, here, the one-shot pulse generation circuit 102
Since a pulse 113 is generated at the output 103 of the Qp 104 and the Qp 104 is turned on, its output 106 quickly shifts to a high level. After pulse 113 occurs, Q p 104 , Q
N 105 are both off, and output 106 only needs to be held high by an external high resistance pull-up.

〔Effect of the invention〕

As explained above, the present invention adds a pull-up transistor that operates with a one-shot pulse to an open-drain buffer, thereby quickly changing the level of the output line to enable high-speed system operation. Since a high resistance is used for up, it has the effect of reducing power consumption.

[Brief explanation of drawings]

Fig. 1a is a circuit diagram showing an embodiment of the output buffer of the present invention, Fig. 1b is an operation waveform diagram in Fig. 1a, Fig. 2a is a circuit diagram showing an example of a conventional open drain type buffer, and Fig. 2b is 2C is a block diagram showing a typical use example of an open-drain buffer, and FIG. 2C is an operation waveform diagram in an example of use of a conventional open-drain buffer. 101... Control signal, 102... One-shot pulse generation circuit, 103.106... Output, 104...
P-channel transistor (Qp >, 105.203
...N-channel transistor (QN), 107...
・Input transistor, 111...Rise time, 112
...Falling point, 113...Pulse, 201...
Open drain type buffer, 211... signal line, 2
12...Pull-up resistor.・Go-＼ 1a Figure 1b Figure z1 Figure 2 Figure

Claims (1)

[Claims] The output buffer of a CMOS integrated circuit has a one-shot pulse generation circuit that generates a pulse based on a control signal that controls the final stage transistor on the ground side, and the output of the one-shot pulse generation circuit controls the final stage transistor on the power supply side. An output buffer characterized by: