JPS6224949B2 - - Google Patents
Info
- Publication number
- JPS6224949B2 JPS6224949B2 JP14821881A JP14821881A JPS6224949B2 JP S6224949 B2 JPS6224949 B2 JP S6224949B2 JP 14821881 A JP14821881 A JP 14821881A JP 14821881 A JP14821881 A JP 14821881A JP S6224949 B2 JPS6224949 B2 JP S6224949B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- voltage
- power semiconductor
- varistor
- ceramic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 29
- 239000000919 ceramic Substances 0.000 claims description 15
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 4
- 239000011787 zinc oxide Substances 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 2
- 230000001629 suppression Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/647—Resistive arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1301—Thyristor
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Thyristors (AREA)
- Protection Of Static Devices (AREA)
- Die Bonding (AREA)
- Thermistors And Varistors (AREA)
Description
【発明の詳細な説明】
本発明はセラミツクバリスター系材料で構成さ
れた容器中に半導体エレメントを収納して成る電
力用半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power semiconductor device comprising a semiconductor element housed in a container made of a ceramic varistor material.
従来、電力用半導体装置としてダイオード、サ
イリスタ、パワートランジスター、ゲートターン
オフサイリスタ（GTO）などが実用されてい
る。これらの素子は高電圧から大電流をスイツチ
ングする機能を有し、かつ、高信頼度を維持する
ため第１図にしめすごとく、半導体エレメント１
（シリコン基板）はセラミツク等の絶縁物円筒２
の中に上下から銅電極３，４で圧接保持され、か
つ、不活性ガス中に密封設置されている。第１図
はサイリスタ、トランジスタ、GTO等の３端子
形半導体装置の構成例であり、ゲート端子等の制
御電極５が絶縁容器２を密封貫通し半導体エレメ
ント１の中心に導かれている。なお、電極３，４
はそれぞれアノード電極（Ａ）とカソード電極
（Ｋ）で知られている。 Conventionally, diodes, thyristors, power transistors, gate turn-off thyristors (GTOs), etc. have been put into practical use as power semiconductor devices. These elements have the function of switching large currents from high voltages, and in order to maintain high reliability, semiconductor elements 1 are used as shown in Figure 1.
(Silicon substrate) is an insulating cylinder 2 made of ceramic etc.
It is held in pressure contact with copper electrodes 3 and 4 from above and below, and is sealed in an inert gas atmosphere. FIG. 1 shows a configuration example of a three-terminal semiconductor device such as a thyristor, a transistor, or a GTO, in which a control electrode 5 such as a gate terminal passes through an insulating container 2 in a sealed manner and is led to the center of a semiconductor element 1. In addition, electrodes 3 and 4
are known as an anode electrode (A) and a cathode electrode (K), respectively.
さて、電力用半導体装置は有限の耐電圧値を有
しており、現状最大の耐電圧はサイリスタで6KV
まで、GTOでは2500V、トランジスタでは400〜
500V程度である。これ以上の電圧が半導体装置
に印加されると、半導体エレメント１は絶縁破壊
して本来の機能を消失し単なる金属導体と化し価
値はなくなる。 Now, power semiconductor devices have a finite withstand voltage value, and the current maximum withstand voltage is 6KV for thyristors.
up to 2500V for GTO and 400V for transistors
It is about 500V. If a voltage higher than this is applied to the semiconductor device, the semiconductor element 1 undergoes dielectric breakdown, loses its original function, becomes a mere metal conductor, and has no value.
それゆえ、半導体装置を過電圧から保護するこ
とは実用上非常に重要な技術であり、種々の方式
が存在するが、代表的な回路構成は第２図に示す
ものである。半導体装置６のアノード端子３とカ
ソード端子４には抵抗７とコンデンサ８の直列回
路から成るサージ抑制回路が並列接続されるのが
普通である。最近では、セラミツク系バリスター
に電圧―電流の非線形特性のすぐれた材料が現わ
れ、バリスター９が半導体装置６と並列に接続さ
れ、バリスター９が有する電圧―電流特性にした
がい半導体装置６を効果的に保護する。特にセラ
ミツク系バリスターには酸化亜鉛形バリスターが
適している。 Therefore, protecting a semiconductor device from overvoltage is a very important technique in practice, and there are various methods, but a typical circuit configuration is shown in FIG. 2. Generally, a surge suppression circuit consisting of a series circuit of a resistor 7 and a capacitor 8 is connected in parallel to the anode terminal 3 and cathode terminal 4 of the semiconductor device 6. Recently, materials with excellent nonlinear voltage-current characteristics have appeared in ceramic varistors.The varistor 9 is connected in parallel with the semiconductor device 6, and the semiconductor device 6 is effectively controlled according to the voltage-current characteristics of the varistor 9. to protect. Zinc oxide type varistors are particularly suitable for ceramic varistors.
セラミツク系バリスター９の電圧電流特性の代
表例を第３図に示している。すなわち、横軸は電
流で縦軸は電圧である。この特性では電流I1
（Ａ）のときの制限電圧はV1（Ｖ）であり、電流
I2（Ａ）の時の制限電圧はV2（Ｖ）と電流が大巾
に増加しても電圧の変化はわずかである。数値的
な一例を示すと、I1＝1mAで、V1＝3KV、I2＝
10000Aで、V2＝4KV等である。 A typical example of the voltage-current characteristics of the ceramic varistor 9 is shown in FIG. That is, the horizontal axis is current and the vertical axis is voltage. In this characteristic, the current I 1
(A), the limiting voltage is V 1 (V), and the current
The limiting voltage when I 2 (A) is V 2 (V), and even if the current increases greatly, the voltage changes only slightly. To give a numerical example, I 1 = 1mA, V 1 = 3KV, I 2 =
At 10000A, V 2 =4KV, etc.
本発明は上記に鑑みてなされたもので、セラミ
ツク系バリスターで容器を構成することによつ
て、サージ抑制回路を内蔵した電力用半導体装置
を提供する。 The present invention has been made in view of the above, and provides a power semiconductor device having a built-in surge suppression circuit by constructing a container using a ceramic varistor.
第４図は本発明にもとずく電力用半導体装置の
構成例を示すものである。すなわち、セラミツク
系絶縁物の円筒状容器１０を第３図に示すような
ｖ―ｉ特性を有するセラミツク系バリスター材料
で構成し、容器１０内に半導体エレメント１を銅
電極３，４で圧接保持する。ゲート電極５は従来
のものと同様に、容器１０を密封貫通し、半導体
エレメントに導かれる。 FIG. 4 shows an example of the configuration of a power semiconductor device based on the present invention. That is, a cylindrical container 10 made of a ceramic insulator is made of a ceramic varistor material having v-i characteristics as shown in FIG. do. The gate electrode 5 passes sealingly through the container 10 and is guided to the semiconductor element in a conventional manner.
本発明にもとづく電力用半導体装置の電気的等
価回路は、従来のものが第２図の破線内に示す構
成であつたのに対し、第５図に示すようにセラミ
ツク系バリスター１０による過電圧保護機能付の
電気回路構成となつている。 The electrical equivalent circuit of the power semiconductor device according to the present invention has an overvoltage protection circuit using a ceramic varistor 10 as shown in FIG. It has a functional electrical circuit configuration.
通常、電力用半導体装置の代表例であるサイリ
スタの場合、第６図に示す電圧―（ｖ）―電流
（ｉ）特性、すなわち、正電圧に対してＯ―Ａ―
Ｂ―Ｃ特性を有し、逆電圧に対してはＯ―Ｄ特性
をもつている。しかるに、セラミツク系バリスタ
ーのｖ―ｉ特性Ｏ―Ｘ、Ｏ―Ｙが加わるため常に
セラミツク系バリスターの電圧―電流特性がサイ
リスターの電圧―電流特性以下となり、サイリス
タは確実に正、逆方向電圧とも過電圧から保護さ
れることになる。 Normally, in the case of a thyristor, which is a typical example of a power semiconductor device, the voltage-(v)-current(i) characteristic shown in FIG. 6, that is, the O-A-
It has B-C characteristics and has O-D characteristics with respect to reverse voltage. However, since the v-i characteristics O-X and O-Y of the ceramic varistor are added, the voltage-current characteristic of the ceramic varistor is always equal to or less than the voltage-current characteristic of the thyristor, and the thyristor reliably maintains the positive and reverse voltages. Both will be protected from overvoltage.
さらに、電力用半導体装置は正常な機能を果す
ために適当な温度以下に保つ必要があり、このた
め通常何らかの冷却が実施される。したがつて、
従来の構成では冷却されるものは電力用半導体装
置のみであつたが、本発明の場合、セラミツク系
バリスター１０も同時に冷却されるためより過電
圧保護特性の優れたバリスターを実現できる。 Additionally, power semiconductor devices must be kept below a suitable temperature in order to function properly, and therefore some cooling is typically implemented. Therefore,
In the conventional configuration, only the power semiconductor device was cooled, but in the case of the present invention, the ceramic varistor 10 is also cooled at the same time, making it possible to realize a varistor with better overvoltage protection characteristics.
さらに、従来電力用半導体装置とバリスターが
別々に設置されていたので、空間的により大きい
スペースを必要としたが、本発明では両者が一体
化されたため、小形、軽量化が図れる。 Furthermore, conventionally, the power semiconductor device and the varistor were installed separately, which required a larger space, but in the present invention, the two are integrated, so the device can be made smaller and lighter.
第１図は従来の電力用半導体装置の断面図、第
２図は第１図を使用した電力用半導体装置の使用
回路を示す構成図、第３図はセラミツク系バリス
ターの電圧―電流特性を示す説明図、第４図は本
発明の一実施例を示す断面図、第５図は第４図の
等価回路を示す構成図、第６図は第４図の電圧―
電流特性を示す説明図である。
図において、１は半導体エレメント、３，４は
電極、１０はセラミツク系バリスターである。な
お各図中同一符号は同一又は相当部分を示す。
Figure 1 is a cross-sectional view of a conventional power semiconductor device, Figure 2 is a configuration diagram showing the circuit used in the power semiconductor device using Figure 1, and Figure 3 shows the voltage-current characteristics of a ceramic varistor. 4 is a sectional view showing an embodiment of the present invention, FIG. 5 is a configuration diagram showing an equivalent circuit of FIG. 4, and FIG. 6 is a diagram showing the voltage of FIG.
FIG. 3 is an explanatory diagram showing current characteristics. In the figure, 1 is a semiconductor element, 3 and 4 are electrodes, and 10 is a ceramic varistor. Note that the same reference numerals in each figure indicate the same or equivalent parts.
Claims (1)
両端部に配置された一対の電極、この両電極間に
電気的に接続され、上記両電極と協働して上記半
導体エレメントを密封したセラミツク系バリスタ
ーからなる容器を備えた電力用半導体装置。 ２ バリスターは酸化亜鉛形であることを特徴と
する特許請求の範囲第１項記載の電力用半導体装
置。[Scope of Claims] 1. A semiconductor element, a pair of electrodes arranged at both ends of the semiconductor element, and a ceramic that is electrically connected between the two electrodes and cooperates with the two electrodes to seal the semiconductor element. A power semiconductor device equipped with a container made of varistors. 2. The power semiconductor device according to claim 1, wherein the varistor is of a zinc oxide type.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56148218A JPS5850764A (en) | 1981-09-19 | 1981-09-19 | Semiconductor device for power supply |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56148218A JPS5850764A (en) | 1981-09-19 | 1981-09-19 | Semiconductor device for power supply |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5850764A JPS5850764A (en) | 1983-03-25 |
| JPS6224949B2 true JPS6224949B2 (en) | 1987-05-30 |
Family
ID=15447912
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56148218A Granted JPS5850764A (en) | 1981-09-19 | 1981-09-19 | Semiconductor device for power supply |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5850764A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0593560U (en) * | 1992-05-13 | 1993-12-21 | 富士ロビン株式会社 | Sorting machine for empty cans |
| JPH0593561U (en) * | 1992-05-13 | 1993-12-21 | 富士ロビン株式会社 | Empty can sorter |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2598820B2 (en) * | 1989-01-18 | 1997-04-09 | 株式会社日本自動車部品総合研究所 | Mounting structure of integrated circuit device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56131951A (en) * | 1980-03-19 | 1981-10-15 | Matsushita Electric Ind Co Ltd | Semiconductor device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4861762U (en) * | 1971-11-15 | 1973-08-06 |
-
1981
- 1981-09-19 JP JP56148218A patent/JPS5850764A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56131951A (en) * | 1980-03-19 | 1981-10-15 | Matsushita Electric Ind Co Ltd | Semiconductor device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0593560U (en) * | 1992-05-13 | 1993-12-21 | 富士ロビン株式会社 | Sorting machine for empty cans |
| JPH0593561U (en) * | 1992-05-13 | 1993-12-21 | 富士ロビン株式会社 | Empty can sorter |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5850764A (en) | 1983-03-25 |
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