JPS62242408A - Voltage control oscillator - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a voltage controlled oscillator (VCO), and more particularly to a complementary metal oxide silicon field effect transistor (
The present invention relates to a voltage controlled oscillator including a CMOS) circuit. Voltage controlled oscillators are widely used in phase locked loop (PLL) circuits.

A voltage controlled oscillator operates to generate an output signal linearly related to a control input voltage. Generally, such operation is accomplished by providing a capacitor that is charged and discharged at a rate proportional to the control voltage. A comparator is provided to switch charging and discharging when the voltage of the capacitor exceeds the first reference voltage and drops below the second reference voltage.

BACKGROUND OF THE INVENTION Voltage controlled oscillators including current sources and current sinks for charging and discharging capacitors are disclosed in U.S. Pat. No. 3,886,408 to Takahashi and U.S. Pat. No. 3.904 to Shiao. , 988, U.S. Pat. No. 4,263.567 to Eistor and U.S. Pat. Although such circuits are generally accepted, they are disadvantageous in that the provision of switching elements in the output current path introduces parasitic resistance and capacitance, thereby slowing down the switching time. For proper operation of vCO, it is preferable to have the current sink or source switch as fast as possible so that the charging rate for the capacitors is uniform. It is not possible to perform such fast switching with prior art circuits that do.

Means for Solving Problem C] The present invention relates to a voltage controlled oscillator with high-speed switching. The voltage controlled oscillator of the present invention can operate at 10 MHz or higher and is therefore suitable for use in the phase locked loop of a hard disk data separator. The circuit includes a reference capacitor that is charged and discharged by an output transistor that acts as a current source or sink. The output transistor is connected to the control transistor in a mirror image manner with a transmission gate that is switched to control operation as a current source or sink. A FET capacitor is connected to the gate of the current mirror transistor for fast switching of the output transistor. This ensures uniform charging and discharging rates of the capacitor, and this uniform charging and discharging ensures accurate oscillator operation.

〔Example〕

The following description relates to the best presently believed mode of carrying out the invention. This description is intended to illustrate the general principles of the invention and is intended to be limiting. The scope of the invention is best determined by reference to the claims.

Referring to FIG. 1, the present invention relates to an oscillator that generates a periodic output signal vCO whose frequency is controlled by the voltage value Vc of an input control signal. The reference capacitor 10 is charged and discharged between two reference voltages under the control of the charging circuit 12. The reference voltage is obtained by a voltage divider network 14, the output of which is applied to a comparator 16 which compares the voltage across the reference capacitor 10 with the reference voltage.

The charge/discharge rate of this circuit is controlled by the input control voltage Vc. This input voltage is converted into a control current by a voltage-to-current converter 18. The voltage-to-current converter consists of an input resistor 20, an operational amplifier 22, a feedback resistor 24, and an output resistor 28. The operating point of the oscillator is determined by an external resistor 30 selected to provide the desired control current level in response to a given input terminal.

Control current Ic is supplied to and drives reference N-type FET transistor 32. Therefore, the value of the reference current flowing through transistor 32 depends on the value of the input control voltage. Transistor 32 is connected to N-type transistor 34 in a current mirror image relationship. Since the gates and sources of these transistors are connected in common, the current flowing through transistor 34 is
It has a mirror image relationship with the current flowing through 2. The current flowing through transistor 34 also flows through PW transistor 36, whose drain and gate are connected to the drain of transistor 34 and whose source is connected to current Vcc. A current flows.The value of this current is the transistor 32.
determined by the value of the reference current flowing through it.

The gates of transistors 34 and 36 are coupled through transmission gates 42 and 44, respectively, to the gates of output transistors 38 and 40, with the source of transistor 38 being grounded and the source of transistor 40 being connected to a power supply. The drains of these transistors are connected to each other and to one end of a reference capacitor 10.

Accordingly, transistor 38 is coupled in a current mirror image relationship to transistor 34, and transistor 40 is coupled in a current mirror image relationship to transistor 36.

Transistors 38 and 40 are alternately switched on and off to control the charging and discharging of reference capacitor 10. To charge capacitor 10, transmission gate 44 is closed to couple transistor 36 to transistor 40. This turns on transistor 40, causing current to flow through it and charging reference capacitor 10. When charging is completed, transmission gate 4
4 is opened, transmission gate 46 is closed and transistor 40 is turned off.

To ensure accurate and fast switching of transistor 40,
A FET capacitor 48 is connected to the gate of transistor 36. This capacitor stores charge and provides sufficient instantaneous current to quickly switch transistor 40 into conduction.

In the preferred embodiment of the invention, capacitor 48 has a value of approximately 30 picofarads and is biased with a voltage of 3.5 volts between the gate and source. Transistor 40 is approximately ten times the size of transistor 36, and the current flowing through it is proportional to the current flowing through transistor 36 and directly related to the relative sizes of the transistors.

Therefore, a current proportional to the control input voltage flows through the transistor 3.
6, transistor 40 quickly switches to a conductive state when transmission gate 44 is closed. The current flowing through transistor 40 therefore steps to a level proportional to the control input voltage. This current level determines the charge level of capacitor 10.

Transistor 40 operates as a 7d current source and transistor 38 operates as a current sink to discharge reference capacitor 10. Transistor 38 is rendered conductive by closing transmission gate 42 to interconnect the gate of transistor 38 to the gate of transistor 34. The size of transistor 38 is approximately ten times the size of transistor 34, and the current through transistor 38 is proportional to the current through transistor 34. A MOS capacitor 50 is also provided so that sufficient instantaneous current is available to quickly switch transistor 38 into conduction. One end of capacitor 50 is connected to a power supply to bias capacitor 50 for proper operation of the MOS capacitor. The value of capacitor 50 is the same as the value of capacitor 48. That is, in an embodiment of the invention, about 30 picofarads.

Another transmission gate 52 is provided to ground the gate of transistor 38 and switch it off.

5 interconnected transistors 54°56.58
．． A voltage divider consisting of 60 and 62 provides high and low reference voltages (3 volts and 2 volts in this embodiment of the invention). By suitably controlling the two transmission gates 64 and 66, one of the two reference voltages is available at the inverting input of the comparator 16. These transmission gates are alternately switched and are provided with MOS capacitors 68 and 50 to accommodate rapid changes in the value of the reference voltage applied to comparator 16.

The operation of the voltage controlled oscillator shown in FIG. 1 will be explained with reference to the timing diagram shown in FIG. Initially, transmission gate 64 is closed and transmission gate 66 is opened, so that the reference voltage applied to the inverting input of comparator 'a16 is 3 volts, as shown in FIG. 2A. Transistor 40 is turned on and the current through it is of a positive value, the magnitude of which is determined by the value of the input control voltage. The capacitor is therefore charged at a constant rate determined by the magnitude of the current flowing through transistor 40, as shown in FIG. 2D.

When the voltage on capacitor 10 reaches 3 volts, comparator 1
The output of 6 changes state (Figure 2F).

This output is applied to the first inverter 72 to generate the VCO output. Inverter 74 provides a complementary signal to this output. These output signals are transmitted to the transmission gate 42,
44.46, 52.64 and 66 are obtained. The reversal of the output signal causes transmission gate 44 to open and transmission gate 46 to close, thus turning transistor 40 off.

At the same time, the transmission gate 42 is closed and the transmission gate 52 is closed.
is open, causing transistor 38 to conduct. Capacitor 10 therefore begins discharging transistor 38. Additionally, transmission gate 66 is closed and transmission gate 64 is closed.
is opened and the reference voltage applied to the comparator is
Change the level from 3 volts to 2 volts as shown in Figure A. The step change in current through transistor 38, as shown in FIG. 2C, causes the capacitor to discharge at a constant rate, as shown in FIG. 2D. This discharge continues until it reaches a level of 2 volts, when it reaches 2 volts,
The output of comparator 16 changes again as shown in FIG. 2E,
The states of output signals vCO and VCo are changed as shown in FIGS. 2F and 2G.

By providing the capacitors 48 and 50, the second B
A step change in the current flowing through transistors 40 and 38 as shown in FIG. 1 and FIG. 2C is now possible. Additionally, capacitors 68 and 70 allowed the reference voltage to be stepped between 3 and 2 volts. As a result, the charge/discharge rate could be controlled extremely accurately. Accurate oscillator operation is obtained at the extremely high frequencies needed in a variety of applications, such as phase-locked loop data separators in disk drives. The reference capacitors are charged and discharged between two reference voltages, with the charging rate precisely controlled by the fast switching of transistors 38 and 40.

[Brief explanation of drawings]

Figure 1 is a schematic diagram of the voltage controlled oscillator of the present invention, Figures 2A-2G
The figure is a timing diagram related to the present invention. 14... Partial voltage network, 16... Comparator, 18
. . . voltage-current converter, 34 . . . third transistor,
36... Fourth transistor, 38... First transistor, 40... Second transistor, 42, 44, 46
゜52.62.66...Transmission gate.

Claims (14)

[Claims] (1) With a reference capacitor that is periodically charged and discharged, the voltage of this capacitor is compared with the first reference voltage when the reference capacitor is charged, and the voltage of this capacitor is compared with the second reference voltage when the reference capacitor is discharged. The output is the output of this oscillator, and it switches from the first level to the second level when the capacitor voltage becomes equal to the first reference voltage, and when the capacitor voltage becomes equal to the second reference voltage. , comparing means for switching from a second level to a first level, and pumping means for periodically charging and discharging the reference capacitor at a rate determined by the value of the input voltage, said pumping means discharging the reference capacitor. 1st M to do
an OS transistor, a second complementary MOS transistor for charging the reference capacitor, third and fourth complementary MOS transistors through which a current corresponding to the value of the input voltage flows; switching means for alternately connecting the gate of the transistor and the gate of the third transistor and connecting the gate of the second transistor and the gate of the fourth transistor to turn on the second transistor;
and first and second capacitors respectively connected to a fourth capacitor, the capacitors storing charge to facilitate fast turn-on of the first and second transistors. (2) The pump means includes input means for receiving an input voltage and generating a corresponding control current that controls the amount of current flowing through the third and fourth transistors. voltage controlled oscillator. (3) The input means includes: a voltage-to-current converter that receives an input voltage and converts the input voltage into an output current; a bias resistor connected between the power source and the output end of the converter; a MOS control transistor having a first electrode connected to the output and a gate electrode, the current flowing through the control transistor being equal to the sum of the current flowing through the bias resistor and the output current; The voltage control according to claim 2, wherein the voltage control is connected to the gate electrode of the third transistor so that the current flowing through the third and fourth transistors corresponds to the current flowing through the control transistor. oscillator. (4) The switching means includes a first transmission gate connected between the gate of the first transistor and the gate of the third transistor, and a first transmission gate connected between the gate of the second transistor and the gate of the fourth transistor. 2 transmission gates, the transmission gates being alternately closed and opened to alternately turn on and off the first and second gates. . (5) a third transistor connected between the gate of the first transistor and ground and closed when the first transmission gate is open;
a transmission gate; and a fourth transmission gate connected between the gate of the second transistor and the power supply and closed when the second transmission gate is open, the third and fourth transmission gates being connected to the first and fourth transmission gates. A voltage controlled oscillator according to claim 4, which facilitates high-speed turn-off of two transistors. (6) The voltage controlled oscillator according to claim (1), wherein the first and sixth capacitors are MOS capacitors. (7) The first capacitor has a terminal connected to the gate of the third transistor and a terminal connected to the power supply, and the second capacitor has a terminal connected to the gate of the fourth transistor and connected to ground. A voltage controlled oscillator according to claim (6), having a terminal that is (8) the comparison means has a voltage switching means for connecting the first or second reference voltage to the reference terminal; an input end connected to the reference capacitor; and the other input end connected to the reference terminal; a comparator whose output signal changes state at a frequency determined by the input voltage, the switching means and the voltage switching means being switched in response to a change in the output of the comparator.
The voltage controlled oscillator described in section 1). (9) It includes a plurality of MOS transistors connected in series like a diode between a power supply and ground, a first reference voltage is obtained at one output terminal of the transistor, and a second reference voltage is obtained at the output terminal of another transistor. A voltage controlled oscillator according to claim (8), in which a reference voltage is obtained. (10) A third capacitor connected to the output terminal of the one transistor and a fourth capacitor connected to the output terminal of the other transistor, wherein the third and fourth capacitors are connected to a first reference voltage and a second A voltage controlled oscillator according to claim 9, which facilitates high-speed switching at the reference terminal to and from a reference voltage. (11) a power source, input means for generating a control current corresponding to an input voltage, and fast switching current pump means for forming a current sink or source whose current value at the output terminal is a function of the control current; and the pumping means includes: a first electrode connected to a power source; a second electrode connected to an output terminal;
a first MOS of a first conductivity type having an electrode and a control electrode;
a second MO of a second conductivity type having a transistor, a first electrode connected to ground, a second electrode connected to the output terminal, and a control electrode;
an S transistor, a first electrode connected to a power supply, and a second electrode connected to a second electrode.
a third MOS transistor of a first conductivity type having an electrode and a control electrode; a first electrode connected to ground; a second MOS transistor of the third transistor;
a fourth MOS transistor having a second electrode connected to the electrode and a control electrode driven by the input means, in which an equal current of a level determined by the control current passes through the third and fourth transistors; having a terminal connected to a control terminal;
a first capacitor that stores charge; and a second capacitor that stores charge and has a terminal connected to the control terminal of the fourth transistor.
a capacitor; (a) connecting a control terminal of the first transistor to a control terminal of a third transistor such that a current proportional to the control current flows through the first transistor to an output terminal; and a current proportional to the control current flowing through a second transistor; and a first switching means for alternately connecting the control terminal of the second transistor to the control terminal of the fourth transistor such that current flows from the output terminal through the oscillator. a reference capacitor having a terminal and another terminal connected to ground and alternately charged by the first transistor and discharged by the second transistor; a first reference voltage; and a second reference voltage lower than the first reference voltage. a reference voltage means for generating a reference voltage; a comparison means having a first input connected to the output terminal and a second input connected to the reference voltage means; and a comparison means for comparing the first reference voltage or the second reference voltage. and second switching means for connecting the reference capacitor to the first and second switching means.
A voltage controlled oscillator which is controlled by the output of the comparing means to be charged to a reference voltage and then discharged to a second reference voltage, the charging and discharging rate is controlled by the control current, and the output of the comparing means is the output of the oscillator. . (12) a power source; a voltage-to-current converter for receiving a control voltage and converting the control voltage into a corresponding control current at a first node; a bias resistor that conducts a current and adds this bias current to a control current to generate a reference current at a first coupling point; a drain connected to the first coupling point; a source connected to ground; A reference N-type MOS transistor having a gate connected to the ground and through which a reference current flows; and an N-type MOS transistor having a source connected to ground and a gate connected to the gate of the reference transistor and through which a current proportional to the reference current flows. a P-type MOS third transistor having a source connected to the power supply, a drain connected to the drain of the second transistor, and a gate interconnected to the drain, through which a current equal to the second transistor flows; , a first terminal having a first terminal connected to the gate of the second transistor, and a second terminal connected to one of the power supply and ground.
a MOS capacitor; a second terminal having a first terminal connected to the gate of the third transistor and a second terminal connected to one of the power supply and ground;
a MOS capacitor; a first MOS switch means having a first terminal connected to the gate of the second transistor; and a second terminal; a second MOS switch having a first terminal and a second terminal connected to the gate of the third transistor; means; an N-type MOS transistor having a source connected to ground and a gate connected to a second terminal of the first switch means; a first terminal connected to the gate of the fourth transistor and a first terminal connected to ground; a third MOS switch means having two terminals; a source connected to the power supply and a second MOS switch means of the second switch means;
P having a gate connected to the terminal and a drain connected to the drain of the fourth transistor at the pump coupling point.
a fifth type MOS transistor; fourth MOS switch means having one terminal connected to the gate of the fifth transistor and a second terminal connected to the power source; one terminal connected to ground and connected to the pump node; a reference capacitor having another terminal, a first input connected to the pump coupling point, and a comparator having a second input; generating a first reference voltage and a second reference voltage lower than the first reference voltage; and a fifth MOS for selectively applying the first reference voltage to the second input terminal of the comparator.
switch means and sixth MOS switch means for selectively applying a second reference voltage to the second input of the comparator, said switch means being controlled according to the output state of the comparator, during the first time period. , the first, fourth and sixth switch means are opened, the second, third and fifth switch means are closed, and the fifth transistor is turned on rapidly to a current level proportional to the current flowing through the third transistor. and thus charging the reference capacitor until the voltage across the reference capacitor is equal to the first reference voltage, and during a second period each of the switch means turns off the fifth transistor and causes a current proportional to the current flowing through the second transistor to flow through the second transistor. the reference capacitor is switched on until the voltage across the reference capacitor equals the second reference voltage, at which point the switch is switched again. , the comparator is a voltage-controlled oscillator that changes state at a frequency that corresponds to the value of the control voltage. (13) A voltage controlled oscillator according to claim (12), wherein the bias resistor and reference capacitor are external components, and other components are provided on a monolithic integrated circuit. (14) The voltage controlled oscillator according to claim (12), wherein the switch means is a transmission gate.