JPS6223666A - Picture reader - Google Patents

Abstract

PURPOSE:To easily allow a user to carry a main body by a hand by adopting a structure that a case is separated into an upper enclosure and a lower enclosure at the boundary of a carrying means of an original and providing a grip carrying the titled device by a hand to a side face provided with a fulcrum of the enclosure. CONSTITUTION:The enclosure 1 is divided into two, the upper enclosure 1a and the lower enclosure 1b at the boundary of a carrying path 6, both the enclosures 1a, 1b are supported around one roller shaft 32 of a paper discharge roller 11 so as to open the upper enclosure 1a upward by a prescribed angle. Further, the hand carrying grip 34 carrying the titled device by a hand is provided to the lower position of the right side (rear face) of the enclosure 1. That is, in order to relieve the load of an opening fulcrum (shaft 32) of an upper unit A at hand carrying, the grip 34 is provided to the side face where the opening fulcrum is provided.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an image reading device that optically reads an image of a document.

[Technical background of the invention and its problems] Generally, in this type of image reading device, light from a light source is irradiated onto a document, and the reflected light is photoelectrically converted by a photoelectric converter such as a COD line sensor. It is output after being processed as an image signal. In this case, there are two types: the original moving method, which scans the original while moving it, and the original fixed method, which fixes the original and scans the original while moving the optical system including the light source and photoelectric converter. However, in the explanation one step below, we will discuss the case of the original moving method.

]In the case of an image@reading device using the document movement method,
As described above, since the document is read while being conveyed, the document may jam during the conveyance, and there has been a strong demand for a device that can easily and easily remove the jam in such cases.

There was also a strong demand for something that the user could easily lower and move by hand.

[Object of the Invention] The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to easily and easily clear the jam even if a document jams in the conveyance means, and to make it easy for the user to handle the jam. To provide an image reading device that can be lowered and moved by hand.

[Summary of the Invention 1] In order to achieve the above object, the present invention has a structure in which the housing can be separated into an F part housing and a lower housing with the document conveyance means as a boundary, and these two housings are joined at a single fulcrum. The northern casing can be opened and closed relative to the lower casing, and a handle is provided on the side surface of the casing on the side where the fulcrum is provided to allow the device to be lowered and moved by hand.

Embodiment of the Invention An embodiment of the present invention will be described below with reference to the drawings.

1 and 2 show an image reading device according to the present invention. That is, 1 is a cylindrical body of an image reading device, and a document insertion section 2 is formed in the lower part of the left side (front surface) of the cylinder, and a document discharge part 3 is formed in the rear part of the upper surface. A manual feed guide 4 is detachably provided in the document insertion section 2, and the document O is inserted along this manual feed guide 4 with its image side (front side) facing up. . Further, the document discharge section 3 is provided with a removable paper discharge tray 5 tilted at a predetermined angle, and the document is discharged from the document discharge section 3 with its front and back reversed to the paper discharge tray 5. O is designed to be stored with the image side facing down. Between the document insertion section 2 and the document discharge section 3, there is a conveyance path 6 that conveys the document O inserted from the document insertion section 2, turns it inside out at the end of the forwarding, and guides it to the document discharge section 3. 3. This conveyance path 6 has a diagonal structure and a one-way clutch structure that have the function of moving the inserted original O toward the left [111 reference], a pair of paper feed rollers 7, etc. In order to align the leading edge of the document O fed by the paper feed roller 7, the upper roller is made of plastic.
A pair of aligning rollers 8 whose lower rollers are made of rubber and have a one-way clutch structure, and a pair of conveyance rollers which have a one-way clutch structure to guide the document O sent by the aligning rollers 8 to the document discharge section 3. A roller 9, an arcuate guide path 10 for guiding the document O sent by the transport roller 9, and a guide path 10 provided in the document discharge section 3.
0 and a pair of paper ejection rollers 11 for ejecting the document 0 guided by the original 0 to the paper ejection tray 5.

The middle part of the conveyance path 6, that is, the aligning roller 8
A document reading position 12 is set between the transport roller 9 and the document reading position 12, and a reference color correction plate 13 is provided at this document reading position 12.
is provided, and the original O is conveyed over this reference color correction plate 13. This reference color correction plate 13 is for reading white level correction data in order to correct an image signal including shading from a line sensor 22, which will be described later. On the reference color correction plate 13, a glass plate 14 as a transparent member having excellent light transmittance is closely attached. This glass plate 14 is the reference color correction plate 1
Reference color correction plate 13 caused by rubbing between 3 and original O
This is to prevent dirt etc. A document fixing plate 15 is provided above the reference color correction plate 13 and just before the document reading position @12, as a document fixing member to which the document O being conveyed is pressed. By lightly pressing the original O with the glass plate 14 and the glass plate 14,
This prevents the original O from floating up in front of the original reading position @12. The document fixing plate 15 is made of a material that is thin and has a certain amount of elasticity, such as a polyester film, for example. Further, above the reference color correction plate 13, a green fluorescent lamp 16 as a light source is provided. As shown in detail in FIG. 6, a heat-retaining heater 17 is closely attached to a predetermined portion of the surface of the fluorescent lamp 16 in order to keep the tube wall temperature constant. A temperature-sensitive resistance element (hereinafter referred to as a thermistor) 36 is attached to detect the tube wall temperature. Thus, the light from the fluorescent lamp 16 is irradiated onto the reference color correction plate 13 or onto the document O conveyed thereon, and the reflected light is reflected by the reflection mirrors 18, 19, and 20, and is reflected by the lens 2.
1, and is imaged on a COD line sensor (for example, TCD105 manufactured by Toshiba Corporation) 22 as a photoelectric converter,
This line sensor 22 converts optical signals into electrical signals. Note that the reflecting mirror 18,1
On September 20th, anti-seismic mats were laid on each floor to prevent vibrations. In addition, the fluorescent lamp 16 and the line sensor 2
2 is disposed in a direction perpendicular to the conveying direction of the original O.

Further, an operation panel 23 equipped with various operation buttons and various indicators is provided on the front surface of the housing 1, and a printed circuit board 24 in which a control circuit and the like are incorporated is provided near the top surface of the housing 1. is installed. In addition, 2
5 is a document detector that detects that the document O is inserted; 2;
Reference numeral 6 denotes a document detector in front of the aligning roller, which detects when the document 0 being conveyed reaches the aligning roller 8;
Reference numeral 7 denotes a document detector in front of the document reading position for detecting the document 0 conveyed by the aligning roller 8 and generating a signal for the timing to start reading the white level correction data of the reference color correction plate 13; 28, the document 0; This is a document detector in front of the paper ejection roller that detects the ejection of the document, and both of these use a photo interrupter. Further, reference numeral 29 denotes a stepping motor for supplying power to each drive system, and by the action of a one-way clutch, the paper feed roller 7 is rotationally driven during normal rotation, and the alignment roller 8, conveyance roller 9, and paper ejecting motor are driven when rotating in reverse. The roller 11 is driven to rotate. Further, 30 is a power supply device that generates a DC voltage used for each control, and 31 is a connector for connecting to an external device.

Incidentally, as shown in FIG. 2, the casing 1 is divided into two parts, an upper casing 1a and a lower casing 1b, with the transport path 6 as a boundary, and both casings 1a and 1b are connected to one of the paper ejection rollers 11. The upper housing 1 is pivoted about a shaft 32 as a fulcrum.
a can be opened upward at a predetermined angle as shown in FIG. Here, the upper housing 1a includes a paper discharge tray 5, an upper roller of the paper feed roller 7, an upper roller of the aligning roller 8, an upper roller of the conveyance roller 9, an upper guide plate of the guide path 10, an original fixing plate 15, a fluorescent Light 16, reflective mirror 18
, 19, 20, a lens 21, a line sensor 22, an operation panel 23, a printed circuit board 24, etc. are respectively provided to constitute the upper unit (second unit) A, and the lower housing 1b includes a manual feed guide 4, a paper feed roller, etc. 7 lower roller, aligning roller 8 lower roller, transport roller 9 lower roller, lower guide plate of guide path 10, paper ejection roller 11, reference color correction plate 13, glass plate 14, document detector 2
5, 26, 27, 28, a stepping motor 29, a power supply unit [30, a connector 31, etc.] are provided, respectively, to constitute a lower unit (first unit) B. With such a structure, it is possible to easily process the document O that is jammed in the conveyance path 6. It should be noted that when the upper unit A is opened, the upper unit A is designed to have an appropriate opening/closing angle so that the document 0 stored in the paper ejection tray 5 does not fall. In addition, the upper unit A is a balancer (consisting of a hydraulic mechanism, a spring, etc.) provided in the housing 1.
By releasing a locking mechanism (not shown), the upper unit A is automatically opened to a predetermined angle by the action of the balancer 33.
The open state is maintained.

Further, a handle 34 for lowering the device by hand is attached to the lower right side (rear surface) of the housing 1. That is, this handle 34 is provided on the side surface on which the opening/closing fulcrum (shaft 32) of the upper unit I-A is provided in order to reduce the burden on the opening/closing fulcrum (shaft 32) when the upper unit I-A is towed.

FIG. 3 shows in detail the portion for reading the image of the original O by the fluorescent lamp 16. As shown in FIG. That is, when the original O is conveyed in the direction of the arrow shown in the figure, the original 0 is prevented from floating in the C position before the original reading position 12 by the glass plate 14 and the original fixing plate 15.

Therefore, the light emitted from the fluorescent lamp 16 is transmitted to the document reading position 12.
The reflected light is directed onto the reference color correction plate 13 or the original O, and the reflected light is guided to the lens 21 by the reflection mirror 35 and is imaged onto the line sensor 22. In this device, the reference color correction plate 1
The white level correction data No. 3 and the image of the original O are read at the same reading position 12. In FIG. 5, for convenience of explanation, only one reflecting mirror is used and the optical path length is changed.

FIG. 4 shows a control circuit of the image reading apparatus configured as described above. That is, 41 is a microprocessor that controls the entire device, 42 is an interrupt control circuit that controls interrupts to the microprocessor 41,
The interrupt request signal from the timer 43 is sent to the microprocessor 4.
I am telling 1. 43 is a general-purpose timer, and 544, which generates the above-mentioned interrupt request signal and basic timing signal during document transport, is a microprocessor 41 and timer 4.
A crystal oscillator (O
20), 45 is an RO in which all control programs and data tables for operating this device are stored.
M (read only memory), 46 is a working RAM (random access memory), 47 is a drive circuit for the line sensor 22;
It generates the basic clock pulse to drive the Reference numeral 48 denotes an amplification circuit and a four-pronged sample hold circuit for amplifying the weak image signal from the line sensor 22, and according to the switching signal S1 from the microprocessor 41, the image signal is subjected to 8 dot/pg processing or 16 dot/layer processing. It has functions that can be selected. 50 is a shading correction circuit for correcting the image signal including shading from the line sensor 22, and 51 is an input/output board which outputs display data to the operation panel 23 and reads operation buttons. There is. 52 is an input port for reading data from the document detectors 25 to 28 and various detectors 53 such as the thermistor 36;
55 is the output boat, 55 is the heat-retaining heater 17, and the motor 2.
9 and a drive circuit for operating an output device 56 such as a power supply inverter for the fluorescent lamp 16; 57 is an interface circuit for receiving command data from an external device and transmitting an image signal; It is connected to 31. 58 is a left margin count circuit for counting the left margin during document reading.

FIG. 5 is a detailed view of the input/output capo 1-51, input port 52, and output port 54 in FIG. 4. That is, 61 is a parallel input/output port, to which a transmission/reception control signal S2 from the microprocessor 41 is supplied.

This transmission/reception control signal S2 is a signal for controlling the transmission/reception of signals with various detectors and the like. A document density reading switch 62 is provided on the operation panel 23 and can select the reading level from three levels, dark, normal, and light, depending on the density of the document. 63 is a temperature detection circuit connected to the thermistor 36 for detecting the tube wall temperature of the fluorescent lamp 16; 64 is an external IA device power-on detection circuit for detecting whether the external device is powered on; 65 extracts a part of the image signal from the line sensor 22 and sends it to the fluorescent lamp 16.
This fluorescent light layer detection circuit 65 detects whether the light layer of the fluorescent light 16 is in a state where the original can be read or the fluorescent light 16 is disconnected. etc. are transmitted to the microprocessor 41. 66
is a jam detection circuit, which detects the leading or trailing edge of the document 0 based on the detection signals from the detectors 25 to 28, so that the document O passes through the four detectors 25 to 28 within a specified time. , monitors whether or not the document O is jammed. Reference numeral 67 denotes a ready status indicator that lights up when the device is in a state where it can read a document. Note that the document is in a readable state when the tube wall temperature of the fluorescent lamp 16 has reached a specified value, the light amount of the fluorescent lamp 16 has reached a specified value, and the fluorescent lamp 16 is not disconnected. , there is no document O in the transport path 6, and so on. 68 is a jam status indicator that lights up when the document O is jammed in the conveyance path 6; 69 is a dark indicator that lights up when the document reading density is at a dark level; and 70 is a dark indicator that lights up when the document reading density is at a normal level. 71 is a light indicator that is lit when the document reading density is at the light level; 72 is a heater control circuit that controls on/off the heat-retaining heater 17; and 73 is the fluorescent lamp 1.
This is an inverter control circuit that controls ON/OFF of the supply N source inverter (not shown) of No. 6. Note that each of the above-mentioned indicators 67 to 71 is provided on the operation panel 23.

The sixth factor shows a device for controlling the tube wall temperature of the fluorescent lamp 16 and its control section. In the figure, 17 is a heater for keeping warm, 3
6 is a thermistor, 37 is a control cord connected to the heat-retaining heater 17 and thermistor 36, 61 is a parallel input/output board that performs input/output processing with the microprocessor 41, 63 is a temperature detection circuit, and 72 is a heater control circuit. , 38 are connectors for connecting the control cord to the temperature detection circuit 63 and the heater control circuit 72.

An example of tube wall temperature control in such a configuration will be described with reference to FIG. 7. When the device is powered on,
The heater control circuit 72 operates under the control of the microprocessor 41 to turn on the heat-retaining heater 17, and the temperature TK detected by the thermistor 36 rises. This shows the state indicated by ■ in FIG. Detection temperature T of thermistor 36
is monitored by the microprocessor 41 from time to time, and R
It is compared with the tube wall specified temperature T stored on the data table of OM45. As a result of this comparison, if the detected temperature TK becomes larger than the specified tube wall temperature T, the heat-retaining heater 17 is controlled to be turned off. This shows the state indicated by ■ in FIG. Moreover, when the detected temperature TK becomes smaller than the specified tube wall temperature T, the heat-retaining heater 17 is controlled to be turned on. This shows the state indicated by ■ in FIG. That is, as shown in FIG. 7, the temperature detection circuit 63, heater control circuit 72, and microprocessor 41 turn on and off the heat-retaining heater 17 to keep the tube wall temperature of the fluorescent lamp 16 near the specified value T. It is something to control.

Furthermore, in this device, as a measure to reduce the capacity of the power supply, control of the heat-retaining heater 17 is stopped while the stepping motor 29 is operating. This is because the document reading speed of this apparatus is approximately 3 seconds for an A4 size document, so even if the control of the heat-retaining heater 17 is stopped during this time, the light amount of the fluorescent lamp 16 will not change.

FIG. 8 shows the temperature detection circuit 63 in detail. In the figure, 81 is a variable resistance for current limiting of the thermistor 36;
82 is a current limiting resistor, 83 is a signal voltage stabilizing capacitor, 84 is an amplifier for increasing the gain of the output signal of the thermistor 36, and 85 is an A/D converter. To explain the operation in such a configuration, the thermistor 36 is installed on the tube wall of the fluorescent lamp 16, and detects the tube wall temperature.

The detection current of the thermistor 36 is converted into a voltage by resistors 81 and 82, stabilized by a capacitor 83, and then sent to an amplifier 8.
It is input to the non-inverting input terminal (+) of No. 4. The amplifier 84 increases the gain of the input voltage, converts the analog signal into a digital signal by inputting it to the A/D converter 85, and transmits it to the parallel input/output capotro 1. As described above, the microprocessor 41 detects the tube wall temperature based on the A/D conversion data from the parallel input/output capotrometer 1.

FIG. 9 shows the amplifier circuit 48 and sample hold circuit 49 in FIG. 4 in detail.

That is, O8 is the image signal from the line sensor 22, and D
O8 is an image compensation signal from the line sensor 22, and each of these signals O8 and DO8 is synchronized with the reset pulse R8 input to the crawler sensor 22. The signals O8 and DO8 are amplified by transistors 91 and 92, respectively, and output to their emitters. Resistors R10 and R11 are base current limiting resistors of transistors 91 and 92. Each of the transmitters of the transistors 91 and 92 is pulled up to a DC voltage of 4-12 V through resistor 12 and R14, respectively, and each resistor is It is grounded via R15. Capacitors C10 and C11 are right-polarity capacitors excluding DC components, and resistors R16 and R17 are input current limiting resistors of the differential amplifier 93. By inputting the emitter output signals 91 and 92, offset bias and reset noise are removed.SP is output at the timing of the sample pulse.This sample pulse SP is inverted by the inverter circuit 94. After that, it is input to each input terminal of two four-person NAND circuits 95.Each output of the above-mentioned NAND circuit 95 is connected to one end of the primary coil of a pulse transformer 96.
The other end of the primary coil is grounded via a capacitor C12.

One end of the secondary coil of the pulse transformer 96 has a resistor R
18 and a capacitor C13 in parallel to a terminal 97a of a bridge circuit 97 made up of four diodes. Further, the other end of the secondary coil of the pulse transformer 96 is directly connected to the terminal 97b of the bridge circuit 97.

On the other hand, the output of the differential amplifier 93 is connected to the base of a transistor 98 via a polar capacitor C14 (1) and is also connected to a resistor R23. Resistor R19
is the operating resistance of the above-mentioned 1-transistor 98. The collector of the transistor 98 is pulled up to a DC voltage of +12V, and the emitter is directly connected to the terminal 97c of the bridge circuit 97, and the resistor R20
+ is pulled down to a DC voltage of -12V. A terminal 97d of the bridge circuit 97 is connected to a capacitor C14, and is charged and discharged by this capacitor C14.

The charging voltage of the capacitor C14 controls the gate of the unijuction transistor 99. The drain of the unijunction 1 transistor 99 is connected to the base of the transistor 100. A resistor R21 is a resistor between the base of the transistor 100 and 1479, and is pulled up to a DC voltage of +12V. The source of the uni-juction 1-transistor 99 is the transistor 10
0 collector and is pulled down to a DC voltage of -12V via a resistor R22.

The collector of the transistor 100 is connected to an analog switch (field effect transistor) 101 via a resistor R24.
connected to the drain of Analog switch 1 above
In case of 01, when a high level voltage is applied to the gate, the resistance between the drain and the source becomes low and the transistor turns on. Conversely, when a low-level voltage is applied, the resistance becomes high and the transistor turns off.

The switching signal S1 is a signal for selecting the image signal between 8 dots/rra processing and 16 dots/m processing, and is applied to the gate of the analog switch 101.

Resistors R23 and R24 constitute an adder circuit, which adds the output signal of the differential amplifier 93 and the output signal from the source of the analog switch 101, and sends the added signal S3 to the inverter of the operational amplifier 102. The input terminal (-) has an input of 1. A resistor R25 and a capacitor C15 are connected in parallel between the inverting input terminal and the output terminal of the operational amplifier 102, forming a negative feedback circuit. The output of the operational amplifier 102 is connected to an analog switch (for example, Motorola 4053) 1 via a resistor R26.
03 input terminals XO, YO.

Each is connected to ZO. S4 is a crumb pulse, which is connected to the enable terminal E of the analog switch 103.
It is input to NB. When a high-level voltage is applied to the enable terminal ENB, the analog switch 103 generates a low voltage between the input terminal XO and the output terminal X, between the input terminal YO and the output terminal Y, and between the input terminal ZO and the output terminal Z. It becomes a resistance, and the on state becomes loud. Conversely, when a voltage of row 1 is applied, the resistance becomes high and the transistor becomes off. Each output terminal X. of the analog switch 103 described above. Y.

Z are connected in common, and this common connection point is connected to the inverting input terminal of the JET-input operational amplifier 104 and is also grounded via the capacitor C17. A capacitor C16 is connected between the inverting input terminal and the output terminal of the operational amplifier 103, forming a negative feedback circuit. The non-inverting input terminal of the operational amplifier 103 is grounded.

The output of the operational amplifier 103 passes through a current-limiting resistor R27 and then through a resistor R28 for current-to-voltage conversion, and is positively fed back to the non-inverting input terminal of the operational amplifier 102. $5 is an image signal output from the operational amplifier 102.

Below is a sample hold circuit 4 having a function of selecting image signal processing between 8 dots/M processing and 16 dots/M processing.
9 will be explained with reference to the timing chart shown in FIG. In FIG. 10, R8 is the reset pulse input to the line sensor 22, O8 is the image signal from the line sensor 22, and the reset pulse R
8, and a pixel signal of the image signal O8 is output for each pulse of the reset pulse R8.

The sample pulse SP is synchronized with the reset pulse R8, but is output at every other timing of the reset pulse R8. Now, when the switching signal $1 is set to low level, the analog switch 101 is turned off, and the signal S3 becomes only the output signal of the differential amplifier 93. The image signal O8 has reset noise removed by the differential amplifier 93, and is amplified by the operational amplifier 102. The image signal S5 output from the operational amplifier 102 is output in synchronization with the reset pulse R8. Since the line sensor 22 in this embodiment is capable of reading an A4 size document at a resolution of 16 dots/al, the above image signal S5
outputs image information with a resolution of 16 dots/m for an A4 size document.

In this way, by setting the switching signal S1 to a low level, the image signal is processed at a resolution of 16 dots/sI.

Next, when processing the image signal at a resolution of 8 dots/M, the switching signal $1 is set to high level.

At this time, the analog switch 101 is turned on, and the signal S3 becomes a sum signal of the output signal of the differential amplifier 93 and the output signal from the source of the analog switch 101. In FIG. 10, SH is a timing pulse for timing one line output time, and is input to the line sensor 22. When the above timing pulse SH is input,
Pixel signals for 3684 pixels are output as the image signal O8.

81.82.8 in Figure 10! , . . . , 83648 correspond to pixel signals excluding dummy components. For example, when the pixel signal S1 is output as the image signal O8 in FIG. 9, the reset noise is removed by the differential amplifier 93, and the transistor 9
The voltage is converted at step 8 and transmitted to the terminal 97C of the bridge circuit 97. At this time, the pulse transformer 96 operates from the rise to the fall of the sample pulse SP, and the bridge circuit 97, pulse transformer 96, resistor R18, A charging/discharging current begins to flow in the circuit constituted by the capacitor C13, and as a result, a voltage of the same level as the level of the terminal 97C is accumulated in the capacitor C14, and sample and hold is performed here. Capacitor C1
The charging voltage of No. 4 is converted into voltage by transistors 99 and 100.

Then, in synchronization with the next reset pulse R8, the image signal O
When the pixel signal S2 is output to the pixel signal S2, the differential amplifier 93 removes the reset noise. At this time, since the sample pulse SP is not input, the operation of the charging/discharging current is not performed, and therefore the output signal of the differential amplifier 93 is
23. As a result, the resistor R23 and the resistor R
24, the pixel signal S is added to the signal S3.
A pixel signal obtained by adding 1 and 82 is output. This image signal is amplified by the operational amplifier 102, and the output image signal S5 is a pixel signal obtained by adding the pixel signals 81 and 82. Similarly, a sum pixel signal of pixel signals S3 and 84 and a sum pixel signal of pixel signal 8586 are output,
This process is repeated until the sum pixel signal of pixel signal 53647 and S3648 is output. As a result of the above, the pixel signal is output at every other reset pulse R8, so
Image signal S5 is 8 dots/fn for an A4 size document! R
The image information is converted into image information with a resolution of .

FIG. 11 shows the shading correction circuit 50 in FIG.
It shows in detail. Note that here the image signal is 8
An example of a circuit for processing at a resolution of dots/m is shown. That is, 111 is an address counter of the RAM 112, and three 4-bit binary counters 111A, 11
1B, IILC. S6 is a basic clock pulse of the address counter 111, and the timing of the address counter 111 is synchronized with this basic clock pulse S6. 112 is static RA
M (for example, Toshiba Corporation TMM 2016P-2
>, and is used to store white level correction data for shading correction of image signals. 11
3 is a 4-bit binary full adder, and by using two of them, an 8-bit i binary full adder is constructed. 114
is a data selector multiplexer with three-state outputs, and two are used to drive an 8-bit data line. S7 is a RAM write signal, which is sent to the control terminal OC of the data selector/multiplexer 114 and the RAM 112.
is input to the write enable terminal WE. , S8
is a select signal, which is input to the select terminal S of the data selector/multiplexer 114. The data selector/multiplexer 114 sends a signal to select 1.
When S8 is high level, output terminal Y (1Y, 2Y, 3
Y.

When the state of input terminal B (IB, 2B, 38.4B>) can be output to the input terminal B (IB, 2B, 38.4Y), and the select signal S8 is at low level, the output terminal Y (1Y, 2Y, 3Y).

4Y) can output the status of input terminal A (1A, 2A, 3A, 4A>). 115 is 09117171707
There are seven circuits, and eight pieces of data can be latched by the trigger signal of the RAM enable signal S9.

The RAM enable signal S9 is also input to the output enable terminal OF of the RAM 112.

Reference numeral 116 is a high-speed 8-bit D/A converter (for example, TD62901P manufactured by Toshiba Corporation), which converts a digital input signal into an analog DC current. This D/A
Output terminal of converter 116! OUT is connected to a four-channel demultiplexer (eg, Motorola 14C52) 117 and a non-inverting input terminal of a differential amplifier 118 via a resistor R29. Resistance R30, R31, R32
The series circuit is a circuit that converts the output current of the D/A converter 116 into a voltage. The voltages divided by the resistors R30, R31, and R32 are applied to the input terminals XO, X1...of the demultiplexer 117, respectively. It is input to X2°×3. Original density switching signals sio and sii are input to the selection input terminals A and B of the demultiplexer 117,
By inputting a combination of high level and low level signals to the select input terminals A and B, the output terminal X becomes the input terminals XO, Xi, X2 . One of X3 (7) is turned on. The output terminal X of the demultiplexer 117 is connected to the non-inverting input terminal of the differential amplifier 119.

The inverting input terminals of the differential amplifiers 118 and 119 and the non-inverting input terminal of the differential amplifier 120 are commonly connected, and the image signal 85 is input to this common connection point. The output of the differential amplifier 118 is input to the carry input terminal CO of the binary full adder 113. The differential amplifier 119 outputs an image signal that has undergone shading correction processing. This image signal is sent to A/
The data is subjected to D conversion processing and output to an external device. A divided voltage of DC voltage +5V is input to the inverting input terminal of the differential amplifier 120 through a variable resistor R33. The output of the differential amplifier 120 is the parallel input/output capotro 1 (fifth
(see figure).

Next, in such a configuration, a process in which white level correction data for performing shading correction is accumulated in the RAM 112 will be described with reference to timing charts shown in FIGS. 12 and 13. In FIGS. 12 and 13, SH is a timing pulse for one line output time, which is input to the line sensor 22. In FIG. As shown in FIG. 12, it is assumed that the select signal QS8 is at a high level when the timing pulse SH is input. When the select signal S8 becomes high level, the data selector
The select terminal S of the multiplexer 114 becomes high level, and the output terminals Y (1Y, 2Y.

3Y, 4Y) has input terminal B (1B, 2B, 38°4
It becomes possible to output the state of B>. Input terminal B (1B, 2B
, 3B, 4B) are all grounded, so the output terminal Y
All data (IY, 2Y, 3Y, 4Y) are at low level. When the RAM write signal S7 becomes low level, the state of input terminal B (18° 2B, 3B, 4B) becomes output terminal Y (1Y).

2Y, 3Y, 4Y). At this time, RAM1
12 write enable terminal WE also becomes low level,
Since the RAM enable signal S9 is at high level, the output terminal Y (IY, 2Y.

3Y, 4Y) data is stored in the RAM 112.

RAM11 according to the timing of basic clock pulse S6.
Address 2 is counted by "+1", so
The data in the RAM 112 is cleared by repeating the above process until the next timing pulse SH arrives. As shown in FIG. 13, the select signal S8 becomes low level when the next timing pulse SH is input.

When the select signal @S8 becomes low level, the select terminal S of the data selector/multiplexer 114 becomes low level, and the output terminal Y (IY) becomes low level.

2Y, 3Y, 4Y) has input terminal A (IA, 2A.

3A, 4A) can be output. Therefore, the output signal of the binary full adder 113 is input to the input terminal A (1A, 2A, 3A, 4A>.RAM write signal S
When RAMI 12 is at a high level, the write enable terminal WE of the RAM 112 is at a high level, and at this time, the RAM enable signal S9 is at a low level.
enters the read state, and the data at the set address is output. This output data is transferred to the flip-flop circuit 11 by the trigger signal of the RAM enable signal S9.
It is latched to 5. The latched contents of the flip-flop circuit 115 are stored at the input terminal A (A1.
A2. A3. A4) and is input to the D/A converter 116, and an output current having a value commensurate with the digital input signal is output from the output terminal 10UT. The output current of the D/A converter 116 is converted into a voltage by resistors R30, R31, and R32, and is compared with the input image signal 85 (read signal of the reference color correction plate 13) by the differential amplifier 11B. As a result of this comparison, when the output of the differential amplifier 118 becomes high level, it is carried to the binary full adder 113, and when the output of the differential amplifier 118 becomes low level, it is carried to the binary full adder 113.
It is not carried to 13. In the binary full adder 113, the output signal of the flip-flop circuit 115 is connected to the differential amplifier 11.
The calculation is performed taking into account the carry of 8, and the calculation result is output. When the RAM write signal S7 changes from high level to low level, the data selector/multiplexer 11
4 input terminals A (1A, 2A, 3A.

4A> value is output terminal Y (IY, 2Y, 3Y, 4Y)
It becomes possible to output to. At this time, the write enable terminal WE of the RAM 112 is also at a low level, so the data on the output terminals Y (1Y, 2Y, 3Y, 4Y) is stored in the RAM.
112. Since the address of the RAM 112 is counted by ``+1'' according to the timing of the basic tarok pulse S6, the data in the RAM 12 is converted by 1 to the shading correction data value by the time the next timing pulse SH arrives.

In this way, each time the timing pulse SH comes, R
By repeating the process of reading out the data in the AM 112, performing calculations on the shading correction data value by the reference color correction plate 13, and writing the calculation results back into the RAM 112, the data in the RAM 112 is finally used as the data for the fluorescent lamps 16. Shading correction data values are written in consideration of spectral characteristics, variations in the photosensitive portion of the line sensor 22, and the like. The circuit configuration is such that rewriting of the shading correction data value in the RAM 112 starts after the original O passes the original detector 27 and ends before the original O reaches the original reading position 12. The shading correction data value in the RAM 112 is rewritten each time the document 0 is transported.

Next, a description will be given of the state in which the image of document O is started to be read.

When SELEC 1 - Shinzuki S8 becomes low level, DEX 1
The select 1 terminal S of the node multiplexer 114 becomes low level, and the output terminal Y (IY.

2Y, 3Y, 4Y) to input terminal A (IA, 2A.

3A, 4A) can be output. When the RAM write signal S7 becomes high level, the write enable terminal WE of the RAM 112 becomes high [, /bell, and at this time R
Since the AM enable signal S9 becomes low level, the RA
M112 enters a read state, and the shading correction data of the set address is output. This output data is latched into the flip-flop circuit 115 by the trigger signal of the RAM enable signal S9. The latched contents of the flip-flop circuit 115 are fed back to the input terminal A (A1.A2°A3°A4) of the binary full adder 113 and are also input to the Ic D/A converter 116. The output current of the D/A converter 116 is connected to the resistor R30°R.
31, R32 converts it into voltage, and demultiplexer 11
7 and the non-inverting input terminal of the differential amplifier 118. The image signal $5 is input to the inverting input terminal of the differential amplifier 118, but at this time, the potential of the inverting input terminal is higher than the potential of the non-inverting input terminal, so the output of the differential amplifier 118 becomes low level. A carry to binary full adder 113 does not occur. Demultiplex+j117 is original i1
Once switching signals 810, 811 cause output terminal X to switch to input terminals XO, X1 . X2. The output signal of the 13 differential brake 117 that turns on with any of the 83 outputs is output to the differential amplifier
19 is input to the non-inverting input terminal and is compared with the image signal S5 (read signal of original O) input to the inverting input terminal. The image signal that has been subjected to this process is highly praised.

FIG. 14 shows a method of correcting an image signal by the shading correction circuit 50. The waveform in the figure is line sensor 2
2 shows a signal after the image number from No. 2 is amplified by the amplification circuit 48. This signal has a waveform corresponding to one period of the timing pulse SH for one line output time. Reference numeral 121 indicates a waveform of an image signal obtained by reading a document, and reference numeral 122 indicates a shading waveform for correcting the image signal. A high level output is obtained where the image signal waveform is larger than the shading waveform, and a low level output is obtained where the image signal waveform is smaller than the shading waveform. You can get novel output. By using the image signal correction method described above, an effect similar to that obtained by performing calculations using an integrating circuit can be obtained.

Next, a method of switching the reading density according to the density of the original will be explained. In FIG. 11, the document 'a degree switching signal si
o and sii are output from the macro processor 41.

The operation of the demultiplexer 117 is as follows:
, B are both low level, output terminal X is input terminal XO
When input terminal A to select 1 is at high level and B is at low level, output terminal X becomes on state with input terminal x1, and select input terminal A becomes low! B at the bell
When the select input terminals A and B are at high level, the output terminal X turns on with the input terminal x2, and when the select input terminals A and B are both high level, the output terminal X turns on with the input terminal x3. To read a low density original, set the original density reading switch 62 to the light state.

Then, by selecting the input terminals A and B to the select 1 of the demultiplexer 117, the output terminal X outputs the value of the input terminal x 2. As a result, the reference input of the differential amplifier 119 becomes low and is suppressed by 15, so that the shading waveform 122 in FIG. 171 becomes 1 novel low, and the differential amplifier 1]9
The output of will be large. Further, in order to read a dark original with a degree of a, the original density reading switch 62 is set to the dark state.

Then, the select input terminal A of the demultiplexer 117
, B, the output terminal X outputs the value of the input terminal x0.

As a result, the reference input of the differential amplifier 119 becomes high, so the level of the shedding waveform 122 in FIG. 14 becomes high, and the output of the differential amplifier 119 becomes low. moreover,
To read a document with a standard density, press the document density reading switch 62.
Set to normal state. Then, by selecting the select input terminals A and B of the demultiplexer 117, the output terminal X outputs the value of the input terminal×1. As a result, the reference input of the differential amplifier 119 has a value between the light state and the dark state, so the output of the differential amplifier 119 has a level between the light state and the dark state.

Next, the function of the differential amplifier 120 in FIG. 11 will be explained. Differential amplifier 120 by variable resistor R33
Since the image signal S5 is input to the non-inverting input terminal of the differential amplifier 120 by setting the reference voltage level of the differential amplifier 120 to a predetermined value, by inputting the output signal of the differential amplifier 120 to the microprocessor 41, It is possible to detect the on/off state of the fluorescent lamp 16 and the state of the amount of light. That is, this circuit constitutes the fluorescent light tooth detection circuit 65.

FIG. 15 shows the left margin count circuit 58 in FIG. 4 in detail. That is, 131 is a DIP switch for setting the initial setting value of the left margin count value, and 132 is a DIP switch for setting the data line to DC voltage +
This is a block resistor element that is used to pull up to 5V.

The value of the dip switch 131 is determined by each data input terminal A, B, C, D of the 4-bit binary counter 133.134.
has been entered. The carry terminal C○ of the counter 133 is connected to the enable terminal ET of the counter 134, and carries up from the counter 133 to the counter 134. A timing pulse SH is input to each load terminal of the counters 133 and 134.

The output terminal QD of the counter 134 is connected to the counter 133.
．． 134 and is connected to each enable terminal EP of the D type flip 70 via an inverter circuit 135.
It is connected to the clock terminal CK of the tube circuit 136.

The counters 133 and 134 have their clock terminals CK
It operates by inputting a clock pulse CP to the CP. The data input terminal of the flip-flop circuit 136 is pulled up to a DC voltage of +5V. The output terminal Q of the flip-flop circuit 136 is connected to the data input terminal of a D-type flip-flop circuit 137. A horizontal synchronizing signal H8C is output from the output terminal Q of the flip-flop circuit 136. The flip-flop circuit 137 operates by inputting a clock pulse CP to its clock terminal CK. The output terminal Q of the flip-flop circuit 137 is connected to the clear terminal CLR of the flip-flop circuit 136 and to each load terminal of the 4-bit binary counters 138, 139, and 140. Data input terminals A, B, C, and D of the counter 138 are each grounded. Data input terminals A and B of the counter 139 are pulled up to a DC voltage of +5V, and data input terminals C and D are grounded. Data input terminals A and D of the counter 140 are pulled up to a DC voltage of +5V, and data input terminals B and C are grounded. Above counter 138.1
39.degree. 140 performs a carry by connecting the carrier terminal co to the enable terminal ET. The counters 138, 139, and 140 operate by inputting a clock pulse CP to their clock terminals CK. The carrier terminal CO of the counter 140 is connected to the counter 138.13 via the inverter circuit 141.
9.140 are connected to each enable terminal EP.

A strobe pulse STB is output from the output terminal QC of the counter 138. This strobe pulse STB
During the period in which the image signal is being output, the image signal becomes valid data.

Next, in such a configuration, the left margin counting operation will be explained with reference to the timing chart shown in FIG. 16. The number of pixels output per line from the line sensor 22 is 3684 pixels as described above. The line sensor 22 is configured to first output dummy outputs for 32 pixels and image signals, and then output dummy outputs for 4 pixels, depending on the timing of the timing pulse SH. In this device, the image reading width is 219 am+, so the effective portion of the pixel signal is 216 bytes, or 3456 pixels. Counters 133 and 134 count time t1, and the left margin is adjusted by discarding 32 dummy pixels and invalid data from the pixel data. After counting time t1, horizontal synchronizing signal H8C is output. Strobe pulse S by counter 138゜139.140
After outputting TB and outputting the image reading width 219, the counters 138, 139, and 140 stop counting, so the time t until the next timing pulse SH arrives.
During the period 2, invalid data and dummy portions of 4 pixels are truncated. By doing this, it is no longer necessary to send pixel signals read from areas other than the image reading width to an external device, and there is no need for the external device to have a circuit configuration that newly selects only valid pixel data.

FIGS. 17 and 18 show details of commands and statuses used in this device.

SRI, SR2, and SR3 in FIG. 17 are status request commands corresponding to status 1, status 2, and status 3 in FIG. 18, and SST is a command for instructing this apparatus to start reading a document. In Figure 18,
Original 11 reading density is a status indicating which state the original density reading switch 62 is in. Original setting is a status indicating that the original O has been inserted into the original insertion section 2, and during warm-up, this device is The status indicates that the state is in the best condition for reading the original O. Fluorescent lamp out indicates that the light intensity of the fluorescent lamp 16 has fallen below the limit for reading the original O, or that the fluorescent lamp 16 has run out. The status ``document jam'' indicates that the original IIO has jammed in the transport path 6, and 8/16 conversion is performed at a document reading resolution of 8 dots/1ml or 16 dots/1ml! This status indicates whether or not to proceed.

FIGS. 19 and 20 show control program flowcharts for operating the present apparatus, which will be explained with reference to FIG. 21. Note that FIG. 21 shows the position of each document detector with respect to the conveyance path 6 and the original I conveyance time between these positions, Pl is the position of the document detector 25, and R2
indicates the position of the original detector 26, R3 the position of the original detector 27, and R4 the position of the original detector 28, respectively.

T1 is the time it takes for the original W4o to reach from position P1 to R2, and T2 is the time J11. T3 is the time required to reach position 1tP3 from the center position of aligning roller 8, T4 is the time required to reach position P3 from position P3 to position P4, and T5 is time required to reach position P4 from position P3. T6 indicates the time required to reach the center position of the paper discharge roller 11 from the position P4.

First, the operation from turning on the power to entering the standby state will be explained. Now, when the power is turned on, the process proceeds to step A1. In step A1, it is determined whether or not the upper unit A is in the open state by checking the state of the upper unit open/close detection switch (not shown). If the upper unit A is in the open state, the upper unit is set to be in the open state. If so, proceed to step A2. In step A2, it is determined whether each of the document detectors 25 to 28 is in the off state or not. If even one of the document detectors 25 to 28 is in the off state, it is assumed that a jam has occurred and the document is in a jam state. If all of the document detectors are in the off state, step A3
Proceed to. In step A3, the heat-retaining heater 17 of the fluorescent lamp 16 is turned on, and the process proceeds to step A4. In step A4, preheating of the fluorescent lamp 16 is turned on, and the process proceeds to step A5. In step A5, the fluorescent lamp 16 is turned on, and the process proceeds to step 86.

In step 80, time TX is set in the soft timer, the timer is started, and the process proceeds to step A7. In step A7, it is determined whether the fluorescent lamp 16 has reached a predetermined amount of light, and if it has not, the process proceeds to step 88. In step 88, it is determined whether or not the above-mentioned time TX has elapsed. If it has not elapsed, the process returns to step A7, and if it has elapsed, it is determined that there is an abnormality and a serviceman call state is established. In step A7, if the prescribed light amount has been reached, the process proceeds to step A9. In step A9, the fluorescent lamp 16 is turned off and placed in a standby state.

Next, the operation when the document O is inserted in the standby state will be described. In step AIO, it is determined whether or not the document detector 25 at position P1 is turned on. If it is turned on, it is determined that the original fiO has been inserted, and the process proceeds to step A11. In step A11, the fluorescent lamp 16 is turned on, and the process proceeds to step A12. In step A12, by rotating the stepping motor 29 in the normal direction, the paper feed roller 7 is operated to start conveying the inserted document O, and in step A
Proceed to step 13. In step A13, the time is delayed by T1,
Proceed to step A14. In step A14, position P2
It is determined whether or not the original document detector 26 is turned on. If it is not turned on, it is determined that a jam has occurred and a document jam state is set. If it is turned on, the process proceeds to step A15. Step A
In step A15, the process is delayed for a time T2 and proceeds to step A16.

In step A16, the document setting status is set and the stepping motor 29 is turned off, and the process proceeds to step A17. In step A17, it is determined whether or not a reading start command has been received, and if it has been received, step A18
Proceed to. In step A18, the stepping motor 29
By reversing the original O
After that, the process proceeds to step A19. Step A1
In step 9, the process is delayed for a time T3 and the process proceeds to step A20. In step A20, place! It is determined whether or not the document detection 27 at tP3 is turned on. If it is not turned on, it is determined that a jam has occurred and the document is jammed. If it is turned on, the process proceeds to step A21. In step A21, the process is delayed for a time T4, and the process proceeds to step A22. In step A22, original 0
, and the process proceeds to step A23. Step A
23, a predetermined period of time To after the document detector 27 is turned on.
It is determined whether the time required for the maximum length document to pass through the document detector 27 has elapsed, and if it has elapsed, it is determined that a jam has occurred and the document is in a jam state. If not, proceed to step A24. In step A24, it is determined whether or not the document detector 27 at position P3 is turned off. If it is not turned off, the process returns to step A22 to continue reading, and if it is turned off, the process proceeds to step A25.

In step A25, the time T4 is delayed, and step A2
Proceed to step 6. In step A26, reading of the document O is finished, the fluorescent lamp 16 is turned off, and the document set status is canceled, and the process proceeds to step A27. Step A
In step A27, the process is delayed for a time T5 and proceeds to step A28.

In step A28, it is determined whether or not the document detector 28 at position P4 is turned off. If it is not turned off, it is determined that a jam has occurred and the document is jammed, and if it is turned off, the process advances to step A29. In step A29, the process is delayed for a time T6 and the process proceeds to step A30. In step A30, the stepping motor 29 is turned off and the process returns to the standby state.

Note that FIGS. 20(a), 20(b), and 20(c) are flowcharts showing processing in the upper unit oven state, document jam state, and serviceman call state.

In this way, the casing is structured so that it can be separated into an upper casing and a lower casing with the document transport path as a boundary, and these two cylindrical bodies are joined at one fulcrum (for example, one shaft of the paper ejection roller) to form the upper casing. By having a structure that can be opened and closed with respect to the lower housing, even if a document jams in the conveyance path, it can be easily and easily disposed of. Moreover, by providing a handle on the copper side of the housing where the above-mentioned fulcrum is provided, the user can easily lower and move the device by hand, making it extremely convenient. Be practical.

[Effects of the Invention] As detailed above, according to the present invention, even if a document jams in the conveying means, the jam can be cleared simply and easily, and the image can be easily lowered and moved by the user by hand. A reading device can be provided.

[Brief explanation of the drawing]

The drawings are for explaining one embodiment of the present invention, and FIG. 1 is a vertical side view of an image reading device, FIG. 2 is a view showing the upper unit in FIG. 1 opened, and FIG. 3 is an image Figure 4 is a block diagram showing the configuration of the control circuit. Figure 5 is a block diagram showing the input and output ports in Figure 4 in detail. Figure 6 is a fluorescent lamp tube. Controlling the wall wet surface 1 - Diagram showing the filtration device and its llllll1 part, Figure 7 shows the temperature of the tube wall! Timing chart for explaining il1wJPA, Figure 8 is a configuration diagram of the temperature detection circuit, Figure 9 is a configuration diagram showing details of the amplifier circuit and sample hold circuit in Figure 4, and Figure 10 is the operation of the sample hold circuit. 11 is a timing diagram for explaining the operation of the shading correction circuit. 14 is a diagram for explaining the image signal correction method by the shading correction circuit, FIG. 15 is a block diagram showing the left margin count circuit in FIG. 4 in detail, and FIG.
The figure is a timing chart for explaining the operation of the left margin count circuit, Figures 17 and 18 are diagrams showing commands and status in detail, and Figures 19 and 20 are timing charts for explaining the overall operation. The control program flowchart in FIG. 21 is a diagram showing the position M of each document detector with respect to the conveyance path and the document conveyance time between those positions. O... I vehicle volume, 1... Housing, 1a...
...Tsuchibe case, 1b...Lower PIS case, A
... Upper unit, B ... Lower unit, 2 ... Document insertion section, 3 ... Document ejection section, 4 ... Manual feed guide , 5... Paper discharge i-ray (discharge [・ray), 6... Conveyance path, 16... Fluorescent lamp (light source), 18.19.20
...Reflection mirror, 21 ... Lens, 2
2...Line sensor (photoelectric converter), 34...
····handle. Applicant's representative Patent attorney Takehiko Suzue Figure 3 Figure 5 Figure 8 Figure 7: : i : Nawate Figure 14 Figure 15 (a) Figure 19 (b) Figure 19 (C) Figure 19 Figure 20 Figure Genkiroguchi Figure 21 Procedures Amendment Written by the Director General of the Patent Office, Michibu Uga 1, Indication of the case Patent Application No. 163165/1983 2, Title of the invention Image reading device 3, Relationship with the case of the person making the amendment Patent Applicant 57 Voluntary Amendment 7, Contents of the Amendment (1) Clear “1i” (In Book B, line 11, line 15, “Figure 5” was replaced with “Figure 3”) (2) On page 22, line 20, page 23, line 3, and fourth page of the specification, the text "r103" is replaced with "104".
” he corrected. (3) In the 12th line of page 25 of the specification, the phrase "Pulse transformer 96 operates" has been replaced with "・Mother pulse transformer 96
"If it works," he corrects. (4) On page 26, line 13 of the specification, “pixel signal S
s 8s J is corrected as ``pixel signal S, and SaJ.'' (5) In the 17th line of page 38 of the specification, the ``standard density'' is corrected as ``standard density.'' (6) In the second and sixth lines of page 41 of the specification, the words "rQJ" are corrected to "mutual".

Claims (3)

[Claims] (1) A housing, a manual feed guide provided at one end of the housing to receive a document having an image to be read, and a manual feed guide provided inside the case to transport the document received by the manual feed guide toward the other end steel of the housing. a light source that is installed in the middle of the conveying means and irradiates the image surface of the document being conveyed; and a photoelectric conversion means that receives light from the document that is irradiated by the light source and converts it into an electrical signal. and an ejection means for ejecting the original transported by the transporting means onto the upper surface of the housing, and an ejection tray provided on the upper surface of the housing for storing the original ejected by the ejection means, has a structure that can be separated into an upper casing and a lower casing with the transportation means as a boundary, and these casings are joined at one fulcrum so that the upper casing can be opened and closed with respect to the lower casing, and the fulcrum of the casing is An image reading device characterized in that a handle is provided on the side surface of the image reading device for lowering and moving the device by hand. (2) The image reading device according to claim 1, wherein the manual feed guide and the ejection tray are detachably attached to the housing. (3) Relatively lightweight items such as the light source, photoelectric conversion means, and optical system associated therewith are housed in the upper housing, and relatively heavy items such as the power supply device and the drive motor for the conveying means are housed in the lower housing. The image reading device according to claim 1, wherein the image reading device is housed.