JPS62232224A - Loopback test method - Google Patents

Loopback test method

Info

Publication number
JPS62232224A
JPS62232224A JP61074273A JP7427386A JPS62232224A JP S62232224 A JPS62232224 A JP S62232224A JP 61074273 A JP61074273 A JP 61074273A JP 7427386 A JP7427386 A JP 7427386A JP S62232224 A JPS62232224 A JP S62232224A
Authority
JP
Japan
Prior art keywords
time slot
signal
loopback test
equipment
loopback
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61074273A
Other languages
Japanese (ja)
Inventor
Kiyotaka Nishi
清隆 西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61074273A priority Critical patent/JPS62232224A/en
Publication of JPS62232224A publication Critical patent/JPS62232224A/en
Pending legal-status Critical Current

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  • Maintenance And Management Of Digital Transmission (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

PURPOSE:To apply loopback test entirely independently of a terminal equipment by allowing a channel used for an opposite equipment to be tested to designate an equiment except the opposed equipment to apply loopback test. CONSTITUTION:A channel applying a loopback test of a bit multiplexer 3 does not send a reception signal to a terminal equipment 5 because the equipment number is an opposite station. In forming a loopback route 505 to a multiplex/ separation section 15, a data on an SYSX, CH1 is transferred onto a time slot of the SYSX, CH1, of a transmission time slot 504. The signal is sent to a reception time slot 502 of the bit multiplexer 1 and received by a time slot of the SYS1, CH1, but since the designated equipment number differs, the signal is not sent to the terminal equipment 4. Since the time slot 502 of the multiplex/separation section 14 in the CH 1 is detected as a signal when the signal is sent from the CH 1 of the time slot 501, the loopback test is executed entirely independently of the terminal equipment.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、高速ディジタル回線を利用した通信システム
における折返し試験方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a loopback test method in a communication system using a high-speed digital line.

〔従来の技術〕[Conventional technology]

従来、この種の折返し試験において第2図に示すように
端末装置4からの信号は、ビット多重装f!t1の低速
インターフェース部111に入力された後、多重・分離
部14に供給される。多重・分離部14では、低速イン
ターフェース部11z〜11nの信号を多重化して高速
ディジタル回線2へ、レベル変換して送出する。ビット
多重装置3の多重・分離部15ではレベル変換を行ない
、低速インターフェース部161〜16nへ各々の信号
を分離して送出すると低速インターフェース部では入力
された信号を端末装置5へ出力する。
Conventionally, in this type of loopback test, as shown in FIG. 2, the signal from the terminal device 4 is bit multiplexed f! After being input to the low-speed interface section 111 at t1, it is supplied to the multiplexing/demultiplexing section 14. The multiplexing/demultiplexing unit 14 multiplexes the signals from the low-speed interface units 11z to 11n, converts the level of the signals, and sends the signals to the high-speed digital line 2. The multiplexing/separating section 15 of the bit multiplexing device 3 performs level conversion and separates and sends each signal to the low-speed interface sections 161 to 16n.The low-speed interface section then outputs the input signal to the terminal device 5.

このような装置においてビット多重装置1を装置番号1
(sysl)とし、ビット多重装置3を装置番号2(s
yg2)とする。第3図はビット多重装置のタイムスロ
ットの内容を示し、ビット多重装置1のタイムスロット
201における送信タイムスロット301の設定内容は
、ビット多重装置1の低速チャネ/I/CH1のデータ
をビット多重装置2の装置番号2の低速チャネルCHf
に接続するということス で、5YS2.CHlと設定する。受信タイに4ツト3
02はビット多重装置ii2の低速チャネルCH1から
のデータをビット多重装置1の装置番号1の低速チャネ
ルCH1に接続するということで5YS1.CHlと設
定する。同様にビット多重装e2のタイムスロット20
2における受信タイムスロット304の設定内容は5Y
S2.CHlと設定で、送信タイムスロット305の設
定内容は5YS1.C田と設定する。このように設定す
ればこのタイムスロット低速チャネルからのデータを乗
せればビット多重装置1と2の間で通信可能状態となる
。このため、ビット多重製鎖3の折返しルート19また
は低速インターフェース部での折返しルート20で折返
しを行なえば、折返し試験ができる。
In such a device, bit multiplexer 1 is assigned device number 1.
(sysl), and bit multiplexer 3 is device number 2 (s
yg2). FIG. 3 shows the contents of the time slots of the bit multiplexer 1, and the settings of the transmission time slot 301 in the time slot 201 of the bit multiplexer 1 are such that the data of the low speed channel/I/CH1 of the bit multiplexer 1 is 2 device number 2 low speed channel CHf
By connecting to 5YS2. Set as CHl. 4 to 3 in reception tie
02 connects the data from the low-speed channel CH1 of the bit multiplexer ii2 to the low-speed channel CH1 of the device number 1 of the bit multiplexer 1, so 5YS1. Set as CHl. Similarly, timeslot 20 of bit multiplexing e2
The setting content of the reception time slot 304 in 2 is 5Y.
S2. CHl and the setting contents of the transmission time slot 305 are 5YS1. Set it as C. With this setting, if data from this time slot low-speed channel is loaded, it becomes possible to communicate between bit multiplexers 1 and 2. Therefore, a loop test can be performed by carrying out the loop using the loop route 19 of the bit multiplex chain 3 or the loop route 20 at the low-speed interface section.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

本来の折返し試験は端末装置に関係のない試験なので、
端末装置まで試験時の信号が到達しないことが望ましい
が、従来の方法ではこれを防ぐことができず、端末装置
によっては試験時の信号で誤動作することもあった。
The original return test is a test that has nothing to do with the terminal device, so
Although it is desirable that the test signal not reach the terminal device, conventional methods cannot prevent this, and some terminal devices may malfunction due to the test signal.

〔問題点を解決するための手段〕 このような欠点を解決するためにこの発明は、対向して
試験を行なう装置に用いるチャネルは狽相手側装置以外
の装置を指定し1枡遥七(折返し試験を行なうようにし
たものである。
[Means for Solving the Problem] In order to solve the above-mentioned drawbacks, the present invention provides that the channel used for the device that performs the test oppositely specifies a device other than the other device, and It was designed to be tested.

〔作 用〕[For production]

端末装置には全く関係なく折返し試験が行なわれる。 The loopback test is performed without regard to the terminal device.

〔実施例〕〔Example〕

第1図はこの発明を適用して折返し試販を行なうときの
説明図である。第1図でビット多重製電3におけるタイ
ムスロット402の受信タイムスロット503と送イに
タイムスロット504の内、低速チャネル番地CHIの
装置番号をビット多重装置3の装置番号2以外のXとい
う値にする。これにより、ビット多重装置1の送信タイ
ムスロット501上に乗って来た低速チャネルCHIか
らのデータは、ビット多重装置3の受信タイムスロット
503の5YSX 、 CHlのタイムスロット上に与
えられる。ビット多重装置3の折返し試験を行なうチャ
ネルは装置番号が対向する局になっていないので、受信
イぎ号を端末装置5に送出しない。ここで、多重・分離
部15に折返しルー) 505Th形成すると、5YS
X 、 CHl上に乗っているデータが送信タイムスロ
ット504の5YSX、CHlのタイムスロット上に転
送される。この信号はビット多重装置1の受信タイムス
ロット502に送信されて、5YS1.CI(1のタイ
ムスロット上で受信されるが、指定されている装置番号
が異なるので、この信号は端末装置4に送出されること
はない。しかし、多重・分離部14のタイムスロット5
02のCHlにおいては夕・fニスロット501のCH
lから送り出したら信号として検出することができるの
で、端末装置に全く関係なく折返し試験が行なわれる。
FIG. 1 is an explanatory diagram when conducting a return trial sale to which the present invention is applied. In FIG. 1, in the receiving time slot 503 of the time slot 402 in the bit multiplexing device 3 and the transmitting time slot 504, the device number of the low-speed channel address CHI is set to a value of X other than the device number 2 of the bit multiplexing device 3. do. As a result, data from the low-speed channel CHI that has arrived on the transmission time slot 501 of the bit multiplexer 1 is provided on the 5YSX, CH1 time slot of the reception time slot 503 of the bit multiplexer 3. Since the channel on which the loopback test of the bit multiplexing device 3 is performed does not correspond to an opposing station, the reception key signal is not sent to the terminal device 5. Here, if a loop loop) 505Th is formed in the multiplexing/demultiplexing section 15, 5YS
The data carried on X, CHl is transferred to the 5YSX, CH1 time slot of the transmission time slot 504. This signal is transmitted to the receive time slot 502 of the bit multiplexer 1 and is transmitted to the 5YS1. Although the signal is received on time slot CI (1), since the designated device number is different, this signal is not sent to the terminal device 4.
In CH1 of 02, CH of evening f Ni slot 501
Since it can be detected as a signal if it is sent out from l, the loopback test can be performed regardless of the terminal device.

〔発明の効果〕〔Effect of the invention〕

以上説明したようにこの発明は、折返しループを形成す
る装置に用いるチャネル相手側装置以外の装置全指定し
て折返し試験をするようにしたので、端末装置に全く関
係なく折返し試験が行なえるという効果を有する。
As explained above, the present invention has the advantage that the loopback test can be performed completely regardless of the terminal device because the loopback test is performed by specifying all devices other than the channel partner device used for the device forming the loopback loop. has.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明を適用してチャネル設定したときのチ
ャネル配列を示す図、第2図は装置の構成を示すブロッ
ク図、第3図は従来のチャネル配列を示竹である。 1.3・・・・ビット多重装置、2・・・・高速ディジ
タル回線、4.5・・・・端末装置、111〜11n、
161〜16nφ・拳・低速インターフェース部、14
,15 ・・―・多重・分離部、19,20゜505@
 ・・・折返しルート、201,202,401,40
2 拳・・・タイムスロット、301,305,501
,504−・・・送信タイムスロット、302,304
.502.503拳・・受信タイムスロット。
FIG. 1 is a diagram showing a channel arrangement when channels are set by applying the present invention, FIG. 2 is a block diagram showing the configuration of the device, and FIG. 3 is a diagram showing a conventional channel arrangement. 1.3... Bit multiplexing device, 2... High speed digital line, 4.5... Terminal device, 111 to 11n,
161~16nφ/fist/low speed interface part, 14
,15...Multiplexing/separating section, 19,20゜505@
...Return route, 201, 202, 401, 40
2 Fist...Time slot, 301, 305, 501
, 504-... Transmission time slot, 302, 304
.. 502.503 Fist... Reception time slot.

Claims (1)

【特許請求の範囲】[Claims] 複数の多重装置があり、それらがおのおの離れた位置に
設けられて通信系を構成し、それぞれの装置はチャネル
毎に任意の装置を指定して通信できる通信系であって、
折返しループを形成して折返し試験を行なう折返し試験
方法において、折返しループを形成する装置に用いるチ
ャネルは相手側装置以外の装置を指定して折返し試験す
ることを特徴とする折返し試験方法。
A communication system in which there is a plurality of multiplex devices, each of which is installed at a separate location to form a communication system, and each device can specify and communicate with any device for each channel,
A loopback test method in which a loopback test is performed by forming a loopback loop, characterized in that the channel used for the device forming the loopback loop designates a device other than the partner device for the loopback test.
JP61074273A 1986-04-02 1986-04-02 Loopback test method Pending JPS62232224A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61074273A JPS62232224A (en) 1986-04-02 1986-04-02 Loopback test method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61074273A JPS62232224A (en) 1986-04-02 1986-04-02 Loopback test method

Publications (1)

Publication Number Publication Date
JPS62232224A true JPS62232224A (en) 1987-10-12

Family

ID=13542344

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61074273A Pending JPS62232224A (en) 1986-04-02 1986-04-02 Loopback test method

Country Status (1)

Country Link
JP (1) JPS62232224A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01144750A (en) * 1987-11-30 1989-06-07 Nec Corp Loop-back testing system for bearer dividing transmission

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01144750A (en) * 1987-11-30 1989-06-07 Nec Corp Loop-back testing system for bearer dividing transmission

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