JPS62226229A - Program executing system - Google Patents
Program executing systemInfo
- Publication number
- JPS62226229A JPS62226229A JP61070121A JP7012186A JPS62226229A JP S62226229 A JPS62226229 A JP S62226229A JP 61070121 A JP61070121 A JP 61070121A JP 7012186 A JP7012186 A JP 7012186A JP S62226229 A JPS62226229 A JP S62226229A
- Authority
- JP
- Japan
- Prior art keywords
- program
- rom
- ram
- data
- loader
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 claims description 6
- 101100328887 Caenorhabditis elegans col-34 gene Proteins 0.000 abstract description 5
- 230000009466 transformation Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、実行方式、特に、ROM化されたプログラム
についてのプログラム実行方式に関する0〔従来の技術
〕
従来のプログラム実行方式は、ROM化されたプログラ
ムの場曾、CPUエク@接読み出さn1実行されていた
。Detailed Description of the Invention [Field of Industrial Application] The present invention relates to an execution method, particularly a program execution method for a program stored in a ROM. In the case of the program, the CPU execution @direct read n1 was being executed.
しかしながら、このような上述しt従来のプログラム実
行方式は、CPUよりROMを@接アクセスしているの
でプログラムの修正ができないという欠点がある。However, the above-mentioned conventional program execution method has the disadvantage that the program cannot be modified because the ROM is directly accessed by the CPU.
本発明のプログラム実行方式+1、ROMK格納に格納
さnたプログラムをRAMにロードするローダを有して
構成される。The program execution method of the present invention +1 includes a loader that loads the program stored in the ROMK into the RAM.
次に1本発明の実施例について、図面全参照して説明す
る。Next, an embodiment of the present invention will be described with reference to all the drawings.
第1図は本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing one embodiment of the present invention.
第1図に示すプログラム実行方式において、CPU1は
、ローダROM2お:びRAM4から命令を読み出し実
行するo CPUIはまずローダROM2を実行する。In the program execution system shown in FIG. 1, the CPU 1 reads and executes instructions from the loader ROM 2 and RAM 4. The CPU first executes the loader ROM 2.
ローダROM2は、プログラムの格納さnたROM5の
データをRAM4に転送する。デー読み出し、RAM4
のデータを修正する。データ修正後、ローダROM2は
RAM4に制御を渡し、プログラムを実行する。The loader ROM 2 transfers the data stored in the ROM 5 containing the program to the RAM 4. Read data, RAM4
Correct the data. After data modification, the loader ROM 2 passes control to the RAM 4 to execute the program.
本発明のプログラム冥行方式は、ROM化されたプログ
ラムを修正できる工うにすることにニジ、ROM化さn
友プログラムの品質を向上できるとともにコストを低減
できるという効果がある0The purpose of the program editing method of the present invention is to make it possible to modify programs stored in ROM.
It has the effect of improving the quality of the friend program and reducing costs0.
第1図は本発明の一実施例を示すブロック図である。
1・−・・・・CPU、2・・・・・・ローダROM、
3・・・・・・不揮発性lζAM、4・・・・・・R
AM、5・・・・・・ROM。
篤1図FIG. 1 is a block diagram showing one embodiment of the present invention. 1...CPU, 2...Loader ROM,
3...Non-volatile lζAM, 4...R
AM, 5...ROM. Atsushi 1 diagram
Claims (1)
たプログラムをRAMにロードする際、不揮発性RAM
に記憶したバッチ情報により、プログラムを修正し実行
することを特徴とするプログラム実行方式。In microcomputer systems, when loading a ROMized program into RAM, non-volatile RAM
A program execution method characterized by modifying and executing a program based on batch information stored in the computer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61070121A JPS62226229A (en) | 1986-03-27 | 1986-03-27 | Program executing system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61070121A JPS62226229A (en) | 1986-03-27 | 1986-03-27 | Program executing system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62226229A true JPS62226229A (en) | 1987-10-05 |
Family
ID=13422402
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61070121A Pending JPS62226229A (en) | 1986-03-27 | 1986-03-27 | Program executing system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62226229A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02114330A (en) * | 1988-10-24 | 1990-04-26 | Brother Ind Ltd | Method for storing program in equipment built-in type microprocessor |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58134353A (en) * | 1982-02-05 | 1983-08-10 | Nec Corp | Microprocessor device with battery back-up memory |
JPS5985545A (en) * | 1982-11-09 | 1984-05-17 | Fujitsu Ltd | Correcting and processing system for contents of system rom |
JPS6215635A (en) * | 1985-07-12 | 1987-01-24 | Matsushita Electric Ind Co Ltd | System controller |
-
1986
- 1986-03-27 JP JP61070121A patent/JPS62226229A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58134353A (en) * | 1982-02-05 | 1983-08-10 | Nec Corp | Microprocessor device with battery back-up memory |
JPS5985545A (en) * | 1982-11-09 | 1984-05-17 | Fujitsu Ltd | Correcting and processing system for contents of system rom |
JPS6215635A (en) * | 1985-07-12 | 1987-01-24 | Matsushita Electric Ind Co Ltd | System controller |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02114330A (en) * | 1988-10-24 | 1990-04-26 | Brother Ind Ltd | Method for storing program in equipment built-in type microprocessor |
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