JPS62226213A - Power supply control system - Google Patents

Power supply control system

Info

Publication number
JPS62226213A
JPS62226213A JP61069542A JP6954286A JPS62226213A JP S62226213 A JPS62226213 A JP S62226213A JP 61069542 A JP61069542 A JP 61069542A JP 6954286 A JP6954286 A JP 6954286A JP S62226213 A JPS62226213 A JP S62226213A
Authority
JP
Japan
Prior art keywords
power supply
power
control
program
supply control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61069542A
Other languages
Japanese (ja)
Inventor
Kenichi Kuroiwa
黒岩 謙一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61069542A priority Critical patent/JPS62226213A/en
Publication of JPS62226213A publication Critical patent/JPS62226213A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To control a power supply in a simple way by providing a flag register to a power supply control circuit to inform the propriety for break of the power supply through a program. CONSTITUTION:A central processing unit 1, a main storage device 2 and a flag register 3 are connected with each other via a common bus 7. Then the ON/OFF control is carried out to a power supply 6 by means of power supply switch 4 via a power supply control circuit 5. The write control of the register 3 is possible through the unit 1 in accordance with an instruction of the program of the storage device 2. Then the register 3 is read by an instruction of the circuit 5. Thus the information showing the ON/OFF state of the switch 4 as well as the store information on the register 3 are used as the control information on the circuit 5. Thus the circuit 5 performs the ON/OFF control of the power supply 6 in accordance with both information.

Description

【発明の詳細な説明】 技術分野 本発明は電源制御方式に関し、特に情報処理装置におけ
る装置電源のオンオフを制御する電源制御方式に関する
ものである。
DETAILED DESCRIPTION OF THE INVENTION TECHNICAL FIELD The present invention relates to a power supply control system, and more particularly to a power supply control system for controlling on/off of a device power supply in an information processing apparatus.

従来技術 従来、情報処理装置では、情報処理の実行中に利用者で
あるオペレータが不用意に装置の電源を切断した場合、
以後の電源立上げ時において、正常な処理動作が保証さ
れ得ないような処理状況が存在する。例えば、外部記憶
装置に対してデータの書込み処理中に、本来定められた
溜込み形式が十分に整わないまま電源が切断された場合
等が存在する。
BACKGROUND ART Conventionally, in an information processing device, if an operator, who is a user, inadvertently turns off the power of the device while information processing is being executed,
There are processing situations in which normal processing operation cannot be guaranteed when the power is turned on thereafter. For example, there may be a case where the power is turned off while the data is being written to an external storage device before the original storage format is fully established.

かかる状況を回避すべく、プログラムによる電源のオン
オフ制御を行う方式が考えられている。
In order to avoid such a situation, a method of controlling power supply on/off using a program has been considered.

このプログラムによる従来方式は、例えばセンスや割込
み等の動作によって電源スィッチの切断が−Hプログラ
ムに通知され、予め組込まれている電源切断処理プログ
ラムが起動されて現在実行中の処理を、電源切断されて
も不都合のない状態まで移行させ、しかる後に新ためて
プログラム制御により電源を切断するという方式となっ
ている。
In the conventional method using this program, the -H program is notified that the power switch is turned off by an operation such as a sense or an interrupt, and a pre-installed power-off processing program is started and the process currently being executed is terminated when the power is turned off. The system allows the system to transition to a state where there are no inconveniences, and then turns off the power again under program control.

しかしながら、この様な従来方式では、情報処理装置の
すべての処理状況を想定して電源切断処理プログラムを
組んでおく必要がある。また、複数の処理が同時に並行
動作する様な状況を想定した場合、全ての処理動作に対
して完全に配慮された処理プログラムを組むことは不可
能に近いという欠点がある。
However, in such a conventional method, it is necessary to prepare a power-off processing program assuming all processing situations of the information processing device. Furthermore, assuming a situation where a plurality of processes operate in parallel at the same time, there is a drawback that it is almost impossible to create a processing program that takes all processing operations into full consideration.

発明の目的 本発明は上記従来方式の欠点を排除すべくなされたもの
であり、その目的とするところは、センスや割込み等の
特別の動作を必要とすることなく、また特別の電源切断
処理プログラムを組込むことなく、極めて簡便な方式で
電源のオンオフの制御を実現できる電源制御方式を提供
することにある。
Purpose of the Invention The present invention has been made to eliminate the drawbacks of the above-mentioned conventional methods, and its purpose is to eliminate the need for special operations such as sensing and interrupts, and to eliminate the need for special power-off processing programs. It is an object of the present invention to provide a power supply control method that can realize power on/off control in an extremely simple method without incorporating a power supply.

発明の構成 本発明によれば、情報処理装置の電源のオンオフを制御
する電源制御方式であって、情報処理装置の処理手順を
定めたプログラムからの電源断可否情報を格納するレジ
スタ手段を設け、このレジスタ手段の格納情報が電源断
可を示すときのみ電源の断操作が可能となるようにした
ことを特徴とする電源制御方式が(qられる。
Structure of the Invention According to the present invention, there is provided a power control system for controlling the power on/off of an information processing device, which includes a register means for storing information on whether or not the power can be cut off from a program that defines a processing procedure of the information processing device. There is a power supply control system (q) characterized in that the power supply can be cut off only when the information stored in the register means indicates that the power supply can be cut off.

実施例 以下、図面を用いて本発明の詳細な説明する。Example Hereinafter, the present invention will be explained in detail using the drawings.

図において、中央処理装置1、主記憶装置2及びフラグ
レジスタ3は相互に共通バス7を介して接続されている
。電源スイッチ4は電源6のオンオフをオペレータの操
作に基づいて制御2Ilするだめのスイッチであるが、
この電源スィッチ4により直接電源6をオンオフするよ
うになっているものではなく、図示する如く電源制御回
路を介して電源6のオンオフ制御が行われるようになっ
ている。
In the figure, a central processing unit 1, a main memory 2, and a flag register 3 are connected to each other via a common bus 7. The power switch 4 is a switch for controlling the on/off of the power source 6 based on the operator's operation.
The power switch 4 is not designed to directly turn on and off the power source 6, but as shown in the figure, the power source 6 is controlled to be turned on and off via a power control circuit.

この電源制御回路5の制御 源スィッチ4のオンオフ状態を示す情報の他に、先のフ
ラグレジスタ3の格納情報が用いられる。
In addition to the information indicating the on/off state of the control source switch 4 of the power supply control circuit 5, the information stored in the flag register 3 is used.

この画情報に応じて電源制御回路5が電源6のオンオフ
制御を行うものである。
The power supply control circuit 5 performs on/off control of the power supply 6 in accordance with this image information.

フラグレジスタ3は中央処理装置1から書込み制御が可
能であり、主記憶装置2におけるプログラムの指示によ
り当該書込み制御が行われる。フラグレジスタ3の読出
しは電源制御回路5の指示により行われ、電源スィッチ
4(よオペレータによる操作が可能であり、このスイッ
チ4のオンオフ状態は電源制御回路5にて読取られるよ
うになっている。
The flag register 3 can be write-controlled by the central processing unit 1, and the write control is performed according to instructions from a program in the main storage device 2. The readout of the flag register 3 is performed according to instructions from the power supply control circuit 5, and the power supply switch 4 (which can be operated by an operator) is configured such that the on/off state of this switch 4 is read by the power supply control circuit 5.

ここで電源スイッチ4のオン状態時には論理「1」が、
またオフ状態時には論理「0」が夫々電源制御回路5に
より読取られるものとする。また、フラグレジスタ3の
格納情報が、論理「1」であれば電源6の断不可を示し
、論理「0」であれば斯可を示すものとする。そして、
電源制御回路5においては、電源スィッチ4の状態及び
フラグレジスタ3の内容が共にrOJの場合にのみ電源
6の断(オフ)を実行するものであり、他の場合は電源
6の所は行わないものとする。
Here, when the power switch 4 is in the on state, the logic is "1".
It is also assumed that logic "0" is read by the power supply control circuit 5 in the off state. Furthermore, if the information stored in the flag register 3 is a logic "1", it indicates that the power supply 6 cannot be cut off, and if it is a logic "0", it indicates that it is possible. and,
In the power supply control circuit 5, the power supply 6 is turned off only when the state of the power switch 4 and the contents of the flag register 3 are both rOJ, and in other cases, the power supply 6 is not turned off. shall be taken as a thing.

かかる構成において、先ず電源初期投入時には、フラグ
レジスタ3の内容は「0」であるものとすると、電源ス
ィッチ4の状態値は[1〕であることから、このとぎオ
ペレータが電源スィッチ4を操作して電源切断をなす場
合、フラグレジスタ3の内容及び電源スィッチ4の状態
値は共に「0」となるので、電源制御回路5は電源6を
断とするのである。
In such a configuration, when the power is initially turned on, it is assumed that the contents of the flag register 3 are "0", and the state value of the power switch 4 is [1]. When the power is turned off, the contents of the flag register 3 and the state value of the power switch 4 are both "0", so the power control circuit 5 turns off the power 6.

電源初期投入後にプログラムにより電源制御を行う場合
は以下の如くなる。プログラムIJ+作開始後、電源が
切断されると不都合が生じる処理を実行する場合、その
処理開始前にプログラムにてフラグレジスタ3に[1]
を出込み、処理終了1¥:2にrOJを出込む様に制御
するのである。こうすることにより、処理実行中にオペ
レータが不用Q.に電源スィッチ4をオフ操作してスイ
ッチ状態が「0」に変化しても、フラグレジスタ3の内
容は「1」であるから電源制リ11回路5は電源6の断
を実行しない。処理終了後に始めて、プログラムにより
フラグレジスタ3に「O」が書込まれるので、この時点
で電源6の断が始めて実行されることになる。
When power is controlled by a program after the power is initially turned on, the process is as follows. If you want to execute a process that will cause an inconvenience if the power is turned off after starting the program IJ+ operation, set the flag register 3 to [1] in the program before starting the process.
It is controlled so that rOJ is sent in and out, and rOJ is sent in and out at the end of processing 1 yen:2. This eliminates the need for an operator during processing. Even if the power switch 4 is turned off and the switch state changes to "0", the power control 11 circuit 5 does not turn off the power supply 6 because the content of the flag register 3 is "1". Since "O" is written in the flag register 3 by the program only after the processing is completed, the power supply 6 is turned off for the first time at this point.

発明の詳細 な説明したにうに、本発明によれば、電源制御回路と、
電源制御回路に電源切断の可否をプログラムから通知す
るためのフラグレジスタとを設け、フラグレジスタにて
プログラムがら電J≦(制御回路に電源切断の可否を通
知してj3 <ことに上り、センスヤ)割込み等を使用
せずかつ171別の電源切断処理プログラムを組込むこ
となく、簡易な方式で電源の制わ11を実現することが
でさるという効果がある。
As described in detail, according to the present invention, a power supply control circuit;
The power supply control circuit is provided with a flag register for notifying the program whether or not the power can be cut off, and the flag register is used to notify the program whether or not the power can be cut off. There is an effect that the power supply control 11 can be realized in a simple manner without using an interrupt or the like and without incorporating a separate power cutoff processing program 171.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明の実/Il!i関のブロック図である。 主要部分の符号の説明 1・・・・・・中央処理装置 3・・・・・・フラグレジスタ 4・・・・・・電源スィッチ 5・・・・・・電J≦1制U11回路 6・・・・・・電源 The figure is the fruit of the present invention/Il! FIG. Explanation of symbols of main parts 1...Central processing unit 3...Flag register 4...Power switch 5...Electric J≦1 system U11 circuit 6...Power supply

Claims (1)

【特許請求の範囲】[Claims] 情報処理装置の電源のオンオフを制御する電源制御方式
であって、情報処理装置の処理手順を定めたプログラム
からの電源断可否情報を格納するレジスタ手段を設け、
このレジスタ手段の格納情報が電源断可を示すときのみ
電源の断操作が可能となるようにしたことを特徴とする
電源制御方式。
A power supply control method for controlling power on/off of an information processing device, comprising a register means for storing information on whether or not power can be cut off from a program that defines a processing procedure of the information processing device,
A power supply control method characterized in that the power supply can be cut off only when the information stored in the register means indicates that the power supply can be cut off.
JP61069542A 1986-03-27 1986-03-27 Power supply control system Pending JPS62226213A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61069542A JPS62226213A (en) 1986-03-27 1986-03-27 Power supply control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61069542A JPS62226213A (en) 1986-03-27 1986-03-27 Power supply control system

Publications (1)

Publication Number Publication Date
JPS62226213A true JPS62226213A (en) 1987-10-05

Family

ID=13405710

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61069542A Pending JPS62226213A (en) 1986-03-27 1986-03-27 Power supply control system

Country Status (1)

Country Link
JP (1) JPS62226213A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0488519A (en) * 1990-08-01 1992-03-23 Fujitsu Ltd Power source disconnection control system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0488519A (en) * 1990-08-01 1992-03-23 Fujitsu Ltd Power source disconnection control system

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