JPS6222531B2 - - Google Patents

Description

Claim 1: A base body, a semiconductor chip attached to one surface of the base body, a heat transfer element disposed in close proximity to a second surface of the semiconductor chip, and a heat transfer element between the heat transfer element and the chip. a thin layer of a thermally conductive non-eutectic alloy disposed at the interface, the thermally conductive non-eutectic alloy being an alloy containing bismuth, lead, tin, and indium such that the temperature of the semiconductor chip is normal. 1. A semiconductor assembly equipped with cooling means, characterized in that the alloy is an alloy having a solidus temperature that falls within the solidus/liquidus temperature range when the operating temperature is exceeded.

2 The above alloy contains 51.45% bismuth by weight,
The semiconductor assembly of claim 1 having a composition of 31.35% lead, 15.20% tin and 2.0% indium.

3 The above alloy contains 48.35% bismuth by weight,
The semiconductor assembly of claim 1 having a composition of 28.15% lead, 14.50% tin, and 9.0% antimony.

〔Technical field〕

TECHNICAL FIELD This invention relates to cooling systems for integrated circuit chip devices and, more particularly, to methods and apparatus for maintaining low thermal contact resistance to achieve chip cooling.

[Background technology]

In integrated circuit (IC) chip device applications, it is highly desirable to maintain intimate contact at the interface between the chip and adjacent elements, such as heat sinks, while avoiding heavy loads on the chip surface. The adhesion serves to improve heat dissipation to prevent excessive temperature rise and to prevent undesirable consequences such as dimensional changes, uneven thermal expansion, etc. from occurring.

Proper heat dissipation requires removing heat from the semiconductor chip and dissipating it in an effective manner. Heat is generally transferred from one surface of the chip to a heat dissipator, e.g.
Cooling is transferred to the cooling device and from the opposite surface of the chip through the bond material to the substrate. The resistance to heat flow through the latter heat transfer path is relatively higher. Therefore, to maximize heat dissipation, the thermal resistance at the interface between the chip surface and the heat dissipation device must be minimized.

Traditional heat dissipation techniques for IC chip devices generally allow
Thermal control is possible up to the maximum allowable chip temperature of °C. However, with the trend of making semiconductor chips smaller, with higher circuit densities, and with higher power consumption, the amount of heat generated is rapidly increasing to the point where currently employed cooling technologies alone cannot solve the overheating problem. increases to Therefore, it is difficult to sufficiently reduce the thermal resistance at the chip interface. Additionally, it is extremely important to minimize thermal resistance at other interface locations of the heat sink structure.

However, the mechanical geometry of conventional IC chip assemblies affects the value of thermal contact resistance that can be achieved. For example, what appears to be a smooth, continuous bond between the chip surface and the heat transfer device
Most are actually just a series of relatively small number of contact points that create an invalid continuum. The contact interface thus provides a relatively high thermal resistance. Ideally, a small IC chip would have extremely low contact loads at the interface and low thermal resistance.
Desirable for devices. Furthermore, these conditions must be controlled and maintained at appropriate levels during the life of the product.

[Disclosure of the invention]

The technical problem solved by the present invention is efficient heat dissipation and temperature control in integrated circuit chip devices. Non-eutectic metal alloys are used to create low thermal resistance at the bridging interface between the chip device and the heat sink. The alloy has a solidus-liquidus temperature range and thus exhibits low thermal resistance if stressed during circuit operation, even with low contact loads at the chip device and heat sink interfaces. Has the ability to re-establish and maintain interfaces. In addition to the chip interface, the cooling means described above can also be used in other interfacial areas of the heat sink, depending on the design, as they achieve very low thermal resistance.

[Schematic description of drawings]

Figures 1A and 1B are IC circuit semiconductor chips illustrating the state of the interface between the chip surface and the heat sink surface under constant contact load when the chip temperature is below and above the solidus temperature, respectively. FIG. 3 is a cross-sectional view of the assembly.

FIG. 2 is a partially cutaway sectional view of an example of a heat sink of an IC chip assembly incorporating the present invention at the chip interface.

Figure 3 illustrates the thermal resistance reduction and maintenance characteristics at the chip interface with a constant interfacial contact load.
3 is a graph of interfacial resistance with respect to interfacial temperature.

FIG. 4 is a partially cut away cross-sectional view of another heat sink technique in an IC chip assembly incorporating the present invention at both the chip and cap interface.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to the figures, an IC package includes a semiconductor chip 10 which is connected to a substrate 12 by means of bond attachment 14, which may be, for example, a solder ball connection.
He is wearing a bond. A controlled loading force F, as indicated by the arrow, is applied to the chip 10 by, for example, a spring 16, so that the surfaces of the chip 10 and a pivotable piston-type heat transfer element 18 made of a highly thermally conductive material such as copper are applied. Works to maximize contact. Heat generated in the tip is conducted across the tip interface to the piston element and from the piston element to the surrounding structure by essentially gas conduction across the gap gap 26. The surrounding cap structure 20 serves as a cover for the IC package and as an additional heat dissipation means.

During assembly of an IC package in accordance with the present invention, a low temperature non-eutectic bismuth alloy 22 is bonded to the thermally conductive elements. The alloy used in the preferred embodiment is a commercially available Ostalloy (manufactured by Arconium, USA). Its alloy is 51.45% bismuth, lead
Contains 31.35%, 15.20% tin, 2.0% indium, approx.
Solidus temperature T _S of 88°C and liquidus temperature T S of approximately 112°C
Characterized by _L. Other low melting temperature alloys that may be used are 48.35% bismuth, 28.15% lead, and tin.
14.50% and antimony 9.0%, approximately 87
It has a solidus temperature of 128°C and a liquidus temperature of about 128°C. Additionally, other compositions may be used depending on the desired temperature operating conditions of the IC device.

Bismuth alloy 22 is placed on the heatsink surface at approximately
Adhered to a thickness of 0.05mm. However, the attachment initially only makes actual contact with the surface of the chip 10 at the spacing between the cavities 24, as shown in FIG. 1A. In the initial state of such alloys, with random contact of the cooling chip surfaces over small collective heat transfer areas, the interfacial thermal resistance is relatively high and the thermal conductivity is relatively low.

During IC package assembly and after the alloy is deposited, the temperature of the device is increased to the melting range of the alloy. As the temperature of the chip increases to a temperature _TC above the solidus temperature _TS , the bismuth alloy melts and adapts to fill the void space 24 under viscous flow conditions under the action of an applied force F. (1st
Figure B). The resulting increased contact area and improved thermal path between the chip and the heat transfer element through the alloy that now fills the cavity causes a sharp decrease in the interfacial thermal resistance, thus reducing excess allows effective dissipation of heat. In this basic process, the above-mentioned local accommodation effects of the thin alloy layer are localized to the interfacial region by the controlling effects of surface tension.

During continued processing of the part, if cracks occur at the contact interface between the surface of the chip and the heat transfer element due to, for example, dimensional variations, thermal expansion differences, impact loading effects, etc. For example, the thermal contact resistance increases instantaneously due to the reoccurrence of voids.
The result is a brief temperature rise through the melting range of the alloy, thereby restoring the low thermal resistance, followed by a rapid drop in temperature to the initial settled state. In short, a self-healing process occurs in which the alloy melts to conform to the chip surface, so that the thermal contact resistance is lowered and maintained at a lower temperature level.

In a good embodiment, a chip interfacial thermal resistance of 0.1 to 0.2° C./watt is obtained at a contact load of approximately 100 grams. By comparison, the resistance levels achieved by means of the present invention are approximately five to seven times lower than those achieved with thermal transfer greases.

A process according to the invention is illustrated in FIG. During assembly, the reflow process reduces the relatively high resistance R _H to a low resistance level R _L . Decreasing the temperature below maximum operating conditions maintains the resistance at such a low level R _L within the operating temperature range. However, if an interfacial disturbance occurs, as shown at point A, the increase in resistance causes an increase in temperature to enter the pasty range, in which both resistance and temperature increase. rapidly decrease to their respective initial states. For example, the maximum solidus temperature △T _MS is 1
-3°C, solidus/liquidus temperature ΔT _SL is in the range of 15-25°C.

The system of the present invention is always in the solid state under normal operating conditions. Penetration into the solidus/liquidus range for thermal resistance/temperature recovery takes a very short amount of time compared to the product's lifespan. Since the system is substantially permanently in the solid state, contact loads at the interface are low and undesirable metallurgical phenomena are essentially eliminated. Moreover, once an initial low resistance value R _L is obtained, disturbances on the chip surface cause an instantaneous increase in resistance. These small resistance changes are removed in a very short time. The disclosed self-healing technology maintains extremely low thermal resistance levels without the need for extra reflow steps. The disclosed technology ensures long-term maintenance of low thermal resistance at the chip interface. This is extremely important as chip size decreases and heat dissipation requirements increase.

In addition to achieving low thermal resistance at the chip interface by applying the heat sink technique shown in FIG. 2, the present invention can be applied to obtain low thermal resistance at other interfaces of the heat sink structure. An example of such a structure in which the present invention is used at both the tip and cap interfaces is shown in FIG. A controlled load force F is applied diagonally, for example by a spring 16, towards the pivoted piston heat transfer element 18 as shown by the arrow. With this configuration, the heat transfer element 18 between the tip surface 10 and the cap surface 20
The surface contact of is maximized, and each loading force component F
Performed by _V and F _H. bismuth alloy 22
is applied to each surface of the piston to a thickness of approximately 0.05 mm. However, as shown in FIG. 1A, initially there is only actual contact with the surface of chip 10 at discrete points between cavities 24. Similarly, the contact between the surface of cap body 20 and alloy 22 involves point contact and void space. In the initial state of this alloy, where the cooled chip surface and cap surface are in random contact over a small concentrated heat transfer area, the thermal resistance at the interface is relatively high;
And heat transfer is relatively low.

During IC package assembly after the bismuth alloy has been deposited, the temperature of the device is increased to the melting range of the alloy. When the temperature of the chip is increased to a temperature T _C higher than the solidus temperature T _S , the bismuth alloy melts and fills the void space as described above under the action of the applied force component F _V . Essentially at the same time, the alloy at the cap interface melts due to the high thermal conductivity of the intervening piston material and fills the void space in this region under the action of the applied force component F _H . As a result, the contact area between both interfaces increases, so that the thermal resistance decreases rapidly, effectively dissipating excess heat.

During continued operation of this part, if a tear occurs at the interface for the reasons previously explained in connection with tip contact, a void will reoccur at the tip/cap interface. Thermal contact resistance increases instantaneously due to As a result, a brief temperature rise step is present in the melting range of the alloy, whereby the low thermal resistance is restored, followed by a rapid drop in temperature to the initial undisturbed state. In short, a self-healing process occurs in which the alloy melts to conform to the tip and cap surfaces, so that the contact thermal resistance is reduced and maintained at a low level.

The process according to the invention is illustrated in FIG. 3 as an example of chip contact surface conditions. The process of cap interface state is the same as that of chip contact. Thus, at both interface conditions, the relatively high resistance R _H during assembly is reduced to a lower level R _L by the reflow process. Even as the temperature decreases below maximum operating conditions, the resistance remains at such a low level R _L of the operating temperature range. If interfacial disturbance occurs, the self-healing action of the alloy provides low thermal resistance and rapid recovery of temperature in the manner described above in connection with FIG.

As mentioned above, in a good embodiment a chip interfacial thermal resistance of 0.1 to 0.2°C/watt is obtained at a contact load of approximately 100 grams. If we increase the relative contact area between the bismuth alloy and the cap surface with this contact load, the corresponding desirable cap interface thermal resistance is
The temperature ranges from 0.01 to 0.02℃/watt.

The IC chip cooling techniques illustrated in FIGS. 2 and 4 represent only two of the many possible configurations for achieving and maintaining efficient heat dissipation. The structure of the present invention is suitable for applications requiring heat dissipation of 9-20 watts/chip.