JPS6222441A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6222441A
JPS6222441A JP16273385A JP16273385A JPS6222441A JP S6222441 A JPS6222441 A JP S6222441A JP 16273385 A JP16273385 A JP 16273385A JP 16273385 A JP16273385 A JP 16273385A JP S6222441 A JPS6222441 A JP S6222441A
Authority
JP
Japan
Prior art keywords
semiconductor substrate
electrode
semiconductor device
insulator
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16273385A
Other languages
Japanese (ja)
Inventor
Tsutomu Suzuki
勉 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP16273385A priority Critical patent/JPS6222441A/en
Publication of JPS6222441A publication Critical patent/JPS6222441A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a semiconductor device having high reliability by treating the back of a semiconductor substrate under the state in which the whole surface of the semiconductor substrate is coated with an insulator. CONSTITUTION:Predetermined wirings 2 and an electrode 3 connected to an external lead are formed onto a semiconductor substrate 1, on the surface thereof an element is shaped, and the whole surface of the substrate is coated with an insulator 4. The back of the semiconductor substrate 1 is treated (treatment such as a thinning to predetermined thickness of the substrate), and washed in a washing tank 5 filled with a washing 6. The back of the semiconductor substrate is washed plural times as required, the semiconductor substrate 1, the back thereof is treated completely, and a window is bored to the electrode 3 section for the insulator 4. The external lead is connected to the electrode 3, thus manufacturing a semiconductor device.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体装置の製造方法に関し、特に表面に素
子が形成された半導体基板の裏面処理工程に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a process for processing the back surface of a semiconductor substrate on which elements are formed.

〔概要〕〔overview〕

本発明は、表面に素子が形成された半導体基板の裏面処
理工程において、 この裏面処理を上記半導体基板表面全体を絶縁物で覆っ
た状態で行うことにより、 外部取出し電極に生成される金属化合物の発生を防止し
、信頼性の高い半導体装置が得られるようにしたもので
ある。
In the present invention, in the back surface treatment process of a semiconductor substrate on which elements are formed, the back surface treatment is performed with the entire surface of the semiconductor substrate covered with an insulator, thereby reducing the amount of metal compounds generated on the external lead electrode. This is to prevent the occurrence of such problems and to obtain a highly reliable semiconductor device.

〔従来の技術〕[Conventional technology]

従来、半導体装置の製造方法は、第2図(a)〜(e)
に示すように、表面に素子が形成された半導体基板1の
表面に配線2をほどこした後に、表面全体を絶縁物4で
覆い、外部リードとの接続を目的として、電極3の窓あ
けを行い、その後半導体基板裏面処理を行っている。
Conventionally, the manufacturing method of a semiconductor device is as shown in FIGS. 2(a) to (e).
As shown in the figure, after wiring 2 is placed on the surface of a semiconductor substrate 1 on which elements are formed, the entire surface is covered with an insulator 4, and a window is made for the electrode 3 for the purpose of connection with an external lead. Then, the backside of the semiconductor substrate is processed.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の半導体装置の製造方法においては、外部
リードと接続するための電極3が露出した状態で半導体
基板裏面処理工程を行うので、第2図Td)に示すよう
に裏面処理工程における各種の溶剤の洗浄工程を通る。
In the conventional semiconductor device manufacturing method described above, the semiconductor substrate backside processing step is performed with the electrodes 3 for connection to external leads exposed, so that various problems occur during the backside processing step as shown in FIG. 2 Td). Go through a solvent washing step.

そのため、電極3を形成する金属が溶剤中の塩基物と化
学反応し、電極金属の塩化物7が生成される。この状態
で、樹脂封正型半導体装置を製造し、耐湿性、信頼度試
験を実施すると樹脂中に入りこんだ水と電極塩化物と反
応し電極腐食による故障を生じ、半導体装置の信頼性を
低下させる欠点があった。
Therefore, the metal forming the electrode 3 chemically reacts with the base in the solvent, and the chloride 7 of the electrode metal is generated. If a resin-encapsulated semiconductor device is manufactured in this state and moisture resistance and reliability tests are performed, the water that has entered the resin will react with the electrode chloride, causing failure due to electrode corrosion and reducing the reliability of the semiconductor device. There was a drawback.

本発明の目的は、上記の欠点を除去することにより高信
頼性の半導体装置を得ることのできる半導体装置の製造
方法を提供することにある。
An object of the present invention is to provide a method for manufacturing a semiconductor device that can obtain a highly reliable semiconductor device by eliminating the above-mentioned drawbacks.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、素子が表面に形成された半導体基板の裏面処
理工程において、この裏面処理を上記半導体基板表面全
体を絶縁物で覆った状態で行うことを特徴とする。
The present invention is characterized in that, in a backside treatment step of a semiconductor substrate on which elements are formed, the backside treatment is performed with the entire surface of the semiconductor substrate covered with an insulator.

〔作用〕[Effect]

本発明は、半導体基板表面全体を絶縁物で覆っているた
め、半導体基板裏面処理工程で、外部リードと接続する
電極が各種溶剤と接触することがないので、従来のよう
に電極金属の塩化物が発生しない。従って、この裏面処
理後に、絶縁物に電極の窓あけを行うことにより、高信
頼性の半導体装置ができる。
In the present invention, since the entire surface of the semiconductor substrate is covered with an insulator, the electrodes connected to the external leads do not come into contact with various solvents during the backside processing process of the semiconductor substrate. does not occur. Therefore, by opening electrode windows in the insulator after this backside treatment, a highly reliable semiconductor device can be obtained.

〔実施例〕 次に、本発明の実施例について図面を参照して説明する
[Example] Next, an example of the present invention will be described with reference to the drawings.

第1図(al〜(e+は本発明の一実施例を示す説明図
で、半導体装置の模式的断面図あるいは製造状態図を示
す。まず、同図(alに示すように、表面に素子が形成
された半導体基板l上に所定の配線2および外部リード
と接続される電極3が形成される。
Figures 1 (al to (e+) are explanatory diagrams showing one embodiment of the present invention, which are schematic cross-sectional views or manufacturing state diagrams of a semiconductor device. First, as shown in Figure 1 (al), elements are shown on the surface. Predetermined wiring 2 and electrodes 3 connected to external leads are formed on the formed semiconductor substrate l.

次に同図tb)に示すように基板表面全体を絶縁物4で
被覆する。次に同図(C1に示すように半導体基板lの
裏面処理(基板を所定の厚さに薄くするなどの処理)を
行い、洗浄液6が満たされた洗浄槽5中で洗浄を行う。
Next, as shown in Figure tb), the entire surface of the substrate is covered with an insulator 4. Next, as shown in FIG. 1 (C1), the back side of the semiconductor substrate 1 is processed (processing such as thinning the substrate to a predetermined thickness), and the semiconductor substrate 1 is cleaned in a cleaning tank 5 filled with a cleaning liquid 6.

この洗浄は必要に応じ複数回行われる。かくして同図(
d)に示す裏面処理済みの半導体基板1が得られる。次
に同図(e)に示すように、絶縁物4の電極3部分の窓
開けを行う。あとはこの電極3に外部リードを接続する
ことで半導体装置ができあがる。
This cleaning is performed multiple times as necessary. Thus, the same figure (
A backside-treated semiconductor substrate 1 shown in d) is obtained. Next, as shown in FIG. 4(e), a window is opened in the electrode 3 portion of the insulator 4. All that is left to do is to connect external leads to this electrode 3 to complete the semiconductor device.

本発明の特徴は、裏面処理が従来例の第1図(d)に対
して第1図(C,)に示す状態で行われることにある。
A feature of the present invention is that the back surface treatment is performed in the state shown in FIG. 1(C,), as opposed to the conventional example shown in FIG. 1(d).

(発明の効果〕 以上説明したように本発明は、上記の方法により、外部
リードと接続するための電極が、半導体基板の裏面処理
工程で各種の溶剤と接触することが無くなるので、この
電極の塩化物等の化合物の生成もない。このため、樹脂
封止型半導体装置の耐湿性信頼度試験において樹脂中に
水が入りこんでも、この電極との反応は弱(電極腐食時
間も長く、故障も生じにくくなり、高信頼性の半導体装
置が得られる効果がある。
(Effects of the Invention) As explained above, in the present invention, the method described above prevents the electrode for connection with the external lead from coming into contact with various solvents during the back surface treatment process of the semiconductor substrate. There is no generation of compounds such as chlorides.For this reason, even if water gets into the resin during moisture resistance reliability testing of resin-encapsulated semiconductor devices, the reaction with this electrode is weak (electrode corrosion takes a long time and there is no risk of failure). This has the effect of making it difficult for this to occur, resulting in a highly reliable semiconductor device.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)〜(e)は本発明の一実施例を示す説明図
。 第2図(a)〜(e)は従来例を示す説明図。 1・・・半導体、基板、2・・・配線、3・・・電極、
4・・・絶縁物、5・・・洗浄槽、6・・・溶剤、7・
・・金属塩化物。 特許出願人 日本電気株式会社11.、、−代理人  
弁理士 井 出 直 孝“5 ;′り、こ・ン 実施例説明図 ;v)1  圓
FIGS. 1(a) to 1(e) are explanatory diagrams showing one embodiment of the present invention. FIGS. 2(a) to 2(e) are explanatory diagrams showing a conventional example. 1... Semiconductor, substrate, 2... Wiring, 3... Electrode,
4... Insulator, 5... Cleaning tank, 6... Solvent, 7...
...Metal chloride. Patent applicant: NEC Corporation 11. ,,−agent
Patent Attorney Naotaka Ide “5;'ri,ko・n Example explanatory diagram;v)1 En

Claims (1)

【特許請求の範囲】[Claims] (1)素子が表面に形成された半導体基板の裏面処理工
程において、 この裏面処理を上記半導体基板表面全体を絶縁物で覆っ
た状態で行う ことを特徴とする半導体装置の製造方法。
(1) A method for manufacturing a semiconductor device, characterized in that in a backside treatment step of a semiconductor substrate on which elements are formed, the backside treatment is performed with the entire surface of the semiconductor substrate covered with an insulator.
JP16273385A 1985-07-22 1985-07-22 Manufacture of semiconductor device Pending JPS6222441A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16273385A JPS6222441A (en) 1985-07-22 1985-07-22 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16273385A JPS6222441A (en) 1985-07-22 1985-07-22 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6222441A true JPS6222441A (en) 1987-01-30

Family

ID=15760230

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16273385A Pending JPS6222441A (en) 1985-07-22 1985-07-22 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6222441A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5913130A (en) * 1996-06-12 1999-06-15 Harris Corporation Method for fabricating a power device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5913130A (en) * 1996-06-12 1999-06-15 Harris Corporation Method for fabricating a power device
US6078077A (en) * 1996-06-12 2000-06-20 Intersil Corporation Power device
US6236083B1 (en) 1996-06-12 2001-05-22 Intersil Corporation Power device

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