JPS62223858A - Digital information signal recording and reproducing system - Google Patents

Abstract

PURPOSE:To prevent the drop-out of an information signal by recording the position where a digital information signal is discontinuously recorded on a track, namely, the code for detecting and correcting an error immediately after a preamble part, thereafter, recording the information signal. CONSTITUTION:If a synchronizing signal SYNC is not detected by the first data block at the time of the reproduction of tracks T1, T2, ..., the reading of the data block of a parity Q which is a code for detecting and correcting an error is made erroneous. If the synchronizing signal SYNC is detected while the parity Q of several data blocks is reproduced, the data block of a subsequent sound data DATA 1 can be correctly read. The data block of the parity Q, of which reading is made erroneous, can be known by a parity P of respective data blocks and it is unnecessary to reproduce the erroneous parity Q by interpolation. Thus, the probability that the data block of sound data DATA 1 exceeds the error correcting limit and the drop-out of the sound data DATA 1 occurs comes to be very small and the number of the interpolated sound data DATA 1 can be decreased.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a digital information signal recording and reproducing system, and in particular to a method for recording and reproducing digital information signals on a magnetic tape using a rotating head.
The present invention relates to a digital information signal recording and reproducing method for reproducing.

2. Description of the Related Art Conventionally, there have been devices for recording and reproducing digital audio signals on magnetic tape. In this case, error detection and correction codes P and Q are generated and added to the audio data DATA1.2 as shown in FIG. The correction code is used as a data block, and it is the same for each data block! 'J] signal is added to generate a digital audio signal.

In a conventional rotary head type digital audio signal recording and reproducing apparatus (RDAT), as shown in FIG. is harmed. Of course, preambles and postambles for data block reproduction are provided for several data blocks at the scanning start and end positions of each track. In addition, each track T+, T2
, . . . are scanned in the direction of arrow B, and the magnetic tape 1 runs in the direction of arrow C.

FIG. 3 shows a circuit diagram of an example of a block synchronization circuit installed in the reproduction system. In the figure, terminals 10 and 11 each have a data clock separated from the reproduced signal.

A digital audio signal comes in. The sync pattern detector 12 shifts the digital audio signal by 1 to 1 using the data clock, and detects the synchronization signal of each data block.
Outputs level detection signal.

When the synchronization signal is not detected a predetermined number of times m (m is 4 or 8, for example), the mismatch counter 13 outputs a level of 1'', and at this time, the detection signal is sent to the reset terminal of the inertia counter 15 via the AND circuit 14. Supplied to R. After resetting, the inertia counter 15 counts n bits, which is the number of bits of one data block, [every time it counts 1 &0]
:Outputs an H level block synchronization signal.

The AND circuit 16 outputs a match signal when the detection signal and the block Ivl number match. This coincidence signal and the detection signal from the AND circuit 14 are supplied to the reset terminal R of the mismatch counter 13 via the OR circuit 17, and the block synchronization signal is supplied to the counting input terminal of the mismatch counter 13. Therefore, when the detection signal and the block synchronization signal are no longer synchronized, the mismatch counter 13 outputs a 1-level signal for the output block synchronization signal of the inertia counter 15, and when the count value exceeds a predetermined value m, it outputs a 1-level signal. do.

Further, the digital audio signal is delayed by n bits in a delay circuit 18, synchronized with the block synchronization signal, and outputted from a terminal 19. The block synchronization signal is output from terminal 20.

Problems to be Solved by the Invention In the circuit shown in the third diagram above, if the synchronization signal is not detected in the first data block following the preamble section due to dropout, etc., the block synchronization signal is synchronized with the digital audio signal. Therefore, the probability that the first data block of the digital audio signal exceeds the error correction limit increases. In this case, conventionally, audio data is recorded in the first data block, so some of the audio data drops out, and the dropped audio data must be interpolated with the audio data that has been cut by 1. Furthermore, there was a problem that even interpolation could not be performed, making it impossible to reproduce the audio.

Therefore, the present invention first records an error detection and correction code, and
It is an object of the present invention to provide a digital information signal recording and reproducing method that solves the above problems by subsequently recording an information signal.

Means for Solving the Problems In the present invention, an error detection and correction code is recorded at a position on a track where a digital information signal is discontinuously recorded, that is, immediately after the preamble section, and then the information signal is recorded. Shout.

In the present invention, even if block synchronization is not achieved in the first data block following the preamble, since the error detection and correction code is recorded in this data block, the data block of the error detection and correction code is Block synchronization can be achieved during multiple playbacks, and dropouts of information signals can be prevented.

Embodiment FIG. 1 shows a block system diagram of an embodiment of the system of the present invention. In the figure, terminals 30a and 30b each have a left channel,
Analog audio signals for each of the right channels are input. The left and right channel audio signals are respectively passed through low-pass filters 318 .
After unnecessary high-frequency components exceeding the audible band are removed in step 31b, the signal passes through sample and hold circuits 32a and 32b to an A/D converter 33a.

33b, where it is digitized.

The digitized audio signals of the left and right channels are supplied to an encoder 36. Here, one field is defined as a period during which a rotary head 40, 41, which will be described later, rotates 1/2 and one track is recorded on the magnetic tape.

The encoder 36 has the configuration shown in FIG. In the same figure, terminals 70a and 70b have A/[] conversion: 33a,
A digitized audio signal or audio data from 33b comes in and is supplied to memory 71 and Q generation circuit 72. Further, a field synchronization signal for synchronizing the field is inputted to the terminal 73 from a servo circuit 37, which will be described later, and is supplied to the control 911 circuit 74.

The control circuit 74 controls the memory 7 in synchronization with the field synchronization signal.
An address signal and a write control signal are supplied to the memory 71, and audio data DATA1 and DATA2 for one field are stored at a predetermined address in the memory 71. In addition, the control circuit 74 generates a start signal in synchronization with field synchronization (No. 3) and supplies it to the Q generation circuit 72. A parity Q, which is a code for detection and correction, is generated, and this parity Q is supplied to the memory 71 and is aged.As a result, the memory 71 stores, for example, the parity Q shown in FIG. 5(A) and the audio data []. TA1.1) ATA2 is written. The audio data DATA1 is, for example, an odd-numbered sample of the left and right channel 17, and data DATA2 is an even-numbered sample.

Each row of parity Q is generated from each horizontal row of audio data DATA1.1)ATA2. J'3, the parity P shown in FIG. 5(A) is not written to the memory 71.

After guessing the parity Q, the parity Q and the audio data DATA1. DATA2 is read out sequentially. This readout is performed column by column from the left end of FIG. 5 (Δ) to the right.

The P generation circuit 75 supplies parity Q on a column-by-column basis.

Audio data DATA1. I] Generate parity P, which is an error detection and correction code, for each column of ΔTA2 (add d and supply it to the data block forming circuit 76).

The data block forming circuit 76 adds a synchronizing signal 5YNC to each column of audio data DATA1 and DATA2, and adds a synchronizing signal 5YNC to each column of audio data DATA1.
A data block as shown in Figure (B) is formed, and the terminal 77
output as a digital audio signal. Figure 5 (C)
Preamble and postamble signals for data clock recovery for several data blocks are transmitted before and after the data area in which one field's worth of data blocks are transmitted, as shown in FIG.

The digital audio signal for one field period outputted from the terminal 77 is converted to 8/10 (8/10) by the modulation circuit 38, for example.
After being modulated, the magnetic tape 4 is supplied from a recording circuit 39 to rotary heads 40 and 41 attached at 180 degree rotational angle positions of a rotary cylinder (not shown).
3 tracks inclined in the longitudinal direction.

Therefore, the track T+, which is recorded on the magnetic tape 43,
．． ..., several data blocks of parity Q, which is an error detection and correction code, are written at each of the nine scan start positions shown in FIG.
TA1. DATA2 is written.

By the way, the servo circuit 37 rotates the rotary cylinder to which the rotary head 40.degree. 41 is attached in synchronization with the field synchronization signal. Therefore, the rotating head 40.41
The digital audio signal is recorded in such a manner that the code is completed within each track. Further, the servo circuit 37 supplies a control signal generated from the field signal to the fixed head 42, and a control track Tc is recorded in the longitudinal direction of the magnetic arc 43.

During reproduction, track T+ of the magnetic tape 43,
The reproduction signals reproduced by the rotary heads 40, 41 from T2, .
The reproduced signal reproduced by the fixed head 42 is supplied to the servo circuit 37. The servo circuit 17 controls the rotation of the rotary cylinder so that the control signal is synchronized with the field synchronization signal. The reproduction signal output from the reproduction circuit 50 is passed through a waveform equalization circuit 51 to prevent code amount interference.
After passing through, it is supplied to the demodulation circuit 52, where the bit clock is extracted and 8710 demodulated, and it is made into a digital audio signal. This demodulation circuit 52 incorporates a block synchronization circuit shown in FIG.

This digital audio signal is supplied to a decoder 53.

The field synchronization signal is supplied to the decoder 53 from the servo circuit 17, and is subjected to processing such as interleaving, error correction, time axis correction, and expansion.
Audio data DATA1 shown in FIG. DATA2 is 1
Q, left side 1? The digitized audio signal of the right channel and the digitized audio signal of the right channel are separated and output.

The digitized audio signals of the left and right channels are converted into analog signals by D/A converters 57a and 57b, respectively, and then deglitched and noise components generated during D/A conversion are removed by 1q paths 58a and 58b. Furthermore, low-pass filter 5
In steps 9a and 59b, unnecessary high-frequency components exceeding the audible frequency band are removed. This allows the left channel to be connected to each of the terminals 60a and 60b.

The analog audio signal of the right channel is output.

By the way, when the synchronization signal 5YNC is not detected in the first data block when reproducing tracks T+, T2, . . . , the data block of parity Q, which is an error detection and correction code, is read incorrectly. However, if the synchronization signal 5YNC is detected while reproducing the parity Q of several data blocks, it is possible to accurately read the subsequent data blocks of the audio data DATA1. A data block with a parity Q that has been read incorrectly can be known from the parity P of each data block, and there is no need to reproduce the incorrect parity Q by interpolation. Therefore, the audio data D
The probability that data block [1-] of ATA1 exceeds the error correction limit and a dropout error 1- of audio data DATA1 occurs is much smaller than before, and the number of interpolated audio data DATAI can be reduced.

Note that the audio data DATA1. D
ATA2 and Pariai Q may be written as shown in FIG. 2(A). In this case, it is sufficient to change the order of reading from the memory 71.

Note that part of the parity Q in multiple columns (
For example, 1/2) is read out, and then audio data DAT is read out.
AI is read, then the parity Q of the remaining columns is read, and then the audio data DATA2 is read, thereby creating the track T1. T2. ... may be recorded. In this case, tracks T+, T2, .
The number of parity Q data logs recorded at the beginning of each is an arbitrary value depending on the probability of block synchronization error during reproduction.

Furthermore, as shown by diagonal lines in FIG. 7(B), when recording with an interblock gap IBG, the first preamble part of the track, the interblock gap I
Parity Q data blocks are recorded following each preamble section after BG, and then audio data DATA1.
Record each DATA2. As a result, even when block synchronization is not achieved in the first data block after the interblock gap IBG, the audio data DATA
2 can be prevented from dropping out.

Note that the digital information signal may be other than a digital audio signal, such as a digital video signal, etc.
It is not limited to the above embodiments.

Effects of the Invention As described above, the digital information signal recording and reproducing method according to the present invention uses error detection and correction codes for several data blocks even when a synchronization signal cannot be detected in the first data block from a discontinuous portion of a digital information signal. It has features such as being able to achieve block synchronization during playback, significantly reducing the probability of information signal dropout compared to conventional methods, and reducing the amount of interpolated information signals. There is.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the method of the present invention, and FIG.
3 is a circuit diagram of an example of a block synchronization circuit, FIG. 4 is a circuit diagram of an embodiment of an encoder, and FIG. 5 is a diagram for explaining the conventional method. A diagram for explaining an example of a signal format,
FIGS. 6 and 7 are diagrams for explaining each recording track pattern according to the method of the present invention. 36... Encoder, 40, 4.1... Head to times Φ, 43... Magnetic tape, 52... Demodulation circuit, 53
...Decoder, 71...Memory, 72...Q generation circuit, 74...Control circuit, 75...P generation circuit. Figure 3 What Figure 4 Figure Yu Figure 5

Claims (1)

[Claims] An error detection and correction code generated from a predetermined amount of information signal is added to the predetermined amount of information signal to obtain a digital information signal, and the digital information signal is recorded on a track inclined in the longitudinal direction of the magnetic tape by a rotating head. , and in the digital information signal recording and reproducing method, the error detection and correction code is recorded from a position on the track where the digital information signal is recorded discontinuously, and then the information signal is recorded. A digital information signal recording and reproducing method.