JPS62220089A - Method and device for processing image of video signal - Google Patents

Abstract

PURPOSE:To eliminate influence on a luminance signal by a subcarrier in a National Television System Comitie (NTSC) signal, by storing a picture element at every corresponding line of two frames in two systems of line memories, and taking the average of them. CONSTITUTION:An RGB separation circuit 1 separates an input NTSC signal to the luminance signal and a chrominance signal, and outputs them to gates 5A-5D through an A/D conversion circuit 2. Line memories 6A and 6B store data at every picture element of scanning line facing between two frames having different phases respectively, and average them by using a synthesizer 81 and a 1/2 divider 91. Also, a processing system A including the line memories 6A and 6B performs the processing of the scanning line of odd numbers, and a processing system B including line memories 6C and 6D, the scanning lines of even numbers.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field of the Invention) The present invention relates to a video signal image processing method and apparatus for improving image quality when a color television video signal is digitally converted and a still image is output.

(Technical background of the invention and its problems) As is well known, the video signal of color television in Japan is NTSC (National Televisio).
The color television signal (hereinafter referred to as NT) based on this NTSC system is adopted.
SCa) uses a one-line interlacing method for 525 scanning lines. That is, the above 52
For five scanning lines, the first . :JS3. Fifth...
..., the ml field consisting of odd-numbered scanning lines such as the 5251st scanning line [] is first scanned, and then the second . 4th. 6th......
A second field consisting of even-numbered scanning lines, such as the 524th scanning line of :jS, is scanned to form one screen (frame) of image on, for example, a cathode ray tube screen. Then, 3 such frame images are generated per second.
A continuous television image is formed by forming 0 frames (60 fields).

Furthermore, as is well known, in the NT';C signal, the luminance signal of a color image and the RGB color signals are superimposed, and the signal is modulated and conveyed by a subcarrier.

:J45 diagram shows an example of this subcarrier, and the number on the left side of the diagram! ; Ll-view 5 indicates the above-mentioned scanning line number, and the solid line and dotted line in the figure indicate luminance changes along the scanning line.1 For example, if the solid line is the odd a-th frame, the dotted line is the even-numbered frame. It shows the brightness change in the frame. Therefore, along one scanning line (L line) of this subcarrier, due to the influence of this subcarrier, pixels that are brighter and darker than the brightness determined by the actual brightness signal level alternately change in brightness (brightness and darkness). This results in a bright and dark dot pattern appearing in an l-frame image formed by successive scanning lines. However, as shown in FIG. 5, the phases of the subcarriers of adjacent scanning lines (for example, fLl and !L3) in the same field are shifted by 1800, and this 151
11! The dot pattern of t is made inconspicuous, and the phase of the subcarrier on the same scanning line is shifted by 1800 between the fr-th frame shown by the solid line and the even a#11 frame shown by the dotted line. The light and dark dot patterns formed with a shift in phase between the odd-numbered frame and the even-a frame are alternately repeated 30 screens per second as described above, so for the human eye looking at such a screen, In this case, the dot pattern of the above image 11f is made uniform, and the image with the average luminance (that is, according to the luminance signal output) appears to be output continuously.

However, by digitally converting such an NTSC signal, the still 11-frame image can be displayed on an LCD screen or L
When displaying on an ED screen or recording an image on a color photosensitive material using a thermal printer, one frame worth of NT is required.
If the SC signal is sampled and output as is, the bright and dark dots described above will also be output as is, and the predetermined brightness based on the brightness signal will not be reproduced. Therefore, when outputting a still frame image as described above, image data for two frames with different phases are read in using frame memory or field memory, and the data for these two frames is used for each scanning line. The effect of the subcarriers (bright and dark dot pattern) is eliminated by adding and averaging each pixel. Then, if you output the image signal for 1 frame as described above, the desired image signal can be obtained. It turns out.

However, since the frame memory and field memory are expensive, there has been a desire for an inexpensive image processing device that does not use the frame memory or field memory.

(Object of the invention) This invention was made under the above circumstances,
An object of the present invention is to provide an image processing method and apparatus for a video signal that can reproduce a predetermined brightness with an inexpensive configuration and without being affected by subcarriers when outputting a still color image signal from an NTSC signal. There is a particular thing.

(Summary of the Invention) This IJI relates to an image processing method for video signals,
RGB separated from NT9G signal or NTSC signal
The above-mentioned NTSC is achieved by equalizing and outputting data for each pixel of one or more scanning lines corresponding to two frames with different signal phases using two series of line memories that store each field. This is designed to remove the influence of subcarriers in the signal on the luminance signal. The present invention also relates to an image processing device for video signals to which the above image processing method can be applied, and
An A/D conversion circuit that converts the RGB signal separated from the TSC signal or the N-cho SC signal into a digital signal, and two circuits each for storing the A/D converted signal for each field.
controlling the A/D conversion circuit and the line memory of each two series to store the A/D converted data in a predetermined in-memory at a predetermined timing; A timing device for reading and each of the above two
The apparatus is equipped with an averaging circuit that adds and averages data for each pixel of corresponding scanning lines between two frames having different phases that are stored in a series of line memories and read out.

(Embodiment of the Invention) In the IIIj image processing method of a video signal of the present invention, a frame for which a still 1F image is desired to be output and a frame having a phase different from this frame are used, and the two frames having different phases are processed as described above. A predetermined still image is output by adding and averaging the data for each pixel of the corresponding scanning line between them. For the above-mentioned averaging, two line memories, i.e., l
The above image processing is realized by an inexpensive image processing device using four line memories per frame.

FIG. 1 is a block diagram schematically showing an image processing apparatus according to the present invention.
As described above, the SC signal is separated into a luminance signal and a color signal, and the RGB color signals are output to the A/[1 conversion circuit 2.

This input/output conversion circuit 2 A/D converts the above color signal and outputs it to the video signals 5A to 5D. Line counter 3 is
The above is entered.

The scanning line number Njl of the NTSC signal is counted and outputted to the above gates 5A to 5D and gates 7A and 7C.Furthermore, the frame counter 4 counts the scanning frame number Nf and outputs it to the gates 5A and 5G. A signal is output to the gates 5B and 50, and each gate is alternately opened and closed in accordance with the line number. The line counter 3 and the 7-frame counter 4 control A/fl conversion and the timing of storage and readout into a line memory, which will be described later. The above games) 5A to 50 store the input A/D converted image signals in the first to fourth line memories in accordance with the line count signal Nu and the frame count signal Nf (or their inverted signals), respectively. It is designed to output to 6A to 6D. The first to fourth line memories 6A to 80 are FIFO (First-in-Firs)
t-out) type RAM (ordinary RAM te is also good)
The image signals of 947 pixels of one scan outputted from each of the corresponding gates 5A to 5D are stored at a predetermined address in accordance with the scanning order. When a predetermined line count signal Nl is input to the gates 7A and 7C connected thereafter, the first and third line memories IIIA and 8G store the stored l.
The data of each pixel for 947 scans is output to adders 81 and 82 in the order in which they are stored (first-in first-out), and the second and fourth line memories 8B and 80 are connected before them. The above gate 5
11. When new data is input from 50, the data of each pixel for one scanning line is stored in the order in which it is stored (Fi
rst-in First-out) each adder 8
Output on 1.82. This adder 81.82 is combined with a divider 91.92 to be described later to constitute an averaging circuit, and adds each data output from each of the memories 6A to 6D and outputs the result to the divider 91.92. .

The above-mentioned added data is divided by 1/2 by dividers 91 and 92 to obtain averaged image data Pl of each pixel for 947 scans.

and Pie will be output respectively.

Here, the gates 5A, 5B, the first . Second line memory 8A, [18, gate 7A and adder 81
, the divider 81 divides the first .
Third. Fifth. . . ., the gates 5G, 5[1, 3rd . The fourth line memory 8 (:, 80, the gate 7C, the adder 82, and the divider 923 are used for the 2nd, 4th, 6th, etc. even-numbered scanning lines of the second field of the frame screen). It is set up correspondingly.

An image processing method for a video signal using the image processing system configured as described above is shown in the flowchart in FIG. 2 and in FIG. 3 (A
), (B) and FIG. 4 for explaining the present invention. Here, when outputting a frame image as shown in FIG. A second frame F2 shown in FIG. 3(B) adjacent to F1 (one frame before or after) is used. Also, this third
The first field consisting of odd-numbered scanning lines indicated by solid lines in FIGS. (A) and (8) and the second field consisting of even-numbered scanning lines indicated by dashed-dotted lines have different scanning line numbers; As mentioned above, the above l! i image processing device game) 5A, 5B or 5G, 5D and subsequent circuits are processed in the same procedure using similar components, so in the following explanation, odd-numbered scanning lines will be used for each frame. The image processing method in the first field consisting of the following will be explained below.

For example, the first frame F as shown by the solid line in FIG. 3(A)
Each pixel P'oll~P of the first scanning line Jlol of l
When the NTSC signal of a1n (indicated by 0'' in the figure) is input to the image processing device, the frame counter 4
Nf (-1) is set to the frame count signal Nf.
(-1) (step S1.!32), NIL (-1) is set in the line counter 3, and a line count signal Nl1 (·l) is generated (step S3.!32).
S4), then the frame count signal Nf(・1
) and line count signal Ml (-1), +u = 2・Nr −t −・・−・(1)
holds true (step S5), so this first frame F!
Nth sentence (-1) Each pixel Po1l of scanning line intersection o1 ~
The data of Po1m is separated by the RGB m circuit 1 and digitally converted by the A/D conversion circuit 2 (step S8), and the gate 5A is opened by the frame count signal Nf and line count signal Nu. The data of each pixel Po1l to Pa1m is sequentially stored in the one-line memory 6A (step S7), and when this first scanning line iol is completed, two lines have advanced (
The third scanning line 1o3 (Nu←NIL÷2) is set (step S8), and the process returns to step S4 to reset Ml (-3) in the line memory 3. Therefore, in step S5, the above ( Since the formula 1) is not satisfied, the process proceeds to step S9, and the frame count signal Nf is
(-1) and the line count signal Ml (-3), N1 and 2.N "middle..." (2) is formed (step S3), so the lever is applied as described above. mW sentence (-3
) The scanning line sentence 03 is scanned as described above, and the data of each pixel Po31 to Po3n (indicated by "・°" in the figure) is separated by the RGB separation circuit 1 and sent to the A/D.
It is digitally converted by the conversion circuit 2 (step 5).
10) Since the frame count signal Nf is 1'' and the data to be averaged with the first scanning line jlol is not stored in the second memory 6B (step 511).
, the gate) 5B is opened by the frame count signal If and the line count signal Ill, and each pixel Po
3l-Pa3n data are sequentially stored in the 2-line memory 8B (step S12), and when this third scanning line JLo3 is finished, the next data to be image processed remains (step!915). , advance the frame count signal N by "l" (Nf4- Nf+
1) Select the next m2 frame F2 to be averaged with this first frame Fl and return to step S2 (step 51B).

Therefore, Nf(-2) is set in the frame counter 4, and the frame count signal Nf(-2) is issued and (
Step S2), Ml(-1) is 1 in the line counter 3.
One coin is determined and a line count signal Nu (-1) is issued (steps St, S4). Therefore, Step 1-S
5 does not satisfy the above formula (1), and the above step S
9 does not satisfy the above equation (2), so the next third scanning line le, which is advanced by two lines (N11←Nl+2)
3 is set (step S8), the process returns to step S4 and the line counter 3 is set to Ml (-3) again. In the meantime, the above formula (1) holds true (step S5), so the Nth sentence (・3) scanning line l of the second frame F2 as shown by the solid line in FIG. 3(B)
Each picture of e3; kPe31-Pe3n (“
o'') is separated by the RGB separation circuit 1 and digitally converted by the A/D conversion circuit 2.
Step ss), -h frame count signal Nr
When the gate 5A is opened by the line count signal Ml and the data of each pixel Pe31 to Pe3n is sequentially outputted to the memory 6A of the cylinders 1 and 1, the above-mentioned data previously stored in the first line memory 8A is 1st frame Fl
The data of each pixel Pe31=Pe3n of the third scanning line of this second frame is stored in place of the data of the first scanning line sentence 01 of (step S7), and when this third scanning line le3 is finished, Moved forward 2 lines (Nu←
Nu◆2) The next fifth scan line le5 is set (
Step S8), return to step S4 and display N on the line counter 3! Since the above equation (1) is not satisfied in step S5, the process proceeds to step S9 and the above frame count signal Nt(-2) is reset.
and the line count signal Ml (-5), the above (
2) Since the formula holds true (step S9), the Ml (-5)th scanning line le5 is scanned as described above to obtain each pixel Pe5l-Pe5n (indicated by "・" in the figure). The color signal of the above RGB separation circuit l
At the same time, the data of the third scanning line uo3 of the first frame F1 to be averaged because the frame count signal Nf is "2" is converted into digital data by the A/[1 conversion circuit 2 (step 5IO). 2 memory 8B (step 5ll), the gate 5 is stored in the frame count signal Nf and line count signal HA.
B is opened and this second frame F2 fifth line e5
The data of each pixel Pe51 to Pe5n are sequentially output to the 2-line memory 6B, and the data of the first frame Fl-3 which had been stored in the second line memory 8B until then is
The data of the line a3 is outputted to the adder 81, and the data of each of the pixels Pe51 to Pe5n is stored in its place (step S13).

Further, in synchronization with opening of this gate 5B, the line count signal Nu(-5) is also output to the gate 7A, and this line count signal NJI(-5) causes the gate ? A is opened and the second frame F2 stored in the t51 line memory 6A, the third scanning line le3
The data is also output to the adder 81. Then, pixels Po31 to Po3 of the first frame F1 third scanning line sentence 03 are sequentially outputted from the second line memory 8B.
Each data of n corresponds to each data of pixels Pe31 to Pe3n of the second frame F2 and third scanning line e3 sequentially outputted from the first line scan line 6A, and the adder 8! After being sequentially added in the divider 31, the pixel data PJlo of the third scanning line intersection 3 is divided into 1/2 and averaged. Become. Therefore, this second frame F
2 When the fifth scanning line le5 is completed Y, if the next data to be image processed remains (step 515), the frame count signal Nf is advanced by 1'' (NF2-Nf÷1),
The next third frame F to be averaged with this second frame F2
3 (i.e., the first frame Fl), return to step S2 (step 5te), and repeat the above-described operation for the next scan line 15.17 of the third frame F3 (i.e., ml frame Fl). As a result, the averaged data of the fifth scanning line 5 is output, and further operations as described in 1 (steps 52 to 515) are performed.
By repeating this, the images for l frames are averaged with the images of adjacent frames and output.

Here, the above q'S l, the third.・・・・・・
Thus, all odd-numbered frames use the same frame as the first frame, and similarly, all even-numbered frames use the second frame,
The averaged image data of the first and second frames will be output.

FIG. 4 shows the contents of the data stored in the first and second line memories in the process of averaging two frames such as the fifth speed, and the contents of the data output from the image processing device of the present invention. . In FIG. 4, when the first operation, that is, the image of the first frame F1 is read as described above, 1. I: The data of the first scanning line sentence 01 is stored in the memory 1 line memory 8A, and the data of the third scanning line JLo3 is stored in the second line memory 6B.As there is no data to be averaged as described above, the data 0 Then, when the second operation, that is, the image of the second frame F2 is read, the data of the third scanning line le3 is stored in the first line memory 8A, and the data of the fifth scanning line le3 is stored in the second line memory 8B.
1 indicates that the data of the scanning line le5 is stored and the data of the f53 scanning line sentence 3 averaged as described above is output. Thereafter, in the same manner, the fifth
．． 7th. . . . The data of all scanning lines are sequentially averaged and output.

In the above embodiment, the averaged pixel data of the first scanning line 11 is not output, but among the 525 scanning lines, only one is actually used in televisions, etc. Only the image data included in the scanning line at the center is cut from several lines above and below, and there is no problem in practical use.

In addition, in the embodiment described above, the scanning line sentence 1 of the first field [h number of items F], 39 sentences 5°...
I only showed how to average the data of...
Second field, even scan line 12.14
．． Regarding the data of 1G, . Before proceeding, a further line may be scanned, a second field may be scanned, and the averaging process may be performed in the same manner.

In the above-mentioned embodiment, a method was shown in which pixel data of corresponding l scanning lines between two adjacent frames were averaged, but the above-mentioned line memory is provided for each scanning line of one field with two series. This allows pixel data of multiple scanning lines to be processed simultaneously.

(Effect of Origin 1) As described above, according to the present invention, it is possible to use only two line memories per field, that is, four line memories per 17 frames, without using frame memory or field memory as in the conventional case. With this image processing device, it is possible to obtain an image signal averaged between two frames having different phases, and it is possible to output an image signal of a predetermined brightness without being affected by subcarriers.

[Brief explanation of drawings]

FIG. 1 is a block diagram schematically showing the image processing apparatus of the present invention, FIG. 2 is a flowchart explaining the image processing method of the present invention, and FIG. 3 (A) and CB) show the relationship between two adjacent frames. FIG. 4 is a diagram explaining the image data stored in the image processing device of the present invention and image data averaged and output, and FIG. 5 is a diagram explaining the outline of the data of NT.
FIG. 2 is a diagram illustrating subcarriers that carry color signals in an SC signal. l...RGB separation circuit, 2...A/D conversion circuit, 3
...Line counter, 4...Frame counter, 5
A~50.7A, 7G...gate, 8A~6D...
・Line memory. 81.82... Adder, 91.92... Divider. Applicant's agent: Yuzo Yasugata Jot－－－－－－－－－＋＋＋－・－ノθ7
＋＋＋＋＋＋＋＋−□ノef
−−−−−−−−−−1! e7
−−−−−−−−−−−−−Brown 3 Figure 4 Figure 5

Claims (2)

[Claims] (1) Two series of line memories each storing pixel-by-pixel data of one or more corresponding scanning lines between two frames in which the phases of the NTSC signal or the RGB signal separated from the NTSC signal are different, for each field. 1. An image processing method for a video signal, characterized in that the influence of the subcarrier in the NTSC signal on the luminance signal is removed by averaging and outputting the NTSC signal. (2) an A/D conversion circuit that converts the NTSC signal or the RGB signal separated from the NTSC signal into a digital signal; and two series of line memories that store the A/D converted signal for each field; a timing device that controls the A/D conversion circuit and the line memories of each of the two series to store and read out the A/D converted data in the predetermined line memory at a predetermined timing; and an averaging circuit that adds and averages data for each pixel of corresponding scanning lines between two frames having different phases stored in a line memory and read out. Image processing device.