JPH0123792B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to an interpolation device for displaying characters and graphics to be displayed when dot patterned characters and graphics are displayed on a display such as a cathode ray tube (hereinafter referred to as CRT). Conventionally, when dot-patterned characters and figures are displayed as they are on a display such as a CRT, serrations occur in the characters and figures, making them undesirable compared to the original natural patterns of the letters and figures. It looked natural and hard to see. Various methods have been tried to solve the above problem and make the so-called jaggies less noticeable. There are also some cases where interpolation processing is performed by processing. In this method, there are two methods: one in which the processing is changed for each field in the vertical direction, and the other in which the same processing is performed on all fields.However, in both cases, in order to perform 1/2 dot processing in the horizontal direction, the final sampling signal is is 1
A clock signal having twice the frequency of the readout clock signal of the dot signal is required. For this reason, it is necessary to generate twice the frequency, leading to a complicated circuit. As a method of obtaining the same smoothing effect as using double the frequency without requiring twice the frequency, the signal is output by a combination of R (red), G (green), and B (blue) signals. A binary brightness level signal (hereinafter referred to as the Z signal) is used to identify whether a given color signal is a character/figure signal with a brightness level of 100% or a background color signal with a brightness level lower than 100%, and the original display is performed. There was a method to enhance the smoothing effect by adding interpolation to the pattern of the same color at a brightness level of less than 100%, but this method had the following drawbacks. FIG. 1 shows an example of the conventional circuit configuration. In FIG. 1, the display signal Y1 is shifted by one dot interval using the clock signal CK in the shift register 1, and the result is the display signal Y2, and the display signal Y1 is delayed by one line interval in the line memory 2, and the result is the display signal Y3. The signal Y3 is shifted by one dot interval using the shift register 3 and is used as the display signal Y4. In order to detect the upward left as shown in Figure 2 and generate an interpolation signal, the negative signal of the display signal Y1 and the display signal Y2 is used. Negation signal of signal Y3 and display signal Y4
are both input to the AND circuit 4, and the output signal is used as the left-up interpolation signal LS. Similarly, in order to detect the right-up as shown in FIG. 3 and generate an interpolation signal, the negative signal of the display signal Y1, The signal Y2, the display signal Y3, and the negative signal of the display signal Y4 are both input to the AND circuit 5, and the output signal is used as the upper right interpolation signal.
RS, and when a field is displayed, Y2, LS and
RS is output as S1, S2 and S3, and when the b field is displayed, Y4, RS and LS are output as S1, S
A signal switch 6 is used to output the signals as 2 and S3, and the switching is performed using the field index signal F1. It is input and output as a display signal Y5 including an interpolation signal. The display signal Y5 including this interpolation signal is used by the color signal switch 9 to select the red signal CR, green signal CG and blue signal CB read from the color memory 10 in arbitrary block units when the signal level is "1". , the signal level is “0”
At this time, the red signal BCR, green signal BCG and blue signal BCB read from the background color register 11 are selected and output as the red signal SR, green signals SG and SB. S1, SR, SG and SB are sampled by a clock signal CK in a sampling circuit 12 and output as a brightness level signal Z, a red signal R, a green signal G and a blue signal B. The patterns shown in Figs. 2 and 3 are converted into patterns shown in Figs. 4 and 5, respectively, using the display signals including the interpolated signals obtained in this way.
displayed above. In FIGS. 4 and 5, the shaded areas are the locations to be interpolated. However, with this method, the brightness of the interpolated area may be lower than the background color depending on the combination of the character/figure display color and the spine color, resulting in that area appearing black. Some patterns caused unnaturalness. Also, when the brightness level signal Z is "1", the brightness level of any color is 100%, and when the brightness level signal Z is "0", the brightness level is 50%, and each of the R, G, and B signals is If the brightness is 1 when the brightness level signal Z is "1", that is, when the character/figure display color is white, then the brightness on the CRT of each color in the character/figure display and background display is as shown in Table 1. Become.

[Table] In Table 11, the background brightness is determined from an approximate value that takes into account the gamma characteristics of the CRT. Since the interpolated part of the character figure is the same as the background brightness,
The above-mentioned phenomenon occurs when the brightness of the color used for displaying characters and figures when the background is displayed is lower than the brightness of the color used for the background. In the present invention, from the viewpoint that when the luminance difference between the character graphic display color and the background color is large, the so-called jaggedness also increases, and when the luminance difference is small, the so-called jaggedness also becomes small. Interpolation processing is performed, and if the degree of so-called jaggedness is small, interpolation processing is not performed.As a result, a dot pattern can be displayed without requiring a sampling frequency that is twice the clock frequency for single-dot readout, which was commonly used in the past. This enables interpolation to reduce the degree of so-called jaggedness that is characteristic of characters and figures, and to make diagonal lines thicker.In addition, the degree of so-called jaggedness is small and the brightness of the interpolated part is equal to the brightness of the background. If the value is lower than that, interpolation processing is not performed, so that the effect of not causing unnaturalness on the display screen can be obtained. FIG. 6 shows a circuit according to an embodiment of the present invention. 6th
In the figure, as in FIG. 1, the display signal Y1 and the display signal Y1 are clocked by the shift register
Display signal Y2 shifted by one dot interval by CK,
Four types of display signals are created: a display signal Y3 obtained by delaying the display signal Y1 by one line period in the line memory 2, and a display signal Y4 obtained by shifting the display signal Y3 by one dot period by the clock signal CK in the shift register 3. Then, display signal Y1, display signal Y
The negative signal of 2, the negative signal of display signal Y3, and the display signal Y4 are both input to the AND circuit 4 to generate the upper left interpolation signal LS. The negation signals of Y4 are both input to the AND circuit 5 to generate the upper right interpolation signal RS, and the field index signal FI causes Y4 to be input to the AND circuit 5.
2, LS and RS signals are output as S1, S2 and S3 using the signal switcher 6, and when in the b field, Y4, RS and LS signals are output as S1, S2 and S3, and S3 is changed to 1 by the clock signal CK by the shift register 7. The clock section is shifted to S4, and S1, S2, and S4 are input to an OR circuit 8 and output as a display signal Y5 including an interpolation signal. In one example of the present invention, a red signal CR, a green signal CG, and a blue signal CB are read out from a color memory 10 that stores color signals in blocks, and a red signal is output from a background color register 11 that stores a background color. BCR, green signal BCG and blue signal
A color combination discriminator 13 for discriminating color combinations with BCB is provided, and a switching signal SW is outputted from this color combination discriminator 13 and added to a switching signal selector 14, which also includes an interpolated signal. The display signal S1 indicating the original pattern without the original pattern and the display signal Y5 including the interpolation signal are output as switching S5,
S5 is a switching signal for the color signal switch 9, and when it is positive logic and is "1", CR, CG and
Each signal of CB is set to background color register 11 when it is “0”.
SR, BCR, BCG, and BCB signals from
The color signal switch 9 is controlled to output as SG and SB. These SI, SR, SG and SB signals are converted into clock signals by the sampling circuit 12.
Z, S, G and B respectively sampled at CK
Output as a signal. For example, if the background color is green and the character shapes are white and red, as shown in Figure 7, then according to Table 1, the brightness of the green background color is 0.148, and the brightness of the white character "8" is 0.148. 1. Luminance of the interpolation part indicated by the diagonal line on the upper left
0.25, the brightness of the red of the character "9" is 0.324, and the brightness of the interpolated part indicated by diagonal lines on the upper right is 0.081.The brightness of the interpolated part on the upper right is lower than that of the background color and appears to be sunk in. Even in such a case, according to the present invention, the interpolation processing portion can be selected by the combination of character/graphic color and background color as shown in FIG. 8, and a natural screen can be obtained. That is, in FIG. 8, the character "8" is subjected to interpolation processing, and the character "9" is not subjected to complementation processing. As is clear from the above, in the present invention, it is possible to obtain the same smoothing effect as interpolation processing using twice the frequency of the one-dot readout clock signal without requiring the generation of a clock signal with twice the frequency. , and an extremely excellent effect can be obtained in that it is possible to prevent the adverse effect caused by the combination of character/graphic color and background color.

[Brief explanation of drawings]

Figure 1 is a circuit diagram of a conventional display interpolation device; Figure 2 is a circuit diagram of a conventional display interpolation device;
Figures 4 and 5 show examples of patterns when interpolation is performed, and Figures 4 and 5 show the patterns shown in Figures 2 and 3 interpolated using the display interpolation device shown in Figure 1. 6 is a circuit diagram of a display interpolation device according to an embodiment of the present invention, FIG. 7 is a diagram showing an example of a screen displayed by a conventional display interpolation device, and FIG. 8 is a diagram showing an example of a pattern. 9 is a diagram showing an example of a screen obtained by the present invention, and FIG. 9 is a circuit diagram of another embodiment of the present invention. 1, 3, 7... Shift register, 2... Line memory, 4, 5... AND circuit, 6... Signal switch, 8... OR circuit, 9... Color signal switch, 1
0...Color memory, 11...Background color register, 12
...Sampling circuit, 13...Color combination discriminator, 14...Switching signal selector.

Claims (1)

[Claims] 1. One signal for any dot on any line, and for this signal, each signal is converted into a dot interval by a shift register, one line interval by one horizontal interval delay means, and one line interval by one horizontal interval delay means. means for creating four types of signals, each of which is delayed by one dot interval using a shift register; means for detecting an interpolated portion by a combination of the four types of signals; switching means for providing appropriate interpolation signals to each; means for outputting a brightness level signal indicating whether or not the brightness level of the display signal is set to 100%; Means for generating a video signal including an interpolated signal by setting the level to 100% and the brightness level of the signal in the interpolated part to an arbitrary brightness level less than 100% that is not the full brightness, and 1. A display interpolation device, comprising means for controlling interpolation to be permitted or prohibited by comparing brightness differences between brightness levels.