JPS62217708A - High output amplifier - Google Patents

High output amplifier

Info

Publication number
JPS62217708A
JPS62217708A JP61059473A JP5947386A JPS62217708A JP S62217708 A JPS62217708 A JP S62217708A JP 61059473 A JP61059473 A JP 61059473A JP 5947386 A JP5947386 A JP 5947386A JP S62217708 A JPS62217708 A JP S62217708A
Authority
JP
Japan
Prior art keywords
amplifier
amplifiers
power
parallel
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61059473A
Other languages
Japanese (ja)
Inventor
Toshiro Sakane
坂根 敏朗
Hiroshi Nakamura
中邨 浩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP61059473A priority Critical patent/JPS62217708A/en
Publication of JPS62217708A publication Critical patent/JPS62217708A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To reduce the power consumption by constituting a high output amplifier by a distributer and a synthesizer, connecting an amplifier in parallel in-between so as to allow the operation by any amplifier of parallel connection at the normal state for a long period and operate all the amplifiers in parallel when a short time high power is required. CONSTITUTION:Low output amplifiers G1-Gn-2 of the high output amplifier 1 and an output amplifier Gn-1 are connected in series and two high power amplifiers Gn are connected in parallel between the distributor 11 and the synthesizer 12. The amplifiers G1-Gn-1 are used as drivers, bias power supplies VG1, VD1, VG2, VD2 are connected to each amplifier Gn and the distributor 11 and the synthesizer 12 are connected by DC-cut capacitors C1-C4 at the input and output sides of the amplifier G. Then any of the amplifiers G applies the operation at normal state for a long period and all the amplifiers G are operated in parallel in requiring the high short time power to reduce the power consumption.

Description

【発明の詳細な説明】 〔概 要〕 高出力増幅器であって、増幅器を並列接続することによ
りフェージング時以外は一部の増幅器のみ動作させよう
とするものである。
[Detailed Description of the Invention] [Summary] This is a high-output amplifier, and by connecting amplifiers in parallel, only a part of the amplifiers are operated except during fading.

〔産業上の利用分野〕[Industrial application field]

本発明は、大形の無線装置内で架の中に設けられている
ような大電力を消費する高出力増幅器に関する。
The present invention relates to a high power amplifier that consumes a large amount of power and is installed in a rack in a large wireless device.

〔従来の技術〕[Conventional technology]

従来、無線装置において使用される高周波増幅器の電力
はほぼ一定であった。
Conventionally, the power of high frequency amplifiers used in wireless devices has been approximately constant.

即ち、第5図に示すように、送受信装置間で無線通信を
行う場合は、送信側のアンテナ1′から放射された電波
は受信側2′へ直線状(実線)で到達するものだけでな
く、地面で反射された後(破線)、または空間のエアダ
クト等で反射された後(一点鎖線)に、それぞれ到達す
るものがある。
That is, as shown in Fig. 5, when wireless communication is performed between transmitting and receiving devices, the radio waves radiated from the transmitting side antenna 1' not only reach the receiving side 2' in a straight line (solid line). , after being reflected from the ground (dashed line), or after being reflected from an air duct in the space (dotted chain line).

このようにフェージング現象により受信側アンテナ2′
に到達する電波は直線状に到達する電波より電力が弱く
なるために、従来は、変調器14から出力された変調波
をアップコンバータ13’を介して高周波増幅器11′
で増幅しフェージング時にも対応出来る様十分余裕をも
って放射していた。
In this way, due to the fading phenomenon, the receiving antenna 2'
Conventionally, the modulated wave output from the modulator 14 is sent to the high-frequency amplifier 11' via the up-converter 13', since the power of the radio wave that reaches the area is weaker than that of the radio wave that arrives in a straight line.
The beam was amplified and radiated with sufficient margin to cope with fading.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来はこの増幅器11’での電力が大きくかつ一定出力
であるためにフェージングが発生していない時には受信
側でダウンコンバータ20′を介した信号をAGC21
’でこの受信信号のレベルを下げて復調器22′に入力
していた。
Conventionally, the power of this amplifier 11' is large and constant, so when no fading occurs, the signal passed through the down converter 20' is converted to the AGC 21 on the receiving side.
The level of this received signal was lowered by ' and inputted to the demodulator 22'.

しかし、フェージング現象は1年間を通じて1割以下の
割合で発生するに過ぎない。
However, the fading phenomenon only occurs at a rate of less than 10% throughout the year.

従って、この少ない確率で発生するフェージング現象に
備えるために、従来は一定の大電力で高周波増幅器を動
作させており、電力を無効に消費していた。このため、
放熱装置を含む装置全体が大形になり、電源の効率が悪
いという問題点があった。
Therefore, in order to prepare for the fading phenomenon that occurs with a small probability, a high frequency amplifier has conventionally been operated with a constant high power, which wastes power. For this reason,
There were problems in that the entire device including the heat dissipation device was large and the power source was inefficient.

この問題点を解決するために、アップコンバータ13′
と増幅器111 ’の間にアッテネータ12′(破線)
を挿入して増幅器の出力レベルを可変することが捉案さ
れたが高周波増幅器11’自体はA級で動作している為
の消費電力は変わらない。
In order to solve this problem, up converter 13'
Attenuator 12' (dashed line) between and amplifier 111'
It has been proposed that the high frequency amplifier 11' itself be operated in class A, so that the power consumption remains the same.

C問題点を解決するための手段〕 本発明の目的は、上記問題点を解決し無線装置の送信側
に設けた高周波増幅器の消費電力を低下させることにあ
る。
Means for Solving Problem C] An object of the present invention is to solve the above problems and reduce the power consumption of a high frequency amplifier provided on the transmitting side of a wireless device.

そのための手段は、第1図に示すように高出力増幅器1
の入力側に分配器11、出力側に合成器12を設けると
共に該分配器11と合成器12間に増幅器Gnを並列に
接続させたものである。
The means for this purpose is a high output amplifier 1 as shown in FIG.
A divider 11 and a combiner 12 are provided on the input side and a combiner 12 on the output side, respectively, and an amplifier Gn is connected in parallel between the divider 11 and the combiner 12.

〔作 用〕[For production]

上記のとおり、本発明によれば高出力増幅器を分配器と
合成器により構成すると共にその間に増幅器を並列接続
した。
As described above, according to the present invention, a high-output amplifier is constituted by a divider and a combiner, and the amplifiers are connected in parallel between them.

従って、長時間に亘る正常時には上記並列接続の増幅器
のうちのいずれかで運転をし、短時間のフェージング時
で高い電力を必要とする場合にはすべての増幅器を並列
にして運転できる。
Therefore, during long-term normal operation, one of the above-mentioned parallel-connected amplifiers can be operated, and when high power is required during short-term fading, all the amplifiers can be operated in parallel.

このため従来の消費型カー窓の場合と比べて長時間に亘
って節電できるので消費電力を低下させることができる
ようになった。
Therefore, compared to conventional consumptive car windows, power can be saved over a long period of time, making it possible to reduce power consumption.

また通常時には低消費電力にて運転出来るので、放熱器
の形状もより簡素化、小形化出来る。
Furthermore, since it can be operated with low power consumption during normal operation, the shape of the heatsink can be made simpler and smaller.

〔実施例〕〔Example〕

以下、本発明を、実施例により添付図面を参照して、説
明する。
The invention will now be explained by way of example with reference to the accompanying drawings.

第2図、第3図、第4図は、それぞれ第1、第2実施例
、変形例を示す図である。
FIG. 2, FIG. 3, and FIG. 4 are diagrams showing the first and second embodiments and modifications, respectively.

第2図の実施例の高電力増幅器1ば、低出力増幅器G1
 ・・・Gn2と出力増幅器G、−,を直列に、それぞ
れ接続し、かつ分配器11と合成器12間に2つの高出
力増幅器Gfiを並列に接続した構成を有する。
High power amplifier 1B and low power amplifier G1 in the embodiment of FIG.
... Gn2 and output amplifiers G,-, are connected in series, and two high-output amplifiers Gfi are connected in parallel between the distributor 11 and the combiner 12.

上記において、G、、−、はGfiのドライバとしての
役割がある。■。いvolは一方の増幅器G7を構成す
るFETの、VO2、vnzは他方の増幅器G7を構成
するFETの、それぞれゲート及びドレインのバイアス
電源である。
In the above, G,,-, serve as Gfi drivers. ■. vol is the bias power supply for the gate and drain of the FET constituting one amplifier G7, and VO2 and vnz are the bias power supplies for the gate and drain of the FET constituting the other amplifier G7, respectively.

各コンデンサC1乃至C4は直流分をしゃ断するための
ものである。
Each of the capacitors C1 to C4 is for cutting off the DC component.

今、G、乃至G、、−2までのそれぞれの消費電力をW
、乃至W n−Z 、c++−+ と07のそれをW、
1−、、Wn 、増幅器1の全体の消費電力をWとすれ
ば、W、+WR−、+2Wn=”W   −−−=■W
重+W2+・・・w、2=eW、・−−−−−・■が成
立する。
Now, the power consumption of each of G, to G,,-2 is W
, to W n-Z , c++-+ and that of 07 to W,
1-,,Wn, If the entire power consumption of amplifier 1 is W, then W, +WR-, +2Wn=”W ---=■W
Weight+W2+...w, 2=eW, .-----■ holds true.

全体の消費電力Wに比べればGn−1と67はほぼ同じ
電力であり、このO,、−1とG、lでWのうちのほと
んどの電力を消費するので、0式と■弐とから近似的に
次式〇が成立する。
Compared to the overall power consumption W, Gn-1 and 67 have almost the same power, and O, -1 and G and l consume most of the power of W, so from formula 0 and ■2, Approximately, the following formula 〇 holds true.

Wt +W。−、+2w。Wt+W. -, +2w.

zWn−1+2w、l 応3W、、=W         −画一■この■で表
わされる電力は、全部の増幅器を使用した場合であって
、フェージング現象により受信側アンテナに到達する電
力が下がって受イ3されるときである。
zWn-1+2w,l 3W,,=W -Uniform ■The power represented by this ■ is when all the amplifiers are used, and the power reaching the receiving antenna decreases due to fading phenomenon, resulting in It's time to do it.

しかし、通常はほとんどの場合、並列接続の高電力増幅
器のうち一方、たとえばバイアス電源VD2を断又は低
いドレイン電圧値にすることにより他方の高出力増幅器
のみ使用する場合を考えてみる。
However, consider the case where, in most cases, only one of the high power amplifiers connected in parallel is used, for example by turning off the bias power supply VD2 or setting the drain voltage to a low value.

このとき、全電力W′は WL +J、−,+W。At this time, the total power W' is WL +J, -, +W.

ごW、l−、+W11 厚2W、1=W’      ・−・−・−■となる。Go W, l-, +W11 The thickness is 2W, 1=W' ・−・−・−■.

■弐と0式を比べればわかるように 従って、片方の増幅器を動作することにより利得の絶対
値で6dB、消費電力の割合で33%だけそれぞれ低下
する。
■As can be seen by comparing formulas 2 and 0, operating one of the amplifiers reduces the absolute value of gain by 6 dB and the percentage of power consumption by 33%.

第3図は、n−1段目の増幅器を最終段のn段目と同様
に並列接続したものである。
In FIG. 3, the (n-1)th stage amplifier is connected in parallel in the same manner as the final stage (nth stage).

ただし      WM W□1 =□とする。However, WM Let W□1=□.

この場合は第1実施例と同様に Wt ” 2 w、l−、+2 W。In this case, as in the first embodiment, Wt” 2 w, l-, +2 W.

=3W、1=6W、l−+ =w  −−−−−■一方
、第2実施例でVOZと■。4を断又は低いドレイン電
圧値にすれば W、+W□I  +w、l 第3 Wn −+ =W ’     −−一−−■■
式と0式より 消費電力の割合で50%、それぞれ低下する。
=3W, 1=6W, l−+ =w −−−−−■ On the other hand, in the second embodiment, VOZ and ■. If 4 is turned off or the drain voltage is set to a low value, W, +W□I +w, l 3rd Wn −+ =W ′ −−1−−■■
The power consumption ratio is reduced by 50% compared to the formula and formula 0, respectively.

第4図はアイソレータ111乃至114を挿入した変形
例であ・リバイアス電源断における他の素子への干渉に
よる一周波数特性の劣化を避けるのに効果がある。
FIG. 4 shows a modification in which isolators 111 to 114 are inserted, which is effective in avoiding deterioration of one frequency characteristic due to interference with other elements when the rebias power is cut off.

このように本実施例によれば短時間のフェージング時だ
け並列運転を、通常は一方の電源を断って並列接続の一
方の増幅器だけで運転をすれば、−例の様に従来の一定
消費電力に比べて電力ば2/3または172節電できる
In this way, according to this embodiment, if parallel operation is performed only during short-term fading, and normally one power supply is cut off and operation is performed with only one amplifier connected in parallel, - as in the example, conventional constant power consumption can be reduced. It can save 2/3 or 172 times more power compared to the previous model.

〔発明の効果〕〔Effect of the invention〕

上記のとおり、本発明によれば高出力増幅器を分配器と
合成器により構成すると共にその間に増幅器を並列接続
した。
As described above, according to the present invention, a high-output amplifier is constituted by a divider and a combiner, and the amplifiers are connected in parallel between them.

従って、長時間に亘る正常時には上記並列接続の増幅器
のうちのいずれかで運転をし、短時間のフェージング時
で高い電力を必要とする場合にはすべての増幅器を並列
にして運転できる。
Therefore, during long-term normal operation, one of the above-mentioned parallel-connected amplifiers can be operated, and when high power is required during short-term fading, all the amplifiers can be operated in parallel.

このため従来の消費量カ一定の場合と比べて長時間に亘
って節電できるので消費電力を低下させることができる
ようになった。
Therefore, compared to the conventional case where power consumption is constant, power can be saved over a long period of time, making it possible to reduce power consumption.

また熱設計にも余裕が生じ、小形化、低価格化が図れる
Additionally, there is more leeway in thermal design, allowing for smaller size and lower cost.

【図面の簡単な説明】 第1図は本発明の原理図、第2図は本発明の第1実施例
を示す図、第3図は本発明の第2実施例を示す図、第4
図は本発明の変形例を示す図、第5図は従来技術の説明
図である。 l・・・高出力増幅器、    11・・・分配器、1
2・・・合成器、 G1 ・・・Gn・・・増幅器、I
N・・・入力端子、    OUT・・・出力端子。
[Brief Description of the Drawings] Fig. 1 is a diagram showing the principle of the present invention, Fig. 2 is a drawing showing the first embodiment of the invention, Fig. 3 is a drawing showing the second embodiment of the invention, Fig. 4 is a diagram showing the second embodiment of the invention.
The figure shows a modification of the present invention, and FIG. 5 is an explanatory diagram of the prior art. l...High output amplifier, 11...Distributor, 1
2...Synthesizer, G1...Gn...Amplifier, I
N...Input terminal, OUT...Output terminal.

Claims (1)

【特許請求の範囲】 入力側に分配器(11)が、出力側に合成器(12)が
、それぞれ設けられ、 該分配器(11)と合成器(12)間に増幅器(G_n
)が並列に接続され、 上記増幅器(G_n)の電源を断続させることにより必
要とする電力に応じて該増幅器(G_n)の一部又は全
部が動作するようにしたことを特徴とする、 高出力増幅器。
[Claims] A divider (11) is provided on the input side, a combiner (12) is provided on the output side, and an amplifier (G_n) is provided between the divider (11) and the combiner (12).
) are connected in parallel, and a part or all of the amplifier (G_n) is operated according to the required power by intermittent power supply of the amplifier (G_n). amplifier.
JP61059473A 1986-03-19 1986-03-19 High output amplifier Pending JPS62217708A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61059473A JPS62217708A (en) 1986-03-19 1986-03-19 High output amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61059473A JPS62217708A (en) 1986-03-19 1986-03-19 High output amplifier

Publications (1)

Publication Number Publication Date
JPS62217708A true JPS62217708A (en) 1987-09-25

Family

ID=13114312

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61059473A Pending JPS62217708A (en) 1986-03-19 1986-03-19 High output amplifier

Country Status (1)

Country Link
JP (1) JPS62217708A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5256987A (en) * 1990-06-22 1993-10-26 Fujitsu Limited Power amplifier device having a plurality of power amplifier units connected in parallel
JP2002185273A (en) * 2000-12-15 2002-06-28 Mitsubishi Electric Corp High-frequency circuit device
KR100602140B1 (en) * 2000-04-05 2006-07-19 가부시끼가이샤 도시바 High frequency circuit and communication system
WO2008032782A1 (en) 2006-09-14 2008-03-20 Nec Corporation Amplifying unit, method of output control and control program

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6033747A (en) * 1983-08-04 1985-02-21 Nippon Telegr & Teleph Corp <Ntt> Large power transmission system having transmission power control function
JPS61220506A (en) * 1985-03-26 1986-09-30 Seiko Epson Corp Cmos type current amplifier

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6033747A (en) * 1983-08-04 1985-02-21 Nippon Telegr & Teleph Corp <Ntt> Large power transmission system having transmission power control function
JPS61220506A (en) * 1985-03-26 1986-09-30 Seiko Epson Corp Cmos type current amplifier

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5256987A (en) * 1990-06-22 1993-10-26 Fujitsu Limited Power amplifier device having a plurality of power amplifier units connected in parallel
KR100602140B1 (en) * 2000-04-05 2006-07-19 가부시끼가이샤 도시바 High frequency circuit and communication system
JP2002185273A (en) * 2000-12-15 2002-06-28 Mitsubishi Electric Corp High-frequency circuit device
JP4498595B2 (en) * 2000-12-15 2010-07-07 三菱電機株式会社 High frequency circuit equipment
WO2008032782A1 (en) 2006-09-14 2008-03-20 Nec Corporation Amplifying unit, method of output control and control program
US8115540B2 (en) 2006-09-14 2012-02-14 Nec Corporation Amplifying apparatus, method of output control and control program

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