JPS62217649A - Package for containing hybrid integrated circuit element - Google Patents
Package for containing hybrid integrated circuit elementInfo
- Publication number
- JPS62217649A JPS62217649A JP61061630A JP6163086A JPS62217649A JP S62217649 A JPS62217649 A JP S62217649A JP 61061630 A JP61061630 A JP 61061630A JP 6163086 A JP6163086 A JP 6163086A JP S62217649 A JPS62217649 A JP S62217649A
- Authority
- JP
- Japan
- Prior art keywords
- metal
- integrated circuit
- hybrid integrated
- external lead
- circuit element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910052751 metal Inorganic materials 0.000 claims abstract description 52
- 239000002184 metal Substances 0.000 claims abstract description 52
- 239000000615 nonconductor Substances 0.000 claims description 16
- 239000011810 insulating material Substances 0.000 abstract description 4
- 239000011248 coating agent Substances 0.000 abstract 2
- 238000000576 coating method Methods 0.000 abstract 2
- 239000000919 ceramic Substances 0.000 description 6
- 239000011521 glass Substances 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 229910000833 kovar Inorganic materials 0.000 description 4
- 230000035939 shock Effects 0.000 description 4
- 238000005219 brazing Methods 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- 229910000531 Co alloy Inorganic materials 0.000 description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- KGWWEXORQXHJJQ-UHFFFAOYSA-N [Fe].[Co].[Ni] Chemical compound [Fe].[Co].[Ni] KGWWEXORQXHJJQ-UHFFFAOYSA-N 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 238000009429 electrical wiring Methods 0.000 description 2
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 229910000990 Ni alloy Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- NEIHULKJZQTQKJ-UHFFFAOYSA-N [Cu].[Ag] Chemical compound [Cu].[Ag] NEIHULKJZQTQKJ-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 239000012777 electrically insulating material Substances 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 230000002879 macerating effect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 238000005491 wire drawing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は絶縁基板上に厚膜もしくは薄膜によって電気配
線を形成するとともに該電気配線に半４体素子、抵抗、
コンデンサ等を取着接続して成る混成集積回路素子を収
納するためのパッケージに関するものである。Detailed Description of the Invention (Industrial Application Field) The present invention involves forming electrical wiring on an insulating substrate with a thick film or thin film, and adding semi-quadram elements, resistors,
The present invention relates to a package for accommodating a hybrid integrated circuit element formed by attaching and connecting capacitors and the like.
（従来の技術）
従来、混成集積回路素子を収納するためのパッケージは
第３図に示すように無酸素銅等の金属から成り、内部に
混成集積回路素子を収納するための空所を有する金属基
体１１と、該金属基体１１に筒状セラミック、ガラス等
の電気絶縁材料から成る電気絶縁物１３を介して植設さ
れた外部リード端子１２と、コバール、４２Ａ１１ｏｙ
等の金属から成る金属蓋体１４とから構成されており、
内部に混成集積回路素子１５が収納され、気密封止され
て混成集積回路装置となる。(Prior Art) Conventionally, as shown in Fig. 3, a package for housing a hybrid integrated circuit element is made of metal such as oxygen-free copper, and has a cavity inside for housing the hybrid integrated circuit element. A base 11, an external lead terminal 12 implanted in the metal base 11 via an electrical insulator 13 made of an electrically insulating material such as cylindrical ceramic or glass, and Kovar, 42A11oy.
It is composed of a metal lid body 14 made of metal such as,
A hybrid integrated circuit element 15 is housed inside and hermetically sealed to form a hybrid integrated circuit device.
尚、前記外部リード端子１２は金属基体１１に設けた貫
通孔内に押通させるとともにガラス（電気絶縁物１３
）を介しガラス付けするか、または外部リード端子１２
を筒状セラミック体（電気絶縁物１３）の貫通孔内に挿
通させるとともにセラミック体を金属基体１１に設けた
貫通孔内に挿通させ、それぞれを銀ロウ（銀−銅合金）
を介しロウ付けすることによって金属基体１１に電気的
に絶縁されて植設される。The external lead terminal 12 is pushed through a through hole provided in the metal base 11, and is also made of glass (an electrical insulator 13).
) or attach the external lead terminal 12 to the glass.
is inserted into the through hole of the cylindrical ceramic body (electrical insulator 13), and the ceramic body is also inserted into the through hole provided in the metal base 11, and each is filled with silver solder (silver-copper alloy).
It is electrically insulated and implanted in the metal base 11 by brazing through.
（発明が解決しようとする問題点）
しかし乍ら、この従来の混成集積回路素子収納用パッケ
ージは外部リード端子１２がコバール（鉄−ニッケルー
コバルト合金）や４２Ａ ｌ ｌｏｙ （鉄４２χニッ
ケル合金）等の金属によって形成されており、該コバー
ル等の金属はその比抵抗が約５０μΩｃｍと極めて高い
。そのため混成集積回路装置を作動させた際、外部リー
ド端子１２に１０〜２０ （Ａ ）の大電流が流れると
外部リード端子１２はその保有する比抵抗によってジュ
ール発熱を起こし高温となるとともに大きく熱膨張し、
外部リード端子１２を保持する電気絶縁物１３に熱衝撃
及び押圧力を印加して電気絶縁物１３にクラックや割れ
を発生させてしまい、その結果、混成集積回路装置の気
密性が破れて内部に収納する混成集積回路素子を長期間
にわたり安定に作動させることができないという欠点を
有していた。(Problems to be Solved by the Invention) However, in this conventional package for housing hybrid integrated circuit elements, the external lead terminals 12 are made of Kovar (iron-nickel-cobalt alloy), 42Al loy (iron-42χ nickel alloy), etc. The metal such as Kovar has an extremely high specific resistance of about 50 μΩcm. Therefore, when the hybrid integrated circuit device is operated, when a large current of 10 to 20 (A) flows through the external lead terminal 12, the external lead terminal 12 generates Joule heat due to its specific resistance, becomes high temperature, and expands greatly. death,
Thermal shock and pressing force are applied to the electrical insulating material 13 holding the external lead terminals 12, causing cracks and cracks in the electrical insulating material 13, and as a result, the airtightness of the hybrid integrated circuit device is broken and the inside of the hybrid integrated circuit device is broken. This has the disadvantage that the hybrid integrated circuit elements housed therein cannot be stably operated over a long period of time.
（発明の目的）
本発明は上記欠点に鑑み案出されたもので、その目的は
外部リード端子が発するジュール熱を小となすとともに
該外部リード端子の熱膨張を有効に吸収することによっ
て外部リード端子を保持する電気絶縁物にクラックや割
れが発生するのを皆無となし、内部に収納する混成集積
回路素子を長期間にわたり安定に作動させるとを可能と
した混成集積回路素子収納用パッケージを提供すること
にある。(Object of the Invention) The present invention has been devised in view of the above-mentioned drawbacks, and its purpose is to reduce the Joule heat generated by the external lead terminals and to effectively absorb the thermal expansion of the external lead terminals. Provides a package for storing hybrid integrated circuit elements that eliminates cracks and breaks in the electrical insulator that holds the terminals and allows the hybrid integrated circuit elements housed inside to operate stably over a long period of time. It's about doing.
（問題点を解決するための手段）
本発明は内部に混成集積回路素子を収納するための空所
を存する金属基体と、該金属基体に電気絶縁物を介して
植設された外部リード端子と、金属蓋体とから成る混成
集積回路素子収納用パフケージにおいて、前記外部リー
ド端子を比抵抗５．０μΩＧ以下の金属から成る芯体と
ビッカース硬度１７０以下の金属から成る被覆体の二重
構造としたことを特徴とするものである。(Means for Solving the Problems) The present invention includes a metal base having a cavity therein for accommodating a hybrid integrated circuit element, and an external lead terminal implanted in the metal base via an electrical insulator. In the puff cage for housing a hybrid integrated circuit element, the external lead terminal has a double structure of a core made of a metal with a specific resistance of 5.0 μΩG or less and a covering made of a metal with a Vickers hardness of 170 or less. It is characterized by this.
（実施例）
次に、本発明を第１図及び第２図に示す実施例に基づき
詳細に説明する。(Example) Next, the present invention will be described in detail based on an example shown in FIGS. 1 and 2.
第１図及び第２図は本発明の混成集積回路素子収納用パ
ッケージの一実施例を示し、１は無酸素銅等の金属から
成る金属基体、２はコバール（鉄−ニッケルーコバルト
合金）等の金属から成る金属蓋体である。この金属基体
ｌと金属蓋体２とにより内部に混成集積回路素子を収納
するための容器（パッケージ）が構成される。1 and 2 show an embodiment of the hybrid integrated circuit element storage package of the present invention, in which 1 is a metal base made of metal such as oxygen-free copper, 2 is Kovar (iron-nickel-cobalt alloy), etc. It is a metal lid body made of metal. The metal base 1 and the metal lid 2 constitute a container (package) for accommodating a hybrid integrated circuit element therein.
前記金属基体１は金属板１ａと金属枠体１ｂとから成り
、金属枠体１ｂを金属板１ａの周縁部に銀ロウ等のロウ
材を介しロウ付けすることによって形成される。The metal base 1 is composed of a metal plate 1a and a metal frame 1b, and is formed by brazing the metal frame 1b to the peripheral edge of the metal plate 1a via a brazing material such as silver solder.
前記金属基体１はその上面中央部に混成集積回路素子を
収納するための空所を有しており、該空所内に混成集積
回路素子３が収納される。The metal base 1 has a cavity in the center of its upper surface for accommodating a hybrid integrated circuit element, and a hybrid integrated circuit element 3 is housed in the cavity.
また前記金属基体ｌの金属枠体１ｂには多数の外部リー
ド端子４がガラス、セラミック等から成る電気絶縁物５
を介して植設されており、該外部リード端子４は内部に
収納する混成集積回路素子３を外部電気回路に接続する
作用を為す。Further, on the metal frame 1b of the metal base 1, a large number of external lead terminals 4 are connected to an electrical insulator 5 made of glass, ceramic, etc.
The external lead terminals 4 function to connect the hybrid integrated circuit element 3 housed inside to an external electric circuit.
前記外部リード端子４は金属枠体１ｂに設けた貫通孔内
に外部リード端子４を挿通させるとともにガラス（電気
絶縁物５）を介しガラス付けするか、または外部リード
端子４を一部表面にメクライズ金属層を有する筒状セラ
ミック体（電気絶縁物５）の貫通孔内に挿通させるとと
もにセラミック体を金属枠体１ｂに設けた貫通孔内に挿
通させ、しかる後それぞれを銀ロウを介しロウ付けする
ことによって金属基体１に電気的に絶縁されて植設され
る。The external lead terminal 4 is made by inserting the external lead terminal 4 into a through hole provided in the metal frame 1b and attaching the external lead terminal 4 to a glass (electrical insulator 5), or by macerating a part of the surface of the external lead terminal 4. The cylindrical ceramic body (electrical insulator 5) having a metal layer is inserted into the through hole, and the ceramic body is also inserted into the through hole provided in the metal frame 1b, and then each is brazed with silver solder. As a result, it is implanted in the metal base 1 in an electrically insulated manner.
また、前記外部リード端子４は比抵抗が５．０μΩｃｍ
以下の金属から成る芯体４ａとビッカース硬度が１７０
以下の金属から成る被覆体４ｂの二重構造を有しており
、外部リード端子４に混成集積回路素子３を作動させた
際等において１０〜２０ （Ａ ）の大電流が流れたと
しても電流のほとんどは比抵抗が低い芯体４ａに流れる
こととなり、これによって外部リード端子４は大きなジ
ュール発熱を起こし高温となることはなく、該外部リー
ド端子４を保持する電気絶縁物５に熱衝撃を印加させて
クラックや割れを発生させることはない。また同時に外
部リード端子４が熱膨張し、電気絶縁物５を押圧したと
しても、該押圧力は外部リード端子４の被覆体４ｂが軟
質であることから被覆体４ｂを若干変形させることによ
って吸収させることができ、外部リード端子４の熱膨張
に起因して発生する電気絶縁物５のクランクや割れも有
効に防止することができる。Further, the external lead terminal 4 has a specific resistance of 5.0 μΩcm.
The core body 4a is made of the following metal and has a Vickers hardness of 170.
It has a double structure of the covering body 4b made of the following metals, and even if a large current of 10 to 20 (A) flows through the external lead terminal 4 when the hybrid integrated circuit element 3 is operated, the current Most of this will flow to the core body 4a, which has a low specific resistance, so that the external lead terminal 4 will not generate large Joule heat and reach a high temperature, and will not cause a thermal shock to the electrical insulator 5 that holds the external lead terminal 4. No cracks or cracks will occur when applied. At the same time, even if the external lead terminal 4 thermally expands and presses the electrical insulator 5, the pressing force is absorbed by slightly deforming the covering 4b of the external lead terminal 4, since the covering 4b is soft. Therefore, cranking and cracking of the electrical insulator 5 caused by thermal expansion of the external lead terminal 4 can be effectively prevented.
尚、前記外部リード端子４を構成する芯体４ａはその比
抵抗が５．０μΩＧ以下の金属、具体的には銀、銅、金
、アルミニウムもしくはこれらを主成分とする合金など
から成り、比抵抗が５．０μΩｃｍ以下でないと大電流
が流れた際、ジュール発熱を小さくおさえることができ
ず、電気絶縁物５に熱衝撃印加によるクランクや割れを
発生させてしまう。The core body 4a constituting the external lead terminal 4 is made of a metal with a specific resistance of 5.0 μΩG or less, specifically silver, copper, gold, aluminum, or an alloy containing these as main components. If it is not 5.0 μΩcm or less, when a large current flows, Joule heat generation cannot be suppressed to a small extent, and the electric insulator 5 will be caused to crack or crack due to the application of thermal shock.
また被覆体４ｂはそのビッカース硬度（Ｉｌｖ）が１７
０以下の金属、具体的には鉄、ニッケル、コバルト、チ
タンもしくはこれらを主成分とする合金等から成り、ビ
ッカース硬度（Ｈｖ）が１７０以下でないと外部リード
端子が熱膨張した際、その膨張を変形によって吸収する
ことができず、電気絶縁物５に押圧力印加によるクラッ
クや割れを発生させてしまう。Further, the covering body 4b has a Vickers hardness (Ilv) of 17
0 or less, specifically iron, nickel, cobalt, titanium, or alloys containing these as main components, and if the Vickers hardness (Hv) is not 170 or less, when the external lead terminal thermally expands, the expansion will be suppressed. It cannot be absorbed due to deformation, and cracks and cracks occur in the electrical insulator 5 due to the application of pressing force.
前記外部リード端子４は銅等の比抵抗が５．０μΩｃｍ
以下の金属の外周にビッカース硬度（Ｈｖ）が１７０以
下の金属を被着させて得たインゴットを伸線機を使用し
て細そく引き伸ばすことによって形成される。The external lead terminal 4 is made of copper or the like with a specific resistance of 5.0 μΩcm.
It is formed by applying a metal having a Vickers hardness (Hv) of 170 or less to the outer periphery of the following metal, and stretching the ingot into a thin piece using a wire drawing machine.
かくして金属基体ｌの空所に混成集積回路素子３を収納
し、混成集積回路素子３の各電気配線をワイヤ６を介し
外部リード端子４に接続するとともに金属蓋体２を金属
基体ｌに取着し、内部を気密に封止することによって最
終製品としての混成集積回路装置が完成する。Thus, the hybrid integrated circuit element 3 is housed in the empty space of the metal base l, each electrical wiring of the hybrid integrated circuit element 3 is connected to the external lead terminal 4 via the wire 6, and the metal lid body 2 is attached to the metal base l. Then, by hermetically sealing the inside, a hybrid integrated circuit device is completed as a final product.
（発明の効果）
本発明の混成集積回路素子収納用パッケージによれば、
金属基体に電気絶縁物を介して植設される外部リード端
子を比抵抗が５．０μΩｃｍ以下の金属から成る芯体と
ビッカース硬度が１７０以下の金属から成る被覆体の二
重構造としたことから混成集積回路装置を作動させた際
、外部リード端子に大きな電流が流れたとしても電流の
ほとんどは比抵抗が低い芯体に流れて大きなジュール発
熱を起こすことはなく、外部リード端子を低温として該
外部リード端子を保持す電気絶縁物に熱衝撃印加による
クラックや割れの発生を皆無となすことができる。 ま
た、外部リード端子が熱膨張し、電気絶縁物を押圧した
としても該押圧力は外部リード端子の被覆体を変形させ
ることによって吸収でき、外部リード端子の熱膨張に起
因して発生する電気絶縁物のクラックや割れを皆無とな
して、混成集積回路装置の気密性を維持するとともに内
部に収納する混成集積回路素子を長期間にわたり安定に
作動させることも可能となる。(Effects of the Invention) According to the hybrid integrated circuit element storage package of the present invention,
The external lead terminal, which is implanted on the metal base via an electrical insulator, has a dual structure consisting of a core made of metal with a specific resistance of 5.0 μΩcm or less and a covering made of metal with a Vickers hardness of 170 or less. When a hybrid integrated circuit device is operated, even if a large current flows through the external lead terminals, most of the current flows through the core, which has a low specific resistance, and does not generate large Joule heat, and the external lead terminals are kept at a low temperature. It is possible to completely eliminate the occurrence of cracks or fractures due to the application of thermal shock to the electrical insulator that holds the external lead terminals. In addition, even if the external lead terminal thermally expands and presses the electrical insulator, the pressing force can be absorbed by deforming the covering of the external lead terminal, and the electrical insulation generated due to the thermal expansion of the external lead terminal It becomes possible to maintain the airtightness of the hybrid integrated circuit device without any cracks or breaks in the object, and to stably operate the hybrid integrated circuit elements housed inside for a long period of time.
第１図は本発明の混成集積回路素子収納用パッケージの
断面図、第２図は第１図の丸部拡大断面図、第３図は従
来の混成集積回路素子収納用パッケージの断面図である
。FIG. 1 is a cross-sectional view of a package for housing a hybrid integrated circuit element according to the present invention, FIG. 2 is an enlarged cross-sectional view of the circle portion of FIG. 1, and FIG. 3 is a cross-sectional view of a conventional package for housing a hybrid integrated circuit element. .
Claims (1)
る金属基体と、該金属基体に電気絶縁物を介して植設さ
れた外部リード端子と、金属蓋体とから成る混成集積回
路素子収納用パッケージにおいて、前記外部リード端子
を比抵抗５．０μΩｃｍ以下の金属から成る芯体とビッ
カース硬度１７０以下の金属から成る被覆体の二重構造
としたことを特徴とする混成集積回路素子収納用パッケ
ージ。A device for housing a hybrid integrated circuit element consisting of a metal base having a space inside for housing the hybrid integrated circuit element, an external lead terminal implanted in the metal base via an electrical insulator, and a metal lid body. A package for housing a hybrid integrated circuit element, characterized in that the external lead terminal has a double structure of a core made of a metal having a specific resistance of 5.0 μΩcm or less and a covering made of a metal having a Vickers hardness of 170 or less.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61061630A JPS62217649A (en) | 1986-03-18 | 1986-03-18 | Package for containing hybrid integrated circuit element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61061630A JPS62217649A (en) | 1986-03-18 | 1986-03-18 | Package for containing hybrid integrated circuit element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62217649A true JPS62217649A (en) | 1987-09-25 |
Family
ID=13176701
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61061630A Pending JPS62217649A (en) | 1986-03-18 | 1986-03-18 | Package for containing hybrid integrated circuit element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62217649A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60161649A (en) * | 1984-02-02 | 1985-08-23 | Sumitomo Electric Ind Ltd | Lead frame |
| JPS60242653A (en) * | 1984-05-16 | 1985-12-02 | Daido Steel Co Ltd | Composite material for lead frame |
-
1986
- 1986-03-18 JP JP61061630A patent/JPS62217649A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60161649A (en) * | 1984-02-02 | 1985-08-23 | Sumitomo Electric Ind Ltd | Lead frame |
| JPS60242653A (en) * | 1984-05-16 | 1985-12-02 | Daido Steel Co Ltd | Composite material for lead frame |
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