JPS62216519A - Automatic frequency control circuit - Google Patents

Automatic frequency control circuit

Info

Publication number
JPS62216519A
JPS62216519A JP5830486A JP5830486A JPS62216519A JP S62216519 A JPS62216519 A JP S62216519A JP 5830486 A JP5830486 A JP 5830486A JP 5830486 A JP5830486 A JP 5830486A JP S62216519 A JPS62216519 A JP S62216519A
Authority
JP
Japan
Prior art keywords
signal
circuit
local oscillator
frequency
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5830486A
Other languages
Japanese (ja)
Other versions
JPH0716150B2 (en
Inventor
Yoshiharu Tamura
田村 義晴
Gozo Kage
鹿毛 豪藏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP5830486A priority Critical patent/JPH0716150B2/en
Priority to DE3789984T priority patent/DE3789984T2/en
Priority to AU69677/87A priority patent/AU589088B2/en
Priority to CA000531080A priority patent/CA1306504C/en
Priority to EP87103096A priority patent/EP0238906B1/en
Priority to US07/022,078 priority patent/US4810101A/en
Publication of JPS62216519A publication Critical patent/JPS62216519A/en
Publication of JPH0716150B2 publication Critical patent/JPH0716150B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To avoid a trouble increasing excessively a loop time constant by extracting only a DC offset formed by eliminating a digital signal component from a reception signal E and using the value as a control voltage of an oscillation frequency of a local oscillator. CONSTITUTION:The reception signal E is inputted to a sample-holding circuit 7 through an LPF 6, where the signal is subjected to sample-holding by using a sampling pulse S. An identification circuit 8 generates two-bit binary signals D1, D2, and a multi-value signal generation circuit 9 generates reference 4-value voltages V21, V22, V23, V24. The difference between voltage V1n and V2n becomes a signal x3 by a subtraction circuit 10, fed to a control input of an oscillation frequency of a local oscillator 13 and a negative feedback loop to decrease the difference signal x3 is formed. It is not required to eliminate a base band component of a digital signal as a conventional circuit, the cut-off frequency is far increased.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はディジタル無線機における局部発振器の自動周
波数制御(AFC)回路に関するものでろる。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an automatic frequency control (AFC) circuit for a local oscillator in a digital radio.

〔従来の技術〕[Conventional technology]

一般にディジタル無&!通信においては、送信機におけ
る中心周波数の“ずれ°°、または受信機における局部
発振器の発振周波数の“ずれ°によつてIF倍信号中心
周波数が変化して、IF倍信号号の誤9率が増加する。
Generally no digital &! In communications, the center frequency of the IF multiplied signal changes due to a shift in the center frequency at the transmitter or a shift in the oscillation frequency of the local oscillator at the receiver, which increases the error rate of the IF multiplied signal. To increase.

すなわち、別の表現をすると、同じ誤シ率を得るために
、より高い受信入力を必要とすることになり、結果的に
感度が劣化する。
In other words, in order to obtain the same error rate, a higher reception input is required, resulting in a decrease in sensitivity.

これを防ぐため、従来の技術としては、高安定な発振器
を送信機の信号源および受信機の局部発振器として用い
る方法やディスクリミネータ出力の直流分の変化によっ
て局部発振器の発振周波数を制御してIF倍信号中心周
波数を一定に保つように帰還をかける、いわゆるAFC
l路を用いる方法などがめった。
To prevent this, conventional techniques include using a highly stable oscillator as a signal source for the transmitter and as a local oscillator for the receiver, and controlling the oscillation frequency of the local oscillator by changing the DC component of the discriminator output. A so-called AFC that applies feedback to keep the center frequency of the IF multiplied signal constant.
Methods using the L route were rare.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

前述した高安定な発振器を用いる方法およびディスクリ
ミネータ出力の直流分を取り出してgをかける方法の問
題点について説明する。
The problems of the method using the highly stable oscillator and the method of taking out the DC component of the discriminator output and multiplying it by g will be explained.

まず、前者の高安定な発振器を用いる方法では、特に周
波数が高くなった場合に問題がるる。今、発振器の安定
度を±3ppmとした場合、無線周波数900MHzに
おける変化量は最大±2.7KHzとなる。
First, the former method of using a highly stable oscillator has problems especially when the frequency becomes high. Now, assuming that the stability of the oscillator is ±3 ppm, the amount of change at the radio frequency of 900 MHz is at most ±2.7 KHz.

ここで、10KHzのデジタル信号を伝送する場合、I
Fフィルタの通過帯域幅は同じ< 10KHz程度であ
り、上記の値は無視できないものとなシ、誤り率の増加
をもたらす。そして、安定度lppm程度の発振器を得
ることはiJ能でるるか、高度の安定化技術とエージン
グが必要となシ、コストおよび実装スペースを増加嘔せ
るという問題点がめった。
Here, when transmitting a 10KHz digital signal, I
The passband width of the F filter is about the same <10 KHz, and the above value cannot be ignored, resulting in an increase in the error rate. However, it is difficult to obtain an oscillator with a stability of about 1 ppm, which requires advanced stabilization technology and aging, which increases cost and mounting space.

つぎに、後者のディスクリミネータ出力より直流分を取
り出す方法の問題点について説明する。
Next, problems with the latter method of extracting the DC component from the discriminator output will be explained.

一般にディジタル信号はその性質上、直流付近まで有効
なベースバンド成分を持っている。この成分を取り除い
て、直流分のみ金取り出すためにはカットオフ周波数の
非常に低い低域フィルタを用いる必要がおる。しかしな
がら、低いカットオフ周波数の低域フィルタが負帰還ル
ープに挿入てれると、ループの時定数が長くなシ、IF
周波数の追随に要する時間が数秒もかかるという結果に
なる。これは、短い会話における一回の受信時間が数秒
でおることを考えると適切な方法ではないのは明らかで
ある。
In general, digital signals have baseband components that are effective up to near DC due to their nature. In order to remove this component and extract only the DC component, it is necessary to use a low-pass filter with a very low cutoff frequency. However, if a low-pass filter with a low cutoff frequency is inserted into the negative feedback loop, the loop time constant will be long and the IF
As a result, it takes several seconds to track the frequency. This is clearly not an appropriate method considering that a single reception time in a short conversation lasts only a few seconds.

〔問題点を解決するための手段〕[Means for solving problems]

本発明のAFC回路は、IP’信号の中心周波数を一定
に保つように局部発振器の発振周波数を制御するように
構成し、受信信号のアイパターンをその中心の時点でサ
ンプリングする第1の手段と、上記受信信号のアイパタ
ーンまたは上記@iの手段の出力よCM別した結果をも
とにして多値信号を発生する第2の手段と、上記第1の
手段と第2の手段の出力が同一の情報を我わす区間につ
いてそれぞれの差を出力する第3の手段とを備え、上記
第3の手段の出力によって上記局部発振器の発振周波数
を制御せしめるようにしたもの“でめる。
The AFC circuit of the present invention is configured to control the oscillation frequency of the local oscillator so as to keep the center frequency of the IP' signal constant, and includes first means for sampling the eye pattern of the received signal at the center point thereof. , a second means for generating a multilevel signal based on the eye pattern of the received signal or the output of the @i means for each CM, and the outputs of the first means and the second means are and a third means for outputting the respective differences between sections where the same information is transmitted, and the oscillation frequency of the local oscillator is controlled by the output of the third means.

また、本発明の別の発明は、上記のものにおいて、局部
発振器の発振周波数の制御入力端に信号を受信している
期間のみ上記第3の手段の出力を供給する第4の手段を
備えてなるようにしたものでめる。
Another aspect of the present invention is the above-mentioned device, further comprising a fourth means for supplying the output of the third means only during a period when a signal is being received at the oscillation frequency control input terminal of the local oscillator. I'm going to make it happen.

〔作用〕[Effect]

本発明においては、受信信号からディジタル信号成分を
除去した直流オフセットのみを抽出し、この値を局部発
振器の発振周波数の制御電圧とする。
In the present invention, only the DC offset obtained by removing the digital signal component from the received signal is extracted, and this value is used as the control voltage for the oscillation frequency of the local oscillator.

〔実施例〕〔Example〕

以下、図面に基づき本発明の実施例を評細に説明する。 Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

第1図は本発明の一実施例を示すブロック図でるる。FIG. 1 is a block diagram showing one embodiment of the present invention.

図において、1は高周波フィルタおよび高周波アンプ、
2はこの高周波フィルタおよび高周波アンプ1の出力と
局部発振器13により発振てれたローカル信号とを混合
してIP信号に変換する混合器(ミキサ)、3はこのミ
キサ2の出力を入力とするIFフィルタ、4はこのIF
フィルタ3の出力側に接続てれたIFアンプ、5はこの
IFアンプ4の出力を入力とするディスクリミネータ、
6はこのディスクリミネータ5の出力金入力とする低域
フィルタ(LPF) 、7はこのLPF6からの信号を
サンプルホールドするサンプルホールド回路で、このサ
ンプルホールド回路Tは受信信号のアイパターンをその
中心の時点でサンプリングするサンプリング手段を構成
している。
In the figure, 1 is a high frequency filter and a high frequency amplifier;
2 is a mixer that mixes the output of this high frequency filter and high frequency amplifier 1 with the local signal oscillated by the local oscillator 13 and converts it into an IP signal, and 3 is an IF that receives the output of this mixer 2 as input. Filter, 4 is this IF
IF amplifier connected to the output side of filter 3; 5 is a discriminator whose input is the output of this IF amplifier 4;
6 is a low-pass filter (LPF) which inputs the output of this discriminator 5; 7 is a sample-and-hold circuit that samples and holds the signal from this LPF 6; this sample-and-hold circuit T sets the eye pattern of the received signal at its center; It constitutes a sampling means for sampling at the point in time.

8はこのサンプルホールド回路Tの出力を入力とし2ビ
ツトの2億信号を生成する識別回路、9はこの識別回路
8の出力を入力とし基準となる4値電圧を発生する多値
信号発生回路で、これらは受信信号のアイパターンまた
は上記サンプリング手段の出力より識別した結果をもと
にして多値信号を発生する手段を構成している。
Reference numeral 8 designates an identification circuit that receives the output of this sample and hold circuit T as an input and generates a 2-bit 200 million signal, and 9 represents a multi-value signal generation circuit that receives the output of this identification circuit 8 as an input and generates a four-value voltage as a reference. , these constitute means for generating a multilevel signal based on the eye pattern of the received signal or the result identified from the output of the sampling means.

10はサンプルホールド回路Tからの出力と多値信号発
生回路9よりの出力を入力とし両出力の差を得る減算回
路で、この減算回路10は上記サンプリング手段の出力
と上記多値信号発生手段の出力が同一の情報を表わす区
間についてそれぞれの差を出力する差出力手段を構成し
ている。11はこの減算回路10からの差信号を入力と
するLPF、12はこのLPFl 1 の出力側に接続
された回路で、この回路12Fi、信号の受信中でるる
ことを示す信号が入力される端子14からの信号によっ
て制御されるように構成されている。1ftこの回路1
2の出力によって発振周波数が制御される局部発振器で
ある。そして、上記回路12は局部発振器13の発振周
波数の制御入力端に信号を受信している期間のみ上記差
出力手段の出力を供給する手段を構成している。
Reference numeral 10 denotes a subtraction circuit which inputs the output from the sample hold circuit T and the output from the multi-value signal generation circuit 9 and obtains the difference between the two outputs. Difference output means is configured to output differences between sections whose outputs represent the same information. 11 is an LPF which inputs the difference signal from this subtraction circuit 10, 12 is a circuit connected to the output side of this LPFl 1, and this circuit 12Fi is a terminal to which a signal indicating that a signal is being received is inputted. It is configured to be controlled by a signal from 14. 1ft this circuit 1
This is a local oscillator whose oscillation frequency is controlled by the output of 2. The circuit 12 constitutes means for supplying the output of the difference output means only during the period when a signal is being received at the oscillation frequency control input terminal of the local oscillator 13.

つぎにこの第1図に示す実施例の動作を第2図を参照し
て説明する。この第2図は第1図の各部の動作波形を示
す動作説明図で、Sはサンプリングパルスを示したもの
でめり、Eは受信信号を示したものでるる。そして、x
lは東線を示し、x3は破線、X、は差信号を示す。な
お、この第2図においては、多値信号として4mの例を
示している。
Next, the operation of the embodiment shown in FIG. 1 will be explained with reference to FIG. 2. This FIG. 2 is an operation explanatory diagram showing the operating waveforms of each part of FIG. 1, where S indicates a sampling pulse and E indicates a received signal. And x
l indicates the east line, x3 indicates a broken line, and X indicates a difference signal. In addition, in this FIG. 2, an example of 4 m is shown as a multilevel signal.

まず、アンテナによって捕捉された受信波は高周波フィ
ルタおよび高周波アンプ1を通シ、局部発振器13によ
り発揚されたローカル信号とミキサ2とKよってIP倍
信号変換され、そのIP倍信号IFフィルタ3およびI
Fアンプ4を通過した後、ディスクリミネータ5でベー
スバンドの受信信号Eとなる。
First, a received wave captured by an antenna passes through a high frequency filter and a high frequency amplifier 1, and is converted into an IP multiplied signal by a local signal emitted by a local oscillator 13 and mixers 2 and K, and the IP multiplied signal is converted into an IP multiplied signal by an IF filter 3 and an I
After passing through the F amplifier 4, it becomes a baseband reception signal E at a discriminator 5.

そして、この受信信号EはLPF6を通してサンプルホ
ールド回路Tへ入力され、サンプリングパルスSによっ
てサンプルホールドされる。ここで、このサンプリング
パルスSのタイミングは受信信号Eのアイパターンが開
いている時点に選ばれる。
This received signal E is input to the sample and hold circuit T through the LPF 6, and sampled and held by the sampling pulse S. Here, the timing of this sampling pulse S is selected at the time when the eye pattern of the received signal E is open.

このために、サンプルホールド回路7の出力は第2図に
示す実1ix□のような矩形を示す。そして、この第2
図に示す各電圧v11 、v12 、V工1llv14
はそれぞれ上記受信信号EのJ + ’4 + E3 
+ E4をサンプルした値となっている。
For this reason, the output of the sample-and-hold circuit 7 has a rectangular shape like the real 1ix□ shown in FIG. And this second
Each voltage shown in the figure v11, v12, V1llv14
are J + '4 + E3 of the above received signal E, respectively.
The value is a sample of +E4.

一方、識別回路8によって2ビツトの2値信号D1.D
、が生成され、多値信号発生回路9において、基準とな
る4値電圧v2□+ vll 11 Ivm8 、v2
4を発生する。
On the other hand, the identification circuit 8 outputs a 2-bit binary signal D1. D
, is generated, and in the multi-value signal generation circuit 9, the reference four-value voltage v2□+ vll 11 Ivm8 , v2
Generates 4.

ココテ、この4値電圧vl I Ivm 11 +”1
1 B lv24はIF倍信号中心周波数が設計値に等
しいときの各電圧v1、。
Kokote, this four-value voltage vl I Ivm 11 +”1
1 B lv24 is each voltage v1 when the IF multiplied signal center frequency is equal to the design value.

V工m1v181v14に等しい。第2図における破線
x2はこの波形を示している。
It is equal to V engineering m1v181v14. The broken line x2 in FIG. 2 shows this waveform.

なお、この第2図においては電圧の変化する時点が多少
ずれている。これは、識別回路8および多値信号発生回
路9によるものでろるが、この識別回路8および多値信
号発生回路9には大きな時定数は含まれず、サンプリン
グの間隔に比べて無視することができるので、実際上は
同時と見做して差し支えない。
Note that in FIG. 2, the points at which the voltage changes are slightly shifted. This may be due to the identification circuit 8 and the multi-value signal generation circuit 9, but the identification circuit 8 and the multi-value signal generation circuit 9 do not include a large time constant and can be ignored compared to the sampling interval. Therefore, in reality, it can be regarded as simultaneous.

ぢて、電圧vlnと電圧V□の差は、減算回路10によ
って差信号X、となシ、局部発振器13の発振周波数の
制御入力端に加えられ、上記差信号x8の電圧を小ぢく
するような負帰還ループが形成される。
Therefore, the difference between the voltage vln and the voltage V□ is applied to the difference signal X by the subtraction circuit 10 to the oscillation frequency control input terminal of the local oscillator 13, thereby reducing the voltage of the difference signal x8. A negative feedback loop is formed.

そして、低域フィルタ(LPF)11は上記ループの時
定数を大きくしない程度に挿入される。この場合、従来
のように、ディスクリミネータ5の出力を直接直流化す
るときに問題となったような、ディジタル信号のベース
バンド成分を除去する必要がないので、単にノイズだけ
を抑圧すればよく、カットオフ周波数は前者に比べてず
つと高くできる。
A low-pass filter (LPF) 11 is inserted to an extent that does not increase the time constant of the loop. In this case, there is no need to remove the baseband component of the digital signal, which was a problem when directly converting the output of the discriminator 5 to direct current, as in the past, so it is sufficient to simply suppress the noise. , the cutoff frequency can be made higher than that of the former.

つぎに第1図の実施例では本発明の別の発明によるAF
C回路の実症例も同時に示している。
Next, in the embodiment shown in FIG.
An actual case of C circuit is also shown.

すなわち、受信信号がない場合には、差信号x3には大
きなノイズ電圧がでる。このために、無信号時および送
信時に局部発振周波数が不安定になる可能性がろる。こ
のようなことを避けるため、信号を受信している期間の
み負帰還ループを働かせ、他の期間では一定の゛電圧、
例えば、接地レベルに制御電圧を固定することが考えら
れる。
That is, when there is no received signal, a large noise voltage appears in the difference signal x3. Therefore, there is a possibility that the local oscillation frequency becomes unstable when there is no signal and during transmission. In order to avoid this, the negative feedback loop is activated only during the period when the signal is being received, and the voltage remains constant during other periods.
For example, it is conceivable to fix the control voltage to ground level.

第1図に示す回路12はこのような手段の一例を示して
おり、端子14には信号の受信中でるることを示す信号
が加えられる。また、信号受信期間以外は最後の信号受
信期間における値をホールドするようにしてもよい。
A circuit 12 shown in FIG. 1 is an example of such a means, and a signal is applied to a terminal 14 indicating that a signal is being received. Furthermore, the value in the last signal reception period may be held during periods other than the signal reception period.

嘔らに、この第1図は説明を閏単にするためにシングル
ス−パー受信機を例にとっているが、本発明の適用はこ
れに限定でれるものではなく、ダブルス−パー受信機に
も全く同様に適用でき、この場合、帰還は第1局発ある
いは第2局発のいずれにかけてもよい。
Moreover, although this FIG. 1 uses a single super receiver as an example to simplify the explanation, the application of the present invention is not limited to this, and the application of the present invention is equally applicable to a double super receiver. In this case, the feedback may be applied to either the first station or the second station.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば、受信信号Eから
ディジタル信号成分を除去した直流オフセットのみを抽
出し、この値を局部発振器の発振周波数の制御電圧とし
ているため、前述したようなループの時定数が極端に大
きくなるような問題を回避することができ、また、高価
な水晶発振器やエージングは不要であるためにコストの
面でも問題はない。
As explained above, according to the present invention, only the DC offset obtained by removing the digital signal component from the received signal E is extracted, and this value is used as the control voltage for the oscillation frequency of the local oscillator. Problems such as an extremely large time constant can be avoided, and there is no cost problem since an expensive crystal oscillator or aging is not required.

このように、本発明のAFC回路は従来のこの種の回路
より性能、コストの両面において大きく優れており、デ
ィジタル無線機における局部発振器のに℃回路としては
独自のものでるる。
As described above, the AFC circuit of the present invention is significantly superior to conventional circuits of this type in terms of both performance and cost, and is unique as a local oscillator circuit for digital radio equipment.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示すブロック図、第2図は
第1図の各部の動作波形を示す動作説明図でめる。 5・・・・ディスクリミネータ、T・・・・サンプルホ
ールド回路、8・・・・識別回路、9・・・・多値信号
発生回路、10・・・・減算回路、12・・・・回路、
13・・・・局部発振器。
FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is an operation explanatory diagram showing operation waveforms of each part of FIG. 1. 5...Discriminator, T...Sample hold circuit, 8...Discrimination circuit, 9...Multi-value signal generation circuit, 10...Subtraction circuit, 12... circuit,
13...Local oscillator.

Claims (2)

【特許請求の範囲】[Claims] (1)中間周波信号の中心周波数を一定に保つように局
部発振器の発振周波数を制御する自動周波数制御回路に
おいて、受信信号のアイパターンをその中心の時点でサ
ンプリングする第1の手段と、前記受信信号のアイパタ
ーンまたは前記第1の手段の出力より識別した結果をも
とにして多値信号を発生する第2の手段と、前記第1の
手段と第2の手段の出力が同一の情報を表わす区間につ
いてそれぞれの差を出力する第3の手段とを備え、前記
第3の手段の出力によつて前記局部発振器の発振周波数
を制御せしめるようにしたことを特徴とする自動周波数
制御回路。
(1) In an automatic frequency control circuit that controls the oscillation frequency of a local oscillator so as to keep the center frequency of an intermediate frequency signal constant, a first means for sampling an eye pattern of a received signal at its center point; a second means for generating a multilevel signal based on the result identified from the eye pattern of the signal or the output of the first means; and the outputs of the first means and the second means contain the same information. an automatic frequency control circuit comprising: third means for outputting respective differences for the sections represented; and an oscillation frequency of the local oscillator is controlled by the output of the third means.
(2)中間周波信号の中心周波数を一定に保つように局
部発振器の発振周波数を制御する自動周波数制御回路に
おいて、受信信号のアイパターンをその中心の時点でサ
ンプリングする第1の手段と、前記受信信号のアイパタ
ーンまたは前記第1の手段の出力より識別した結果をも
とにして多値信号を発生する第2の手段と、前記第1の
手段と第2の手段の出力が同一の情報を表わす区間につ
いてそれぞれの差を出力する第3の手段とを備え、この
第3の手段の出力によつて前記局部発振器の発振周波数
を制御せしめるようになし、かつ前記局部発振器の発振
周波数の制御入力端に信号を受信している期間のみ前記
第3の手段の出力を供給する第4の手段を備えてなるこ
とを特徴とする自動周波数制御回路。
(2) In an automatic frequency control circuit that controls the oscillation frequency of a local oscillator so as to keep the center frequency of an intermediate frequency signal constant, a first means for sampling an eye pattern of a received signal at its center; a second means for generating a multilevel signal based on the result identified from the eye pattern of the signal or the output of the first means; and the outputs of the first means and the second means contain the same information. third means for outputting respective differences for the sections represented, the oscillation frequency of the local oscillator is controlled by the output of the third means, and the control input for the oscillation frequency of the local oscillator is provided. An automatic frequency control circuit comprising: fourth means for supplying the output of the third means only during a period when a signal is being received at the end of the automatic frequency control circuit.
JP5830486A 1986-03-05 1986-03-18 Automatic frequency control circuit Expired - Fee Related JPH0716150B2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP5830486A JPH0716150B2 (en) 1986-03-18 1986-03-18 Automatic frequency control circuit
DE3789984T DE3789984T2 (en) 1986-03-05 1987-03-04 Noise signal detection by sampling the digital fundamental frequency signal at an eye opening.
AU69677/87A AU589088B2 (en) 1986-03-05 1987-03-04 Noise detection by sampling digital baseband signal at eye openings
CA000531080A CA1306504C (en) 1986-03-05 1987-03-04 Noise detection by sampling digital baseband signal at eye openings
EP87103096A EP0238906B1 (en) 1986-03-05 1987-03-04 Noise detection by sampling digital baseband signal at eye openings
US07/022,078 US4810101A (en) 1986-03-05 1987-03-05 Noise detection by sampling digital baseband signal at eye openings

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5830486A JPH0716150B2 (en) 1986-03-18 1986-03-18 Automatic frequency control circuit

Publications (2)

Publication Number Publication Date
JPS62216519A true JPS62216519A (en) 1987-09-24
JPH0716150B2 JPH0716150B2 (en) 1995-02-22

Family

ID=13080486

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5830486A Expired - Fee Related JPH0716150B2 (en) 1986-03-05 1986-03-18 Automatic frequency control circuit

Country Status (1)

Country Link
JP (1) JPH0716150B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6400778B1 (en) 1997-12-04 2002-06-04 Nec Corporation DC-offset canceller

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6400778B1 (en) 1997-12-04 2002-06-04 Nec Corporation DC-offset canceller

Also Published As

Publication number Publication date
JPH0716150B2 (en) 1995-02-22

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