JPS62207903A - Capacitance type displacement detector - Google Patents

Abstract

PURPOSE:To detect displacement with less electric power consumption by dividedly executing n-times of the action for evaluating the capacity ratio of a variable capacitor, the capacity of which varies with the displacement and a fixed capacitor, the capacity of which is constant as the ratio of time duration. CONSTITUTION:The variable capacitor CX, the electrostatic capacity of which varies with the displacement is first connected to an integrator 10 and the positive integral action is executed by 1/n the reference time. The output voltage of the integrator is thereby gradually increased. The counting of clock pulses from an oscillator 10 by a counter 23 of a displacement detecting circuit 16 is then started and the negative integral action is executed by connecting the fixed capacitor CR to the integrator 10. The counting of the counter 23 is stopped when a reference voltage Vref is attained on dropping of the output voltage of the integrator 10. The value of the counter 23 corresponds to the displacement of the variable capacitor CX and the detection is executed with the less electric power consumption if the above-mentioned action is executed repeatedly n-times.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a capacitive displacement detection device, which includes a variable capacitor whose capacitance changes in accordance with displacement, a fixed capacitor whose capacitance is constant, and a fixed capacitor whose capacitance is constant. The design uses a common integrating capacitor for double integration, and evaluates the capacitance ratio of the variable capacitor and fixed capacitor as the ratio of time length, allowing displacement to be detected digitally and reducing power consumption. Displacement detection! Regarding the improvement of A position.

[Background technology and its problems]

Displacement detection devices are widely used to automatically measure length, weight, pressure, etc. For example, there are various types of displacement detection devices used to digitally display measured values, such as linear displacement length measuring devices, such as photoelectric type and contact type, but from the viewpoint of reducing power consumption and ensuring stable operation, electrostatic A capacitive method may be adopted.

As shown in FIG. 5, the conventional structure of such a capacitance type displacement detection device includes a fixed electrode 101 having element electrodes 103 arranged at a constant pitch, and a movable electrode lOO having element electrodes 102 arranged at a constant pitch. are placed relative to each other and a high frequency power source (not shown) is applied between them.
By relatively moving in the direction, a cyclic signal as shown in FIG. 5(B) is generated, and the displacement is detected by evaluating this signal.

However, Ueda's conventional displacement detection device had the following drawbacks.

■Since multiple element electrodes must be arranged at a constant pitch, there will be irregularities in the electrical characteristics of each element electrode, arrangement pitch, clearance with the opposing electrode, etc., and these will directly affect accuracy, so high There was a problem in that it was difficult to detect accuracy.

■When miniaturizing, the element electrodes must be processed extremely finely, and since the change in capacitance is small, it is necessary to use high frequency waves, and this high frequency device has an economical negative impact.
U is also large, and at the same time, it has drawbacks such as being susceptible to fluctuations in power supply voltage and ambient temperature.

・■Also, since the detected signal is an analog signal, there is a problem that a special A/D converter must be used when a digital signal is required for later use for display or control.

■Furthermore, although the power consumption is lower than that of the photoelectric type, the built-in battery is insufficient for use in small length measuring devices, and further reductions in power consumption have been desired.

As described above, although the general principle of the capacitance type, which has an hour wheel structure and relatively high sensitivity, is known in the past, the above-mentioned problems have prevented its practical application.

[Purpose of the invention]

The present invention has been made to solve the above-mentioned conventional problems, and it is possible to stably maintain measurement accuracy, and also to directly detect the displacement detection amount as a digital signal while reducing the size and power consumption. It is an object of the present invention to provide a capacitance type displacement detection device.

c Means and operation for solving the problem] (Means) The present invention provides a variable capacitor whose capacitance changes with displacement and a fixed capacitor whose capacitance is constant. The so-called double integration is performed using the electric voltage and the integral capacitor of the integrator in common, and the capacitance ratio between the variable capacitor and the fixed capacitor is evaluated as a ratio of time length, and the displacement can be digitally detected and measured. Depending on the aspect, the double integration operation is repeated a number of times equal to the set number of divisions to reduce power consumption.

Specifically, a variable capacitor formed to change capacitance in accordance with displacement, a fixed capacitor with a constant capacitance, and an integrator in which the variable capacitor and fixed capacitor are switched and connected. a sequence circuit for selectively switching the variable capacitor to the integrator before the elapse of a predetermined reference time and the fixed capacitor to the integrator after the elapse of a predetermined reference time, and performing a double integration operation according to a predetermined procedure; a comparison circuit for comparing the output voltage of the device with a reference voltage to find a cross point where both voltages are equal; and a cross point signal of the comparison circuit for an effective measurement time from the end of the reference time to the time the cross point is reached. effective W111 time detection circuit which is obtained by using the effective W111 time detection circuit, and displacement detection which is connected to the detection circuit and detects the displacement corresponding to the capacitance of the variable capacitor based on the ratio of the effective measurement time to the reference time. a division setting device for dividing the reference time into n divided reference times, and repeating the double integration operation in the integrator n times based on the number of divisions set by the division setting device. The section effective measurement time is determined for each section reference time via the comparison circuit and the effective measurement time detection circuit, and the displacement is determined by the displacement detection circuit as the effective measurement time using the sum of the section effective measurement times. The object of the present invention is to achieve the above object by arranging the detection method.

(Function) First, a variable capacitor whose capacitance changes in accordance with displacement is connected to an integrator, and a positive integration operation is performed for a reference time. This increases the charge on the integrating capacitor and gradually increases the output voltage of the integrator.

Next, after a reference time has elapsed, a fixed capacitor is connected to the integrator instead of the variable capacitor, and a negative integration operation is performed. The integrator output voltage gradually drops. As a result, the output voltage and the reference voltage are compared, and a cross point where both voltages become equal is detected at the comparison port. Using the detection signal at this crosspoint, that is, the crosspoint signal, the effective measurement time from the end of the reference time to the time when the crosspoint signal is generated, that is, when the crosspoint is reached, is determined. Here, variable capacitors are C and I, fixed capacitors are C1, reference time is T8, and effective measurement time is T8.
Then, the formula TX −C* /C++ XTs holds true. That is, since the power supply voltage and the integrating capacitor for the variable capacitor and the fixed capacitor are common, the reference time T and the effective measurement time T are the ratio of the variable capacitor CX and the fixed capacitor CR. Therefore, by finding the effective measurement time Tx with respect to the preset reference time Ts, the capacitance of the variable capacitor relative to the fixed capacitor with constant capacitance can be found. By the way, since the capacitance of the variable capacitor is proportional to the displacement, the effective measurement time corresponds to the displacement.

Therefore, the amount of displacement can be detected by evaluating this effective measurement time TX. For this evaluation, the amount of displacement can be directly detected as a digital signal by, for example, time-sharing using a displacement detection circuit.

Furthermore, although the above explanation assumes that the number of divisions set on the division setting device is "1," if the number of divisions set is "n" depending on the measurement mode, the accuracy and resolution will be improved because the execution will be performed by n double integration operations. Delete V without changing it! Operation with reduced power consumption becomes possible. This is because the output voltage E0 of the integrator 10 can be limited to approximately Eo/n.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

An embodiment of the present invention is shown in FIGS. 1 and 4, and the variable capacitor Cx and fixed capacitor C,l are constructed as shown in FIG. That is, the outer cylinder 4 having the variable other electrode 1 and the fixed other electrode 2, the spindle 6 having the cylindrical part 5 that is displaced in the axial direction with displacement, and the common electrode 3 are arranged concentrically in this order. There is. The variable capacitor CX and the other variable electrode l of the outer cylinder 4 are ilITM,
The fixed capacitor CR is formed by the space between the poles 3, and the fixed capacitor CR is also formed by the 1ffl electrode 3 and the fixed other electrode 2 of the outer cylinder 4. Therefore, if the spindle is moved in the x1 direction in the figure along with the displacement, the length of the common electrode 3 surrounded by the cylindrical part 5 of the spindle 6 will be different, and as a result, the capacitance of the variable capacitor Cx will be the amount of movement of the spindle. , that is, it is configured to change in proportion to the displacement.

Next, the entire capacitive displacement detection device including the variable capacitor CX and fixed capacitor CR will be explained with reference to FIG.

First, the operational amplifier 18 and the integrating capacitor 19 form an integrator IO. 11 is a comparison circuit, and the output voltage E0 of the integrator is the reference voltage V□.

This is to obtain the cross point signal E by comparing it with the ground potential (in this embodiment, ie, zero). Reference numeral 15 denotes an effective measurement time detection circuit, and the flip-flop circuit 20 is formed from a D-flip-flop 20 and an AND circuit 21. The CK terminal of the flip-flop circuit 20 is connected to the output voltage E of the comparison circuit II, and the R terminal is connected to the reference time. A setting signal φB is connected. In addition, the power supply voltage VD is applied to the D terminal.
D is connected. The terminal d is at H level during the integration operation, and the cross point signal E is generated due to the negative integration time operation.
When c is input to the cxb2 child, it is inverted from H level to L level. The AND circuit 21 is connected to the output of the terminal Q of the D-flip-flop circuit 20 and the effective area time setting signal φC.
is entered.

When both of these are at H level, the output voltage becomes H level, which is the effective measurement time T.

The displacement detection circuit 16 is formed of a gate 22, a counter 23, an AND circuit 24, and an oscillation 1T426.
4, a measurement time setting signal φA and a high frequency pulse signal from an oscillator 26 are inputted via an inverter 25.

Here, a pulse signal is input to the counter 23 only during the effective measurement time TX at the gate 22, and the count value counted by the counter 23 is the displacement amount obtained by time-division of the effective measurement time T8.

Therefore, in this capacitive displacement detection device, the resolution can be determined by the effective measurement time TX and the pulse frequency from the oscillator 26. In addition, digital display 1'7
is means for digitally displaying the amount of displacement based on the count value of the counter 23.

Switches SWI to SW6 are used to switch between the variable capacitor C,1 and the fixed capacitor C11 and connect them to the integrator 10. The switch SW7 discharges the integrating capacitor 19 of the integrator. Here, the switch SW1 and the switch sw4 are positive integration switches and are used to connect the variable capacitor CX to the integrator 10.

In addition, switches SWI, SW2 and switches SW5.
SW6 is a negative integration switch.

By the way, in order to achieve high resolution and miniaturization in this displacement detection device, the positive integral operation is performed using a variable capacitor C.
The integrator 10 collects the charge of the variable capacitor charged by the charging process using the power supply voltage VDD of M and the charge of the variable capacitor charged by this charging process.
The structure is configured so that the transfer step of transferring the charge to the integrating capacitor 19 is sequentially repeated, and a switch is applied to this charging step.
Switch SWl and switch SW3 are closed, and switch SW2 and switch SW4 are closed in the transfer process. Similarly, in the negative integral operation, there is a discharging step in which the charge of the integral capacitor 19 charged in the positive integral operation is reduced by the charge of the opposite polarity charged in the fixed capacitor CR with the power supply voltage VDD, and the fixed capacitor C7 is grounded. In order to perform the grounding process repeatedly, the switches SWI and SW6 are closed during the discharging process, and the switches SW2 and SW5 are closed during the grounding process. Note that during positive integration operation, the switch SW6 is opened and the integrator 10
The fixed capacitor CR is not connected to the terminal. Similarly, in a negative integration operation, switch SW4 is opened so that variable capacitor C8 is not connected to integrator 10.

Reference numeral 12 denotes a sequence circuit which controls switches SWI to SW7 to perform positive integration and negative integration by switching them in a predetermined sequence.

Further, it is formed to output a setting signal φA for the measurement time TH, a setting signal φC for the effective area time TA, and a setting signal φB for the reference time T at appropriate times. 13 is a clock pulse generator, which is a signal φl for controlling switches SWI to SW6, which are analog switches.
A reference clock pulse for generating φ6 from φ6 is supplied to the sequence circuit 12. Reference numeral 14 denotes a reference time setting device, in order to secure the effective measurement time Tx necessary to obtain a predetermined resolution, the time can be set arbitrarily based on the variable capacitor Cx, the fixed capacitor C11, and the moving speed of the spindle 6 of the displacement detecting device. It is up to you to decide.

Further, a division setting device 30 is connected to the sequence circuit 12. The division setting device 30 sets the number of divisions for dividing the reference time T set by the reference time setting device 14 and the effective area time TA determined by the setting into n sections, and is 1/K (K= 1.2.・・・・・・
・Output n). The purpose of this is to suppress the output voltage E0 of the integrator IO due to the positive integration operation performed during the reference time T, and as a result, reduce the power consumption of the device.

Therefore, the effective measurement time T for determining the amount of displacement in the above case
X is the sum of each section effective measurement time T, / (ΣTX /K
) is required.

The digital display 17 is for displaying the output of the counter 23 by the displacement detection circuit 16 on the digital display to ensure readability.

Next, the operation of this embodiment will be explained first with reference to FIG.

The spindle 6, which is now moving in the X1 direction in FIG. It is assumed that In this embodiment, the sequence circuit 12° has a measurement time TH, , a reset time of the integrator IO, and a reference time T.
The effective area time Ta is automatically determined. Here, the measurement time Ts is determined when the measurement time setting signal φA is at the L level, and the integrator 10 is reset when the measurement time setting signal φA is at the (■) level. Also, when the reference time setting signal φB is at the H level A reference time T is defined and an effective area time setting signal φ
C also specifies the effective area time T when it is at H level. Switch SW that is considered an analog switch
The optical power source of this displacement detection device is used for the closing command signal φ1 for closing I (hereinafter simply referred to as signal φl. The same applies to other closing command signals) and the signal φ2 delayed by half a cycle. It is always generated at a constant cycle while it is on. Also, within the reference time T, the signal φ3 is synchronized with the signal φ1, and the signal φ4 is synchronized with the signal φ2.
occurs in sync with. Note that in the initial state, even if the integrator 10 is in the reset time, the signals φ1 and φ
Since the variable capacitors C and 3 may become H level at the same time, it is assumed that the variable capacitors C and l are charged by the power supply voltage VDD, and the output voltage of the Q terminal of the flip-flop 20 is set to the L level.

The positive integration process will be explained under such conditions.

Measurement time setting signal φA becomes L level and reference time setting signal φB becomes H level. When signals φ2 and φ4 are generated, variable capacitor CX is connected to integrator 10 via switch SW2 and switch SW4. Therefore, a negative current flows into the integrator 10 from the variable capacitor CX side based on the charge stored in the variable capacitor C8.

On the other hand, from the integrating capacitor 19 side, the operational amplifier 18
A positive current flows into the input side of. Therefore op amp 18
The output voltage E0 of increases. That is, variable capacitor C
This means that the charge charged at × has been transferred to the integrating capacitor 19. Subsequently, the switch SW2 and the switch SW4 are opened by the signal φ2 and the signal φ4 according to a command from the sequence circuit I2. Then switch SW1
and when switch SW3 is closed, variable capacitor CX
A power supply voltage VDD is applied to the variable capacitor CX, and the variable capacitor CX is charged. After charging of variable capacitors c and l is completed,
Switch SWI again after a half cycle delay.

When SW3 is opened and switches SW2 and SW4 are closed, the charge in the variable capacitor C is transferred to the integrating capacitor 19 in the same manner as described above, and the output voltage E0 of the integrator 10 further increases. In this way, switch SW1. SW3
Charging process and switch SW2. The transition process by SW4 is repeated and the output voltage E of the integrator 10 is maintained during the reference time T. increases as shown by the solid line in the figure. Note that during this reference time T, the eight fixed capacitors are not connected to the operational amplifier 18 of the integrator 10, so the signal φ6 is not output and the switch SW6 is not closed.

Considering the capacitance of the variable capacitor C8, the power supply voltage, etc., which are limited in order to miniaturize the displacement detection device, the integral 110 is actually calculated in a stepwise manner as shown by the two-dot chain line in FIG. The output voltage E0 is formed to increase in slope.

Next, the negative integration process will be explained.

When the reference time T ends, the reference time setting signal φB goes to L level, and the effective area time setting signal φC goes to H level. Therefore, when the reference time setting signal φB becomes L level, the Q terminal voltage of the flip-flop 20 is set to ■ level, and the effective measurement time Tl+ starts to advance on the condition that the effective area time setting signal φC becomes H level. . That is, the AND circuit 21 of the effective measurement time detection circuit 15 outputs an H level signal Ex.

Now, within the dynamic region time TA, the signal φ4 goes to L level, and the variable capacitor CX is no longer connected to the operational amplifier 18 of the integrator IO because the switch SW4 is opened. On the other hand, the switch SW2. which is closed based on the signals φ2 and φ5 within the reference time Ts. SW5
Since the fixed capacitor C7 was grounded, the fixed capacitor C is connected to the operational amplifier 18 of the integrator lO via the switches SWI and SW6, which are closed based on the signals φ1 and φ6 from the sequence circuit 12. . In this case, since the fixed capacitor C is connected to the power supply voltage VDD, a positive current flows into the operational amplifier 18 from the power supply voltage VDD, whereas a negative current flows from the integrating capacitor 19 side, that is, the output side of the operational amplifier 18. flows into the input side of the operational amplifier 18 so that it can be canceled out.

Therefore, the electric charge of the integration capacitor 19 charged in the positive integration process gradually decreases, and the output voltage E of the integrator 10 drops. Then switch SW2 again. Since SW5 and the switches SWI and SW6 are alternately opened and closed with a half-cycle delay, the output voltage E of the integrator 10 changes in a stepwise manner as shown by the two-dot chain line within the effective region time in FIG. As a result, the output voltage E decreases at a constant slope as shown by the solid line.

is considered to be decreasing. In this way, in the negative integration process, the output voltage E0 of the integrator 10 becomes the reference voltage V,
f and is compared in the comparator circuit 11, and when the two are equal, the comparator circuit 11 outputs a cross point signal E. That is, since the reference voltage ■□ is set to zero value, when the output voltage E0 of the integrator 10 becomes zero value, the cross point signal E becomes H level and is output. Then, C of the flip-flop 20 of the effective measurement time detection circuit 15
Since the cross point signal Ec is input to the K terminal, the output voltage of the Q terminal becomes L level, and as a result, the end point of the effective measurement time T is regulated.

By the way, in the displacement detection circuit 16, the effective area time setting signal φC is output from the AND circuit 21 of the effective measurement time detection circuit 15 to one terminal of the gate 22 on the condition that the effective measurement time T is outputted at H level. Since the clock pulse from the oscillator 26 and the gate circuit 24 through the inverter 14 are input to the other terminal, the effective measurement time T, Gate 2 only between.

2, the clock pulse from the oscillator 26 is sent to the counter 2.
3, and the counter 23 counts this as a displacement amount.

In this way, the integrator 10 is used in common and is controlled by a signal based on a predetermined procedure based on the sequence circuit 12, and the positive integration process is performed by connecting the variable capacitor CX, and the negative integration process is performed by connecting the fixed capacitor C. , since the output voltage E6 of the integrator 10 starts from zero value and is completed at zero value, the ratio of the reference time T for the positive integration step and the effective measurement time TX is determined by the variable capacitor Cx and the fixed capacitor CR. is equal to the ratio of

Here, since the capacitance of the variable capacitor CM is controlled by the cylindrical part 5 provided at one end of the spindle 6 and is proportional to the displacement involved via the probe 7, the clock of the oscillator 26 counted by the counter 23 is The number of pulses is the amount of displacement.

Therefore, for example, variable capacitor CM and fixed capacitor C,
If l is equal, the reference time T and the effective measurement time T are equal, so if this is designated as the reference state, the increase in the count value on the counter 23 around this will be the displacement of the spindle 6 with respect to the reference position. It is determined as a quantity.

A digital display 17 is connected to the counter 23, and the amount of displacement can be read as a digital amount on the digital display 17.

Next, characteristic technical matters of the present invention will be explained with reference to FIG. That is, if the number of divisions set by the division setting device 30 shown in FIG. The maximum value is reached at . Therefore, the power consumption of the integrator IO and the entire device is reduced by limiting this maximum value to a low value.

Therefore, if the reference time T is set to be relatively long depending on the measurement mode that takes into consideration the speed of the spindle 6, the pulse frequency of the oscillator 26, etc., the double integral operation is
By repeating this process several times, the output voltage E of the integrator 10 is kept at approximately E,/n. Here, in FIG. 3, the number of divisions set by the division setting device 30 is 3, and the number of divisions set by the division setting device 30 is 1 in the figure.
/ means l/3. However, to simplify the explanation, as soon as the cross point signal Ec is output during negative integration operation,
The diagram shows the next positive integral operation. Therefore, the sequence circuit 12 calculates the 2 m integral by 3 m during the measurement time T.
It acts so that it repeats several times. As a result, each positive integral operation time becomes 1/3 of the set reference time Ts, and the effective measurement time T is calculated as CTxt''Txz+Tx3).In addition, even in this case, the effective measurement time detection Since the circuit 15 and the displacement detection circuit 16 operate in the same manner as in the case where =1, the measurement work time and resolution remain unchanged.

That is, the division setter 30 divides the reference time T into ~n divisional reference times Ts/K, double integrates the divided reference time T, and calculates the output voltage E.
It keeps 0 low.

According to this embodiment, it is possible to form an extremely compact device without the conventional processing problem of arranging a plurality of small element electrodes at a constant pitch. Further, since the amount of displacement can be evaluated as a length of time, a desired resolution can be easily obtained using the frequency of the clock pulse to be time-divided. In addition, since the amount of displacement can be determined as the ratio of the variable capacitor CXO to the fixed capacitor CR, that is, the ratio of the reference time T to the effective measurement time Tx, rapid measurement is possible by increasing the frequency of the time division clock pulse. becomes. Furthermore, by the division setting device 30,
The reference time T is divided into n parts and the integrator output voltage E is expressed as Eo/
Since it can be made n, the output voltage of the integrator can be suppressed to a low level, the number of consumption-type saws can be reduced, and as a result, the battery capacity can be reduced.

The benefit is that small measuring instruments with built-in power supplies that can be operated with one hand can be operated for long periods of time without changing batteries.

In the above embodiment, the positive integral process and the negative integral process were repeated step by step, but if the measured displacement amount is a small stroke, they are not repeated and are performed in one positive integral process. It is possible to achieve the same objective with a single negative integral operation. Further, although the variable capacitor and the fixed capacitor are configured with electrodes arranged on the center circle, the present invention is not limited thereto, and can be configured with flat electrodes. Furthermore, the oscillator connected to the counter of the displacement detection circuit can also be configured to automatically adjust the clock pulse frequency to an appropriate frequency in order to obtain the displacement amount with a predetermined resolution based on the reference time or effective area time. It is possible.

In addition, the measured value is displayed on the display using the count value of the counter of the displacement detection circuit, but if ≠ 1 in the division setting device, the measurement time setting signal φ4 (to the display 17 in Fig. 1) If the display is updated on the condition that φ, ) shown by the two-dot chain line is at H level, the update time can be kept constant regardless of the set number of divisions.

Furthermore, although displacement is assumed to be involved in a straight line via the spindle, the object to be measured is not limited to length, thickness, etc., but can also be applied to pressure, weight, etc. when it is involved as a rotation angle.

[Brief explanation of drawings]

FIG. 1 is an overall explanatory diagram showing one embodiment of a capacitive displacement detection device according to the present invention, FIG. 2 is an operational explanatory diagram, and FIG.
The figure is an explanatory diagram of the operation when the number of divisions is 3, FIG. 4 is a cross-sectional view for configuring a variable capacitor and a fixed capacitor, and FIG. 5 shows a conventional capacitive displacement detection device. Figure (A) is a partial cross-sectional view of a movable electrode and a fixed electrode.
FIG. 5(B) is a diagram showing the output waveform. C8...variable capacitor, CR...fixed capacitor, 10...integrator, 11...comparison circuit, 12...
Sequence circuit, 14...Reference time setting device, 15...
・Effective measurement time detection circuit, 16...Displacement detection circuit, 1
7... Digital display, 18... Operational amplifier, 19
... Integrating capacitor, 23... Counter, 26...
・Oscillator, 30...Division setting device.

Claims (4)

[Claims] (1) A variable capacitor whose capacitance changes in accordance with displacement, a fixed capacitor whose capacitance is constant, an integrator to which the variable capacitor and the fixed capacitor are switchably connected, and a predetermined a sequence circuit for selectively connecting the variable capacitor to the integrator before the elapse of a reference time and the fixed capacitor to the integrator after the elapse of the reference time, and performing a double integration operation according to a predetermined procedure;
a comparison circuit for comparing the output voltage of the integrator and a reference voltage to find a cross point where both voltages become equal;
an effective measurement time detection circuit that calculates an effective measurement time from the end of the reference time to the arrival of the crosspoint using the crosspoint signal of the comparison circuit; and an effective measurement time detection circuit connected to the effective measurement time detection circuit for effective measurement with respect to the reference time. a displacement detection circuit for detecting a displacement equivalent to the capacitance of the variable capacitor based on a time ratio; a division setting device for dividing the reference time into n divided reference times; The integrator is formed so that the double integration operation can be repeated n times based on the number of divisions set by the division setting device, and the division effective measurement time for each division reference time is determined via the comparison circuit and the effective measurement time detection circuit. . A capacitive displacement detection device, characterized in that the displacement detection circuit is configured to detect displacement by using the sum of effective measurement times of each section as the effective measurement time. (2) In claim 1, the sequence circuit includes a positive integration operation performed by connecting the variable capacitor to the integrator, and a charging step in which the variable capacitor is supplied with a power supply voltage. The transfer step of transferring the charge of the variable capacitor charged by the above to the integrating capacitor of the integrator is sequentially repeated, and after the reference time has elapsed, the fixed capacitor is connected to the integrator to perform a negative integration operation. , a discharging step of reducing the charge of the integral capacitor charged by the positive integral operation by a charge of opposite polarity charged in the fixed capacitor with a power supply voltage, and a grounding step of grounding the fixed capacitor are sequentially repeated. A capacitive displacement detection device characterized by the following configuration. (3) In claim 1, the comparison circuit is formed to generate a clock point signal when the reference voltage becomes zero voltage and the output voltage of the integrator becomes zero value. Capacitive displacement detection device. (4) In claim 1, the variable capacitor and the fixed capacitor both have a common electrode provided on the outer peripheral surface of a round shaft-shaped member as one electrode, and each other electrode is the same as the common electrode. A capacitive displacement detection device characterized by being centrally arranged and formed.