JPS62206840A - Production unit for semiconductor device - Google Patents

Production unit for semiconductor device

Info

Publication number
JPS62206840A
JPS62206840A JP4926486A JP4926486A JPS62206840A JP S62206840 A JPS62206840 A JP S62206840A JP 4926486 A JP4926486 A JP 4926486A JP 4926486 A JP4926486 A JP 4926486A JP S62206840 A JPS62206840 A JP S62206840A
Authority
JP
Japan
Prior art keywords
lead frame
solder
rail
contact
chips
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4926486A
Other languages
Japanese (ja)
Inventor
Yoshiro Inoue
井上 義朗
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP4926486A priority Critical patent/JPS62206840A/en
Publication of JPS62206840A publication Critical patent/JPS62206840A/en
Pending legal-status Critical Current

Links

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent the peeling of solder plating on a lead frame, and to obviate the deterioration in quality due to the adhesion of solder chip onto a semifinished product by guiding the lead frame, on which a semiconductor device is loaded, by a line contact. CONSTITUTION:A groove 2b avoiding a contact with a semiconductor element 1 on a lead frame 4 is formed in the longitudinal direction of a carrying rail 2, the cross sections of both side walls of the groove are formed to a ridging shape forming a smooth curved surface, and both side edges of the lead frame 4 are supported by the top sections of the ridging-shaped support surfaces 2a. Accordingly, since the carrying rail 2 is brought into line-contact with the lead frame 4 and frictional resistance due to a surface contact is reduced, the generation of solder chips due to the peeling of solder plating is minimized, and solder chips fall from the ridging-shaped projecting edges in the rail 2 even when chips are generated, thus preventing the clogging of solder chips into the rail 2 and adhesion and the like to semifinished products.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の製造装置に関するものである。[Detailed description of the invention] [Industrial application field] The present invention relates to a semiconductor device manufacturing apparatus.

〔従来の技術〕[Conventional technology]

従来、この種の半導体装置の製造装置には、第3図に示
す、ように半導体素子1が搭載されたリードフレーム4
の両側縁を搬送レール2により支え、リードフレーム4
を搬送レール2上に滑走させて搬送するものがある。3
はリードフレーis 4のン%き上がりを防止するレー
ルガイドである。従来、搬送レール2の支持面2aは平
坦であり、リードフレーム4に面接触させていた。
Conventionally, this type of semiconductor device manufacturing equipment includes a lead frame 4 on which a semiconductor element 1 is mounted, as shown in FIG.
Both sides of the lead frame 4 are supported by conveyor rails 2.
There is one that transports by sliding it on the transport rail 2. 3
is a rail guide that prevents the lead frame IS4 from rising. Conventionally, the support surface 2a of the transport rail 2 has been flat and brought into surface contact with the lead frame 4.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

ところで、半製品の半導体素子を搭載しているリードフ
レーム4にはハンダメッキが施されている。
By the way, the lead frame 4 on which the semi-finished semiconductor element is mounted is solder plated.

しかしながら、従来のようにリードフレーム4は搬送レ
ール2に面接触しているから、リード、フレーム4の滑
走時の摩擦力が大きいため、リードフレー1z4のハン
ダメッキが剥がれ、これが半製品の半導体素子に付着し
5次工程でハンダくずが付着したまま半導体素子が樹脂
月止されてしまい、品質を低下させる慮れがあった、ま
たハンダくずが搬送レールに付着し、円滑な搬送の妨げ
になるという問題があった。
However, since the lead frame 4 is in surface contact with the conveyor rail 2 as in the conventional case, the frictional force when the leads and the frame 4 slide is large, and the solder plating on the lead frame 1z4 peels off, causing the semi-finished semiconductor element to peel off. In the 5th step, the semiconductor elements were held in place with the solder chips still attached to the resin, which could lead to a decrease in quality.In addition, the solder chips adhered to the conveyor rails, impeding smooth transportation. There was a problem.

本発明の[1的はリードフレーt1と搬送レールとの摩
擦力を減少させることにより、リードフレームからのハ
ンダの剥がれを防止する半導体装置の製造装置である。
One object of the present invention is a semiconductor device manufacturing apparatus that prevents peeling of solder from a lead frame by reducing the frictional force between the lead frame t1 and the transport rail.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は半導体素子が搭載されたリードフレームの両側
縁を搬送レールにより支え、リードフレームを搬送レー
ル上に滑走させて搬送する半導体装置の製造装置におい
て、搬送レールの支持面を中高状に形成し、該搬送レー
ルの中高状支持面でリードフレームの両側縁を支えたこ
とを特徴とする半導体装置の製造装置である。
The present invention relates to a semiconductor device manufacturing apparatus in which both edges of a lead frame on which a semiconductor element is mounted are supported by transport rails, and the lead frame is transported by sliding on the transport rails. , is a semiconductor device manufacturing apparatus characterized in that both side edges of a lead frame are supported by a medium-height support surface of the transport rail.

〔実施例〕〔Example〕

以下、本発明の一実施例を図により説明する。 Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

第1図、第2Ij!iにおいて、搬送レール2の長さ方
向にリードフレーム4」−の半導体索子1との接触を避
ける溝zbを設け、1梓2bの両側壁の断面を滑らかな
曲面をなす中高状に形状し、該中高状支持面2a、2a
の頂部にリードフレーム4の両側縁を支える。3はリー
ドフレーム4の浮き上がりを防止するレールガイドであ
る。
Figure 1, 2Ij! At i, a groove zb is provided in the length direction of the conveyor rail 2 to avoid contact with the semiconductor cord 1 of the lead frame 4'', and the cross section of both side walls of the rail 2b is shaped into a medium-height shape with a smooth curved surface. , the medium-high support surfaces 2a, 2a
Both side edges of the lead frame 4 are supported on the top of the lead frame 4. 3 is a rail guide that prevents the lead frame 4 from floating up.

したがっ;、本発明によれば、搬送レール2の中、(″
6状支持而2a、2aによりリードフレーム4の両側縁
を支えるため、!JQ送レール2はリードフレーム4に
対して線接触することとなり、面接触による摩擦抵抗が
小さく、したがってハンダメッキ剥がれによるハンダく
ずの発生が少なくなり、たとえ、くずが発生してもレー
ルの中高状曲縁より落下するため、搬送レール内部への
ハンダくず詰り。
Therefore, according to the present invention, in the conveyor rail 2, (''
In order to support both side edges of the lead frame 4 by the hexagonal supports 2a, 2a,! The JQ feed rail 2 is in line contact with the lead frame 4, and the frictional resistance due to surface contact is small, so the generation of solder chips due to peeling of solder plating is reduced, and even if scraps are generated, the mid-height shape of the rail As solder crumbs fall from the curved edge, the inside of the conveyor rail becomes clogged.

又半製品への付着等の問題はなくなる。Also, problems such as adhesion to semi-finished products are eliminated.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は半導体装置が搭載されたリ
ードフレームを線接触にてガイドするようにしたので、
リードフレームのハンダメッキ剥がれを防止し、半製品
へのハンダくず付着による品質低下の問題を解消でき、
かつm送し−ル内部へのハンダくず詰りによる搬送1〜
ラブル発生を防止できるという効果がある。
As explained above, in the present invention, the lead frame on which the semiconductor device is mounted is guided by line contact.
It prevents peeling of solder plating on lead frames and eliminates the problem of quality deterioration due to solder debris adhering to semi-finished products.
And transport due to solder waste clogging inside the m feeder 1~
This has the effect of preventing trouble from occurring.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す断面図、第2図は同斜
視図、第3図は従来例を示す断面図である。
FIG. 1 is a sectional view showing one embodiment of the present invention, FIG. 2 is a perspective view thereof, and FIG. 3 is a sectional view showing a conventional example.

Claims (1)

【特許請求の範囲】[Claims] (1)半導体素子が搭載されたリードフレームの両側縁
を搬送レールにより支え、リードフレームを搬送レール
上に滑走させて搬送する半導体装置の製造装置において
、搬送レールの支持面を中高状に形成し、該搬送レール
の中高状支持面でリードフレームの両側縁を支えたこと
を特徴とする半導体装置の製造装置。
(1) In semiconductor device manufacturing equipment in which both edges of a lead frame on which a semiconductor element is mounted are supported by transport rails, and the lead frame is transported by sliding on the transport rails, the supporting surface of the transport rail is formed in a mid-height shape. A semiconductor device manufacturing apparatus, characterized in that both edges of a lead frame are supported by a medium-height support surface of the transport rail.
JP4926486A 1986-03-06 1986-03-06 Production unit for semiconductor device Pending JPS62206840A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4926486A JPS62206840A (en) 1986-03-06 1986-03-06 Production unit for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4926486A JPS62206840A (en) 1986-03-06 1986-03-06 Production unit for semiconductor device

Publications (1)

Publication Number Publication Date
JPS62206840A true JPS62206840A (en) 1987-09-11

Family

ID=12825967

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4926486A Pending JPS62206840A (en) 1986-03-06 1986-03-06 Production unit for semiconductor device

Country Status (1)

Country Link
JP (1) JPS62206840A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6367791B1 (en) * 2000-07-07 2002-04-09 Stratasys, Inc. Substrate mounting system for a three-dimensional modeling machine
KR100383514B1 (en) * 2001-05-15 2003-05-12 한미반도체 주식회사 Device For Transfering Small Semiconductor Package
US7127309B2 (en) 2004-02-10 2006-10-24 Stratasys, Inc. Modeling apparatus with tray substrate

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6367791B1 (en) * 2000-07-07 2002-04-09 Stratasys, Inc. Substrate mounting system for a three-dimensional modeling machine
KR100383514B1 (en) * 2001-05-15 2003-05-12 한미반도체 주식회사 Device For Transfering Small Semiconductor Package
US7127309B2 (en) 2004-02-10 2006-10-24 Stratasys, Inc. Modeling apparatus with tray substrate

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