JPS62201946U - - Google Patents
Info
- Publication number
- JPS62201946U JPS62201946U JP9005886U JP9005886U JPS62201946U JP S62201946 U JPS62201946 U JP S62201946U JP 9005886 U JP9005886 U JP 9005886U JP 9005886 U JP9005886 U JP 9005886U JP S62201946 U JPS62201946 U JP S62201946U
- Authority
- JP
- Japan
- Prior art keywords
- external electrode
- electrode leads
- tips
- interval
- straight line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第１図ａ〜ｃはそれぞれ本考案の一実施例の正
面図、側面図および外部電極リードの配置図、第
２図ａ〜ｃは従来の半導体集積回路の一例の正面
図、側面図および外部電極リードの配置図である
。
１…プリント配線基板、２…電気素子、３，３
ａ，〜３ｎ，１３ａ〜１３２ｎ…外部電極リード
。
1A to 1C are a front view, a side view, and an arrangement diagram of external electrode leads, respectively, of an embodiment of the present invention, and FIGS. 2A to 2C are a front view, a side view, and an external view of an example of a conventional semiconductor integrated circuit. FIG. 3 is a layout diagram of electrode leads. 1...Printed wiring board, 2...Electric element, 3,3
a, ~3n, 13a~ 132n ...External electrode lead.
Claims (1)
電極リードが規定のリード間隔の１／２の間隔で
直線状に取り付けられ、該外部電極リードの先端
は取り付け方向に平行し所定間隔に離間した２直
線上で、かつ取付位置の隣接する外部電極リード
の先端とは互いに異なる直線上に位置するよう変
形され、同一直線上に位置する隣接外部電極リー
ドの先端の間隔は規定のリード間隔であることを
特徴とする半導体集積回路装置。 External electrode leads of a printed wiring board on which semiconductor elements are mounted are attached in a straight line at intervals of 1/2 of the specified lead spacing, and the tips of the external electrode leads are parallel to the attachment direction and on two straight lines spaced apart at a predetermined interval. and is deformed so that the tips of the adjacent external electrode leads at the mounting position are located on different straight lines, and the interval between the tips of the adjacent external electrode leads located on the same straight line is a prescribed lead interval. Semiconductor integrated circuit device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9005886U JPS62201946U (en) | 1986-06-12 | 1986-06-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9005886U JPS62201946U (en) | 1986-06-12 | 1986-06-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62201946U true JPS62201946U (en) | 1987-12-23 |
Family
ID=30949590
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9005886U Pending JPS62201946U (en) | 1986-06-12 | 1986-06-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62201946U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5019404U (en) * | 1973-06-15 | 1975-03-05 |
-
1986
- 1986-06-12 JP JP9005886U patent/JPS62201946U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5019404U (en) * | 1973-06-15 | 1975-03-05 |