JPS6220038A - Testing system for digital processor - Google Patents

Abstract

PURPOSE:To test hardware as a test object precisely at a high speed by testing it with a testing microprogram corresponding to the test mode for every hardware function classification set by a mode setting means. CONSTITUTION:In case of the test of a hardware function unit (A2) 60 which cannot be accessed neither controlled directly by normal microprogram processing, the testing microprogram for the hardware function unit (A2) 60 is loaded onto a control storage device (CS) 10 and a flag element 70 is set to '1' before the start of the test. When the flag is set to '1', each microinstruction of the testing microprogram read out to a CS read register 20 from the CS 10 is supplied to a decoder 40, and the hardware function unit (A2) 60 is tested by the control signal outputted from the decoder.

Description

[Detailed Description of the Invention] [Summary] Hardware parts in a microprogram-controlled digital processing device that cannot be accessed directly by normal microprogram processing can be directly accessed and controlled. The present invention relates to a test method for digital processing equipment, and more specifically, to perform a high-speed and precise test on the required hardware by checking the hardware part [Industrial Application Field] The present invention relates to a test method for a digital processing device that realizes i31 transmission of a test function to a hardware function unit that has not been fully covered by the test function.

Digital processing devices such as electronic computers are composed of various hardware functional units, which have recently been integrated into integrated circuits. Tests on each of these hardware parts are performed at any time such as factory shipment, maintenance work, etc.

It is desirable that such tests can be performed on all hardware functional units. This is because it prevents the roughness of the test that occurs when multiple hardware functional units are tested at once, and depending on the part that is causing the failure, it opens the way to effective use of the chip etc. by using alternative functions. This is because it also provides a means for obtaining

[Conventional technology]

Even in the past, if there were any problems with electronic computers,
Or, means have been developed to test where the failure has occurred. This is similar to testing hardware by loading a test program into a control storage device and executing the test program instead of a microprogram that controls the normal operation of a computer or the like.

[Problem that the invention seeks to solve]

According to this conventional method, the test target of the test microprogram is a hardware element that can be directly accessed and controlled by a normal microprogram, and only such hardware elements are tested, and only those hardware elements that can be directly accessed and controlled are tested. The drawback is that nothing other than basic hardware elements are tested.

The present invention was created in view of the above-mentioned problems, and is a testing method for digital processing devices that enables testing by exposing hardware functional units that could not be tested using conventional methods. The purpose is to provide

[Means for solving problems]

FIG. 1 shows a block diagram of the principle of the present invention. The present invention is a digital processing device having a hardware functional unit 1 that can be directly accessed and controlled during normal microprogram processing and a hardware functional unit 2 that cannot be directly accessed, and its main parts are configured as follows.

In FIG. 1, numeral 3 denotes a mode setting means for setting a test mode for each type of hardware functional unit in the digital processing device, and 4 denotes a test microprogram supply means. 5 is an operation required for the hardware functional unit 2 that cannot be accessed directly in response to the test mode set for the hardware functional unit 2 and the corresponding test microprogram from the test microprogram supply means; It is a control means that causes The output content from the hardware functional unit 2 is subjected to any desired checks on that functional unit 2.

[Effect]

If the mode setting means 3 is set to the normal test mode, the hardware functional unit 1 is tested by the corresponding test microprogram (test microprogram from the test microprogram supply means 4).

Further, if the mode setting means 3 is set to the test mode for the hardware functional unit 2, a corresponding test microprogram is output from the test microprogram supply means 4, and the microprogram is used to set the hardware functional unit 2 to the test mode. The test will be conducted.

This allows the hardware to be tested to be tested quickly and precisely, thereby improving test performance.

〔Example〕

FIG. 2 shows an embodiment of the invention. In this figure, 1
0 is a control memory bag ff (C3) of an electronic computer that operates under microprogram control, and 20 is a C8 read register. 30 and 40 are C8 read registers 20
These are decoders DI and D2 that decode the micro-instructions. 5o is a hardware functional unit (A1) whose access can be controlled by the output signal of the decoder 30, and this hardware functional unit is a hardware portion whose access is directly controlled by a normal test microprogram. Reference numeral 60 denotes a hardware functional unit (A2) whose access can be controlled by the output signal of the decoder 40, and this hardware functional unit can be accessed directly by a test microprogram created for testing the hardware functional unit. This is the hardware part that is used. Reference numeral 70 denotes a flag element that can set a test mode, and when this is set to "0", the corresponding test microprogram of C31O is sent to the decoder 30 and a test of the hardware functional unit 50 is generated. , "1" is set, the corresponding test microprogram of C31O is sent to the decoder 40 to cause a test of the hardware functional unit 60.

The test mode in the apparatus configured in this way will be explained below.

First, when it is desired to test the hardware functional unit (A1), the corresponding normal test microprogram is loaded into C5IO, and the flag element 7 is loaded.
"0" is set to 0.

Since this flag is “0”, C3lO
Each microinstruction of the test microprogram read out to the C8 read register 20 is supplied to the decoder 30, and the hardware functional unit (AI) 50 is tested by the control signal output from the decoder 30.

As described above, the test on the hardware functional unit (At) 50 whose access can be controlled by normal microprogram processing is performed in the same manner as in the conventional method, as described above. No tests can be performed on the hardware functional unit (A2) 60 that cannot be accessed directly.

According to the invention, this hardware functional unit (A2) 6
0 tests can be successfully performed.

That is, prior to the start of the test, the test microprogram for the hardware functional unit (A2) is
At the same time, "1" is placed in the flag element 70.

By setting the flag to "1", each microinstruction of the test microprogram read from the C3lO to the C8 read register 20 is supplied to the decoder 40, and the hardware function is controlled by the control signal output from the decoder 40. Units (A2) 60 will be tested. In this way, it is possible to test hardware parts that could not be directly controlled by conventional microprogram processing.

FIG. 3 shows such a specific example.

To explain this example in comparison with the conventional system shown in FIG. 4, IR2 in FIG. 3 corresponds to IRI in FIG. 4, and these are instruction registers. Also, B'll, B12. in FIG. B13 is Bl in FIG. 4, B2. B
3, and these are instruction prefetch registers.

X2 in FIG. 3 corresponds to Xl in FIG. 4, and this is an instruction transfer line for setting an instruction (machine language instruction) to the instruction prefetch register. Y is a line similar to X2, but instruction prefetch registers B11, B12 . This is the line that sends the required value when you want to test B13. Z is instruction prefetch register Bll, B12. This is a line for taking out the output of B13.

In FIG. 4, only the instruction register IRI can be directly controlled by microprogram control, so the instruction prefetch registers B1, B2 .
Although it is not possible to test B3, in FIG. 3 according to the present invention, by setting the flag to "O", the required value is set to registers B11, B12 . By setting the flag to "1", the required value can be read from the instruction register IRI via line Y to the instruction prefetch register Bll, B12.B12. B13 and the contents can be retrieved from these registers via line Z. This allows instruction prefetch registers Bll, B12, . B
13 can be tested.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to quickly and precisely test hardware to be tested in a digital processing device that operates under microprogram control, thereby improving test performance.

[Brief explanation of drawings]

Fig. 1 is a block diagram of the principle of the present invention, Fig. 2 is a diagram showing an embodiment of the invention, Fig. 3 is a diagram showing a specific example of the embodiment of the invention, and Fig. 4 is a diagram showing the third embodiment of the invention.
FIG. 2 is a diagram illustrating an example of a conventional method in comparison with the diagram. In FIG. 1, (1), 2 is a hardware functional unit, 3 is a mode setting means, 4 is a testing microprogram supply means, and 5 is a control means. Representative Patent Attorney Sada Igeta - °・,′・′・□Principles of Hontaku Sun and Moon Figure 1.7 Figure 1 To Unexploited Sun and Moon Part 24 I I Da 15 and 6mm Giant A Part Figure 2

Claims (1)

[Scope of Claim] In a digital processing device having a hardware functional unit (1) whose access can be directly controlled during normal microprogram processing and a hardware functional unit (2) whose access cannot be directly controlled, mode setting means (3) for setting a test mode for each functional unit type; a test microprogram supply means (4); and a test mode set for the hardware functional unit (2) and the test microprogram. control means (5) for causing the hardware functional unit (2) to perform a desired operation in response to a corresponding test microprogram from the program supply means (4);
) A test method for a digital processing device, characterized in that necessary checks are performed on the hardware functional unit using the output content (6) from (6).