JPS62198730U - - Google Patents
Info
- Publication number
- JPS62198730U JPS62198730U JP8749686U JP8749686U JPS62198730U JP S62198730 U JPS62198730 U JP S62198730U JP 8749686 U JP8749686 U JP 8749686U JP 8749686 U JP8749686 U JP 8749686U JP S62198730 U JPS62198730 U JP S62198730U
- Authority
- JP
- Japan
- Prior art keywords
- tuning
- coils
- coil
- tuning coil
- connection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 7
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
Description
第１図は本考案のテレビジヨンチユーナの入力
回路の一実施例を示す回路図、第２図は第１図例
の回路のハイバンド時の等価回路図、第３図は第
１図例の回路のローバンド時の等価回路図、第４
図及び第７図は夫々本考案のテレビジヨンチユー
ナの入力回路の他の実施例を示す回路図、第５図
は第４図例の回路のハイバンド時の等価回路図、
第６図は第４図例の回路のローバンド時の等価回
路図、第８図は従来の入力回路の一例を示す回路
図である。
１は入力端子、２は出力端子、Ｃ１１はコンデ
ンサ、Ｄ３はダイオード、Ｌ７，Ｌ８，Ｌ９、及
びＬ１０はコイルである。
Fig. 1 is a circuit diagram showing one embodiment of the input circuit of the television tuner of the present invention, Fig. 2 is an equivalent circuit diagram of the circuit shown in the example shown in Fig. 1 at high band, and Fig. 3 is the example shown in Fig. 1. Equivalent circuit diagram of the circuit in low band, 4th
7 and 7 are circuit diagrams showing other embodiments of the input circuit of the television tuner of the present invention, and FIG. 5 is an equivalent circuit diagram of the circuit of the example shown in FIG. 4 at high band,
FIG. 6 is a low-band equivalent circuit diagram of the circuit shown in FIG. 4, and FIG. 8 is a circuit diagram showing an example of a conventional input circuit. 1 is an input terminal, 2 is an output terminal, C 11 is a capacitor, D 3 is a diode, L 7 , L 8 , L 9 and L 10 are coils.
Claims (1)
同調コイルと第４の同調コイルとを直列に接続し
、 上記第１及び第２の同調コイルの接続中点と上
記第３及び第４の同調コイルの接続中点との間に
スイツチング素子を接続し、上記第２及び第３の
同調コイルの接続中点と上記第３及び第４の同調
コイルの接続中点との間に容量素子を接続し、上
記第１の同調コイルの上記第２の同調コイル接続
側とは反対側を可変容量素子を介して接地し、上
記第４の同調コイルの上記第３の同調コイル接続
側とは反対側を接地し、上記第２及び第３の同調
コイルの接続中点に受信信号を供給するようにし
たことを特徴とするテレビジヨンチユーナの入力
回路。[Claims for Utility Model Registration] A first tuning coil, a second tuning coil, a third tuning coil, and a fourth tuning coil are connected in series, and during the connection of the first and second tuning coils. a switching element is connected between the point and the connection midpoint of the third and fourth tuning coils, and the connection midpoint of the second and third tuning coils is connected to the third and fourth tuning coils. A capacitive element is connected between the middle point, a side of the first tuning coil opposite to the connecting side of the second tuning coil is grounded via a variable capacitance element, and a side of the first tuning coil opposite to the connecting side of the second tuning coil is grounded via a variable capacitance element, and 1. An input circuit for a television tuner, characterized in that the side opposite to the connection side of the second and third tuning coils is grounded, and a received signal is supplied to the connection midpoint of the second and third tuning coils.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8749686U JPH0354446Y2 (en) | 1986-06-09 | 1986-06-09 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8749686U JPH0354446Y2 (en) | 1986-06-09 | 1986-06-09 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62198730U true JPS62198730U (en) | 1987-12-17 |
| JPH0354446Y2 JPH0354446Y2 (en) | 1991-12-02 |
Family
ID=30944761
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8749686U Expired JPH0354446Y2 (en) | 1986-06-09 | 1986-06-09 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0354446Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0482422A (en) * | 1990-07-25 | 1992-03-16 | Sanyo Electric Co Ltd | Tuning circuit |
-
1986
- 1986-06-09 JP JP8749686U patent/JPH0354446Y2/ja not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0482422A (en) * | 1990-07-25 | 1992-03-16 | Sanyo Electric Co Ltd | Tuning circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0354446Y2 (en) | 1991-12-02 |
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