JPS62198140A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS62198140A JPS62198140A JP61041294A JP4129486A JPS62198140A JP S62198140 A JPS62198140 A JP S62198140A JP 61041294 A JP61041294 A JP 61041294A JP 4129486 A JP4129486 A JP 4129486A JP S62198140 A JPS62198140 A JP S62198140A
- Authority
- JP
- Japan
- Prior art keywords
- solder
- thermal conductivity
- thickness
- bonded
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 22
- 229910000679 solder Inorganic materials 0.000 claims abstract description 56
- 229910052751 metal Inorganic materials 0.000 claims abstract description 3
- 239000002184 metal Substances 0.000 claims abstract description 3
- 239000000758 substrate Substances 0.000 claims 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 7
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 abstract description 7
- 229910052750 molybdenum Inorganic materials 0.000 abstract description 7
- 239000011733 molybdenum Substances 0.000 abstract description 7
- 229910052802 copper Inorganic materials 0.000 abstract description 4
- 239000010949 copper Substances 0.000 abstract description 4
- 230000000694 effects Effects 0.000 description 4
- 230000017525 heat dissipation Effects 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 238000000034 method Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000008094 contradictory effect Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 238000010792 warming Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/492—Bases or plates or solder therefor
- H01L23/4922—Bases or plates or solder therefor having a heterogeneous or anisotropic structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は半導体装置に係り、特に半田接合部の半田厚
さの均−化及び、熱伝導度の向上に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to semiconductor devices, and particularly to equalization of solder thickness at solder joints and improvement of thermal conductivity.
ｆｉ＋第２図は従来のパワーモジュールの構造’を示す
断面図で、（１１は半導体チップで（３）のモリブデン
板に高温半田（２１により接合されている。（６）は電
極端子、（６）は電極端子（５）及びモリブデン板（３
コが半田（４）により接合される放熱用の銅ブロック、
（７）は絶縁用アルミナセラミックスであり、銅ブロッ
ク（６）が半田（４１によシ接合される。（８）は絶縁
用アルミナセラミック（７）が半田（４）により接合さ
れるベース板である。Fig. 2 is a cross-sectional view showing the structure of a conventional power module. (11 is a semiconductor chip, which is bonded to the molybdenum plate (3) by high-temperature solder (21). (6) is an electrode terminal, (6) ) is the electrode terminal (5) and the molybdenum plate (3
A copper block for heat dissipation, to which the parts are joined by solder (4);
(7) is an insulating alumina ceramic, and the copper block (6) is joined by solder (41). (8) is a base plate to which the insulating alumina ceramic (7) is joined by solder (4). be.
なお、半田＋４１は低温半田である。Note that solder +41 is low temperature solder.
半導体チップ（１）から発生した熱は主に、第２図で下
方向、即ちベース板（８）の方へ流れ、ベース板（８）
ヲ通して外部へ拡散される。第２図かられかる様にこの
構造において半田層が三個所あるが半田は熱伝導度が低
いことが知られており、効率良く熱拡散するには、半田
層は薄い程良いことになる。しかし、パワーモジュール
のアセンブリ工程及び実際の使用状況においてこれらの
各部材に熱が加わるが各部の熱膨張係数の遣いから、各
部材間には、引張力と圧縮力が繰り返し作用する。この
時、各部材間の半田層が暖和剤として働く為には、半田
層は厚い方が良い。この相反する効果を両立させるには
、半田層は適度な厚さを持ち、しかも均一であることが
望ましい。The heat generated from the semiconductor chip (1) mainly flows downward in FIG. 2, that is, toward the base plate (8).
It is spread to the outside through wo. As can be seen from FIG. 2, there are three solder layers in this structure, but it is known that solder has low thermal conductivity, and in order to efficiently diffuse heat, the thinner the solder layer is, the better. However, heat is applied to each of these members during the power module assembly process and in actual use, and tensile and compressive forces repeatedly act between each member due to the thermal expansion coefficients of each part. At this time, in order for the solder layer between each member to act as a warming agent, the thicker the solder layer, the better. In order to balance these contradictory effects, it is desirable that the solder layer has an appropriate thickness and is uniform.
しかし風害では、第３図の様に必要以上の厚みを有した
シ、不均一になったりして、適度な厚みを持ちかつ均一
な半田層を得ることは困難である。However, due to wind damage, the solder layer may become thicker than necessary or uneven as shown in FIG. 3, making it difficult to obtain a uniform solder layer with appropriate thickness.
従来の半導体装置、特にパワーモジュールは以上の様に
構成されているので、半田層厚さを均一にすることは困
難で、半田層が厚い場合には、チップから発生した熱を
拡散させにくくなり、また薄い場合にはアセンブリ工程
及び実使用状況下で発生する熱応力に対し機械的強度が
弱いという問題があった。Since conventional semiconductor devices, especially power modules, are configured as described above, it is difficult to make the solder layer thickness uniform, and if the solder layer is thick, it becomes difficult to diffuse the heat generated from the chip. In addition, when the material is thin, there is a problem that the mechanical strength is weak against thermal stress generated in the assembly process and under actual usage conditions.
この発明は上記のような問題点を解消するためになされ
たもので、均一厚さの半田層を形成することができると
ともに、半田接合部の熱伝導度が良好で、かつ機械的強
度の強い半導体装置を得ることを目的とする。This invention was made to solve the above problems, and it is possible to form a solder layer with a uniform thickness, and the solder joint has good thermal conductivity and strong mechanical strength. The purpose is to obtain a semiconductor device.
この発明に係る半導体装置は、半田による接合部に前記
半田よりも熱伝導度が大きい金鵬による網状体を挿入し
たものである。In the semiconductor device according to the present invention, a net-like body made of gold wire, which has a higher thermal conductivity than the solder, is inserted into a solder joint.
この発明における半導体装置は、その半田接合部に銅製
の金網を挿入することによシ、均一な厚さを持つ半田層
を形成することができるとともに、機械的強度、及び熱
伝導度を大きくできる。In the semiconductor device of the present invention, by inserting a copper wire mesh into the solder joint, a solder layer with a uniform thickness can be formed, and the mechanical strength and thermal conductivity can be increased. .
以下、この発明の一実施例を図について説明する。 An embodiment of the present invention will be described below with reference to the drawings.
第１図は本発明の一実施例になる半田接合部の詳細を示
すものである。パワーモジュールにおいて半田接合部は
数ケ所あるがここでは、第１図の半導体チップ＋１３と
モリブデン板（３１ヲ高温半田付けして成る半導体チッ
プ部と放熱用ブロックとの半田接合部により説明する。FIG. 1 shows details of a solder joint according to an embodiment of the present invention. There are several solder joints in a power module, but here we will explain the solder joints between the semiconductor chip 13 and the molybdenum plate (31) shown in FIG. 1, which are formed by high-temperature soldering and the heat radiation block.
１１１は半導体チップ、ｆｓｌｉｄモリブデン板で高温
半田（２）により接合されている。半導体チップ＋ｉ＋
とモリブデン板（３）よ構成る半導体チップ部と、放熱
用ブロック（６）とは、それらの間に銅製の金網（９）
を介在させ半田（４）により接合されている。Reference numeral 111 denotes a semiconductor chip and an fslid molybdenum plate, which are bonded together using high-temperature solder (2). semiconductor chip +i+
The semiconductor chip part composed of the molybdenum plate (3) and the heat dissipation block (6) are separated by a copper wire mesh (9).
They are joined by solder (4) with the intervening.
半田層は第１図の様に金網の厚さによって決定される。The solder layer is determined by the thickness of the wire mesh as shown in FIG.
従って半田層の厚さを変化させたい場合には、金網を構
成する銅芯の素線径を指定することによシ可能であり、
半田層はこの金網により厚さが均一にできる。Therefore, if you want to change the thickness of the solder layer, you can do so by specifying the wire diameter of the copper core that makes up the wire mesh.
The thickness of the solder layer can be made uniform by using this wire mesh.
さらに第１図かられかる様に、従来の半田付と比較した
場合、同じ厚さの半田層に対し、本発明の一実施例によ
れば、半田そのものを少なくすることができ、しいては
熱伝導度を向上させることができる。ここで半田よりも
熱伝導度が大きい銅製の網を介在させることによシ熱伝
導度の向上は著しい。Furthermore, as can be seen from FIG. 1, when compared with conventional soldering, for a solder layer of the same thickness, according to one embodiment of the present invention, the amount of solder itself can be reduced, and the amount of solder itself can be reduced. Thermal conductivity can be improved. Here, by interposing a copper mesh having higher thermal conductivity than solder, the thermal conductivity is significantly improved.
また上記実施例は、半導体チップ部と放熱用ブロック間
の半田接合部について説明したが、第２図における半田
接合部会てに適用しても良く、上記実施例と同様の効果
を奏する。Further, in the above embodiment, the solder joint between the semiconductor chip portion and the heat dissipation block has been described, but it may also be applied to the solder joint in FIG. 2, and the same effects as in the above embodiment can be obtained.
以上のように、この発明は、半田による接合部に、前記
半田よりも熱伝導度が大きい金属による網状体を挿入し
たことにより、熱伝導度が良好で半田接合部の機械的強
度の強い半導体装置を得ることができるという優れた効
果を何する。As described above, the present invention provides a semiconductor with good thermal conductivity and strong mechanical strength at the solder joint by inserting a mesh body made of metal having a higher thermal conductivity than the solder into the solder joint. What do you do with the excellent effect that you can get with the device?
第１図はこの発明の一実施例による半導体装置の半田接
合部を示す断面図、第３図は従来の半導体装置の理想的
な半田接合部を持つ断面図、第８図は従来の半導体装置
で、風害に起こりつる半田接合部不具合を示す断面図で
ある。
なお、図において（１１は半導体チップ、（２１は高温
半田、（３１はモリブデン板、（４）は低温半田、（６
）は放熱用ブロック、（９）は金網である。
なお、各図中の同一符号は同一または相当部分を示す。FIG. 1 is a cross-sectional view showing a solder joint of a semiconductor device according to an embodiment of the present invention, FIG. 3 is a cross-sectional view of a conventional semiconductor device showing an ideal solder joint, and FIG. 8 is a cross-sectional view of a conventional semiconductor device. FIG. 2 is a cross-sectional view showing a solder joint failure caused by wind damage. In the figure, (11 is a semiconductor chip, (21 is high-temperature solder, (31 is a molybdenum plate, (4) is low-temperature solder, (6 is
) is a heat dissipation block, and (9) is a wire mesh. Note that the same reference numerals in each figure indicate the same or corresponding parts.
Claims (1)
第２の基板とを備えたものにおいて、前記半田による接
合部に前記半田よりも熱伝導度が大きい金属による網状
体を挿入したことを特徴とする半導体装置。A device comprising a first substrate and a second substrate to which the first substrate is bonded by solder, wherein a net-like body made of a metal having higher thermal conductivity than the solder is inserted into the solder bonded part. A semiconductor device characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61041294A JPS62198140A (en) | 1986-02-26 | 1986-02-26 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61041294A JPS62198140A (en) | 1986-02-26 | 1986-02-26 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62198140A true JPS62198140A (en) | 1987-09-01 |
Family
ID=12604434
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61041294A Pending JPS62198140A (en) | 1986-02-26 | 1986-02-26 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62198140A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1997035347A1 (en) * | 1996-03-20 | 1997-09-25 | Siemens Aktiengesellschaft | Semiconductor device |
| DE102011002535A1 (en) | 2010-03-12 | 2011-09-15 | Mitsubishi Electric Corporation | Semiconductor device |
| JP2012064845A (en) * | 2010-09-17 | 2012-03-29 | Mitsubishi Electric Corp | Semiconductor device and method for manufacturing the same |
-
1986
- 1986-02-26 JP JP61041294A patent/JPS62198140A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1997035347A1 (en) * | 1996-03-20 | 1997-09-25 | Siemens Aktiengesellschaft | Semiconductor device |
| DE102011002535A1 (en) | 2010-03-12 | 2011-09-15 | Mitsubishi Electric Corporation | Semiconductor device |
| US8933568B2 (en) | 2010-03-12 | 2015-01-13 | Mitsubishi Electric Corporation | Semiconductor device |
| DE102011002535B4 (en) * | 2010-03-12 | 2016-05-12 | Mitsubishi Electric Corporation | Semiconductor device with connection part |
| JP2012064845A (en) * | 2010-09-17 | 2012-03-29 | Mitsubishi Electric Corp | Semiconductor device and method for manufacturing the same |
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