JPS62187885A - Prevention of electrostatic breakage for display unit - Google Patents
Prevention of electrostatic breakage for display unitInfo
- Publication number
- JPS62187885A JPS62187885A JP61030301A JP3030186A JPS62187885A JP S62187885 A JPS62187885 A JP S62187885A JP 61030301 A JP61030301 A JP 61030301A JP 3030186 A JP3030186 A JP 3030186A JP S62187885 A JPS62187885 A JP S62187885A
- Authority
- JP
- Japan
- Prior art keywords
- active
- bus line
- prevention
- static electricity
- display unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000002265 prevention Effects 0.000 title description 2
- 230000015556 catabolic process Effects 0.000 claims description 11
- 230000006378 damage Effects 0.000 claims description 8
- 239000011159 matrix material Substances 0.000 claims description 8
- 230000005611 electricity Effects 0.000 claims description 7
- 230000003068 static effect Effects 0.000 claims description 7
- 230000002441 reversible effect Effects 0.000 claims description 5
- 238000000034 method Methods 0.000 claims description 4
- 239000004020 conductor Substances 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 description 7
- 229910052751 metal Inorganic materials 0.000 description 7
- 239000002184 metal Substances 0.000 description 7
- 239000010408 film Substances 0.000 description 5
- 230000007547 defect Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
- 238000006386 neutralization reaction Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 238000007743 anodising Methods 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000003472 neutralizing effect Effects 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔概要〕
本発明は、表示装置の！Ｒ造工程中に発生する静電気に
よりアクティブ素子が破壊する事を防ぐための静電気中
和用バスラインを持つアクティブマトリクス形表示装置
において、中和用バスラインを接続したままで各素子の
特性、不良発生の状態を調べるために前記中和用バスラ
インとアクティブマトリクスの各行および各列との間に
可逆的な電圧降伏特性を持つ素子を挿入したものである
。[Detailed Description of the Invention] [Summary] The present invention provides a display device! In an active matrix display device that has a static electricity neutralization bus line to prevent active elements from being destroyed by static electricity generated during the R manufacturing process, the characteristics and defects of each element can be checked with the neutralization bus line connected. In order to investigate the state of occurrence, an element having reversible voltage breakdown characteristics is inserted between the neutralizing bus line and each row and each column of the active matrix.
本発明は、アクティブマトリクス形表示装置、特にその
製造プロセスにおける静電破壊防止方法に関する。アク
ティブマトリクス形表示装置は、表示のコントラスト向
上、平面均輝度向上、階調表示等に対して効果があるが
、一方！Ａ造プａセス中に発生する静電気により、画素
を駆動するためのアクティブ素子が絶縁破壊を起し、表
示欠陥となる問題があり、プロセス、＄１１造において
静電破壊防止対策を施す必要がある。The present invention relates to an active matrix display device, and particularly to a method for preventing electrostatic damage in its manufacturing process. Active matrix display devices are effective in improving display contrast, improving planar brightness, and displaying gradations, but on the other hand! Static electricity generated during the manufacturing process can cause dielectric breakdown in the active elements that drive pixels, resulting in display defects, and it is necessary to take measures to prevent electrostatic damage during the manufacturing process. be.
従来、このようなアクティブマトリクス表示パネルの静
電破壊対策としては、第５図のように各バランスの端末
を導体を用いて電気的に共通接続し、絶縁破壊の主要な
発生場所であるアクティブ素子のゲート−ドレイン間の
電位をすべて等しくする事により破壊を防止し、製造プ
ロセス終了後に上記接続部を除去する方法が用いられて
いる。Conventionally, as a countermeasure against electrostatic discharge damage in such active matrix display panels, the terminals of each balance are electrically connected commonly using a conductor as shown in Figure 5, and the active element, which is the main place where dielectric breakdown occurs, is A method is used in which destruction is prevented by equalizing all gate-drain potentials, and the connection portion is removed after the manufacturing process is completed.
ここで、表示パネルの主な欠陥としては、１）バスライ
ンの断線、２）バスライン間の短絡、３）アクティブ素
子の特性不良等が挙げられ、これらが発生した時点で製
造プロセスラインから除去する事がコスト、信頼性の上
からも望ましい０しかし、従来の静電破壊防止法では各
バランスが電気的に共通接続されているため、これらの
欠陥の検出は困難であるという問題がある。Here, the main defects of display panels include 1) disconnections in bus lines, 2) short circuits between bus lines, and 3) defective characteristics of active elements, and they are removed from the manufacturing process line as soon as they occur. However, in the conventional electrostatic discharge prevention method, since each balance is electrically connected in common, it is difficult to detect these defects.
第１図は、本発明を適用した表示パネルの等価回路であ
る。図中、１は各画素のスイッチングを行つための薄膜
トランジスタ等のアクティブ素子、２は液晶等の表示媒
体、３は可逆的に降伏特性を持つダイオードｓ ＤＢｅ
（ＪＢｍ Ｓｓはそれぞれドレインバス、ゲートバス
、静電破壊防止用の短絡バスラインである。FIG. 1 is an equivalent circuit of a display panel to which the present invention is applied. In the figure, 1 is an active element such as a thin film transistor for switching each pixel, 2 is a display medium such as a liquid crystal, and 3 is a diode s DBe with reversible breakdown characteristics.
(JBm Ss are a drain bus, a gate bus, and a short-circuit bus line for preventing electrostatic damage, respectively.
本発明において、ダイオード３の降伏電圧特性を第３図
に示すようにゲート−ドレイン間の絶縁耐圧より十分低
く、かつ特性測定には十分な局さに設定する事により、
特性測定や短絡、断線検査の際には、ダイオードの阻止
特性によって各バスラインは電気的に分離されていると
等価になり、アクティブ素子特性の測定が可能となり、
また静電気発生の際には静電気電圧はゲート−ドレイン
間耐圧より低い電圧にクランプされ、アクティブ素子の
破壊を引き起さない。In the present invention, as shown in FIG. 3, the breakdown voltage characteristics of the diode 3 are set to be sufficiently lower than the dielectric strength voltage between the gate and drain, and at a location sufficient for measuring the characteristics.
When measuring characteristics and inspecting short circuits and disconnections, each bus line is equivalent to being electrically isolated due to the blocking characteristics of the diode, making it possible to measure active element characteristics.
Further, when static electricity is generated, the static electricity voltage is clamped to a voltage lower than the gate-drain breakdown voltage, and does not cause destruction of the active element.
第２図には、本発明を桶川した鉄水パネルの部分拡大図
の一例を示す。図中、「アクティブマトリクス部」とし
た部分は第１図のアクティブ素子１や表示媒体２等から
なる回路をマトリクス状に配置したもので、ゲートバス
ＧＢ、ドレインバスＤＢにより端末に取り出され、ダイ
オード３を介して短絡バスラインＳｌと接続される。こ
こでダイオード３は、たとえば第３図のような電圧電流
特性を持つＭＩＭ（Ｍｅｔａｌ−Ｉｎｓｕｌａｔｏｒ−
Ｍｅｔａｌ）、 構造のもの等を用いればよい。第
４図は、とのＭＩＭダイオードの構造の一例で４はアク
ティブ素子等の形成されている基板、５はゲートまたは
ドレインバス、６は短絡バス、７はたとえばテーバな形
成したタンタル等のメタル、８はメタル７の斜面を陽極
酸化するなどの方法で形成した絶縁膜、９はポリイミド
等の絶縁膜、１０はクロム等のメタルで、メタル７．１
０はそれぞれバスライン端末６，５に接続されている。FIG. 2 shows an example of a partially enlarged view of a steel water panel based on the present invention. In the figure, the "active matrix section" is a circuit in which the circuits consisting of the active element 1, display medium 2, etc. shown in FIG. 1 are arranged in a matrix. 3 to the short-circuit bus line Sl. Here, the diode 3 is, for example, an MIM (Metal-Insulator) having voltage-current characteristics as shown in FIG.
Metal), structure, etc. may be used. FIG. 4 shows an example of the structure of an MIM diode, in which 4 is a substrate on which active elements etc. are formed, 5 is a gate or drain bus, 6 is a short-circuit bus, 7 is a tabular metal such as tantalum, etc. 8 is an insulating film formed by anodizing the slope of metal 7, 9 is an insulating film such as polyimide, 10 is a metal such as chromium, and metal 7.1
0 are connected to bus line terminals 6 and 5, respectively.
この実施例によれば、特性測定の際には短絡バスライン
Ｓｓを経由して流れる電流はきわめて微少で、評価には
問題がな〔発明の効果〕
本発明によれば、表示装置のアクティブ素子にかかる静
電気電圧を素子の破壊電圧以下に保って、破壊防止を行
うと同時に％従来の構造では困難だった製造工程中の素
子特性の測定が可能となる。According to this embodiment, the current flowing through the short-circuited bus line Ss during characteristic measurement is extremely small, and there is no problem in evaluation. By keeping the electrostatic voltage applied to the device below the breakdown voltage of the device, it is possible to prevent breakdown and at the same time, it becomes possible to measure device characteristics during the manufacturing process, which was difficult with conventional structures.
第１図は、本発明を適用した表示パネルの等価回路図、
第２図はその部分拡大図の一例、第３図は本発明に適用
する可逆性の電圧降伏特性を持つ素子の電圧−電流特性
の一例、第４図はその構造の断面図例である。また、第
５図は従来の表示パネルの部分拡大図の例である。図に
おいて％１はアクティブ素子、２は表示媒体、３は可逆
性の電圧降伏特性を持つ素子％４は基板、５，６はバス
ライン端末、７はメタル、８は薄い絶縁膜、９は厚い絶
縁膜、１０はコンタクトメタルｓ （ＪＢ ＋ ＤＢｐ
ＳＢはそれぞれゲートバス、ドレインバス、短絡バスラ
インである。
本発明を直用し丁こ表ホバネルの耳価回路図第 １
図
本発明を直重ＩＪこ表示ノ＼°キルの部分中１入ロア
イ ；ｒ −Ｆ′ １今性 ひ４第 ３ 図
ターイオードのｌ！ｒｒ面図
第 ４ 図FIG. 1 is an equivalent circuit diagram of a display panel to which the present invention is applied;
FIG. 2 is an example of a partially enlarged view, FIG. 3 is an example of voltage-current characteristics of an element having reversible voltage breakdown characteristics applied to the present invention, and FIG. 4 is an example of a cross-sectional view of the structure. Further, FIG. 5 is an example of a partially enlarged view of a conventional display panel. In the figure, %1 is an active element, 2 is a display medium, 3 is an element with reversible voltage breakdown characteristics, %4 is a substrate, 5 and 6 are bus line terminals, 7 is a metal, 8 is a thin insulating film, and 9 is a thick film. Insulating film, 10 is contact metal s (JB + DBp
SB are a gate bus, a drain bus, and a short-circuit bus line, respectively. Ear value circuit diagram of Hobanel using the present invention No. 1
Figure The present invention is shown directly under IJ.
I;r −F' 1Image Hi4th Figure 3 l of the teriode! rr side view Figure 4
Claims (1)
をマトリクス構成した表示装置において、各行および各
列に走るバスラインの端部に各々可逆性の電圧降伏特性
を持つ電気素子の一端を接続し、該電気素子の他端を共
通に導体で接続し、前記アクティブ素子の静電気による
破壊を防止すると同時に各アクティブ素子の特性測定を
可能にした事を特徴とする表示装置の静電気による破壊
防止方法。In a display device in which a display medium and active elements that address the display medium are configured in a matrix, one end of each electric element having a reversible voltage breakdown characteristic is connected to the end of a bus line running in each row and each column, and the electric A method for preventing destruction of a display device due to static electricity, characterized in that the other ends of the elements are commonly connected with a conductor to prevent damage to the active elements due to static electricity, and at the same time make it possible to measure the characteristics of each active element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61030301A JPH079506B2 (en) | 1986-02-14 | 1986-02-14 | How to prevent the display device from being damaged by static electricity |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61030301A JPH079506B2 (en) | 1986-02-14 | 1986-02-14 | How to prevent the display device from being damaged by static electricity |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62187885A true JPS62187885A (en) | 1987-08-17 |
| JPH079506B2 JPH079506B2 (en) | 1995-02-01 |
Family
ID=12299924
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61030301A Expired - Lifetime JPH079506B2 (en) | 1986-02-14 | 1986-02-14 | How to prevent the display device from being damaged by static electricity |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH079506B2 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6333130U (en) * | 1986-08-18 | 1988-03-03 | ||
| JPS63220289A (en) * | 1987-03-10 | 1988-09-13 | 日本電気株式会社 | Thin film transistor array |
| JPH02137366A (en) * | 1988-11-18 | 1990-05-25 | Nec Corp | Diode-type active matrix substrate |
| JPH0651347A (en) * | 1992-06-03 | 1994-02-25 | Alps Electric Co Ltd | Matrix wired board and its manufacture |
| US5930607A (en) * | 1995-10-03 | 1999-07-27 | Seiko Epson Corporation | Method to prevent static destruction of an active element comprised in a liquid crystal display device |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59126663A (en) * | 1983-01-11 | 1984-07-21 | Seiko Epson Corp | Semiconductor device |
| JPS59208877A (en) * | 1983-05-13 | 1984-11-27 | Ricoh Co Ltd | Thin film device |
| JPS6027154A (en) * | 1983-07-25 | 1985-02-12 | Canon Inc | Electronic apparatus |
| JPS6086587A (en) * | 1983-10-18 | 1985-05-16 | セイコーインスツルメンツ株式会社 | Liquid crystal display unit |
| JPS6265455A (en) * | 1985-09-18 | 1987-03-24 | Toshiba Corp | Display device |
-
1986
- 1986-02-14 JP JP61030301A patent/JPH079506B2/en not_active Expired - Lifetime
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59126663A (en) * | 1983-01-11 | 1984-07-21 | Seiko Epson Corp | Semiconductor device |
| JPS59208877A (en) * | 1983-05-13 | 1984-11-27 | Ricoh Co Ltd | Thin film device |
| JPS6027154A (en) * | 1983-07-25 | 1985-02-12 | Canon Inc | Electronic apparatus |
| JPS6086587A (en) * | 1983-10-18 | 1985-05-16 | セイコーインスツルメンツ株式会社 | Liquid crystal display unit |
| JPS6265455A (en) * | 1985-09-18 | 1987-03-24 | Toshiba Corp | Display device |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6333130U (en) * | 1986-08-18 | 1988-03-03 | ||
| JPS63220289A (en) * | 1987-03-10 | 1988-09-13 | 日本電気株式会社 | Thin film transistor array |
| JPH0567953B2 (en) * | 1987-03-10 | 1993-09-27 | Nippon Electric Co | |
| JPH02137366A (en) * | 1988-11-18 | 1990-05-25 | Nec Corp | Diode-type active matrix substrate |
| JPH0651347A (en) * | 1992-06-03 | 1994-02-25 | Alps Electric Co Ltd | Matrix wired board and its manufacture |
| US5930607A (en) * | 1995-10-03 | 1999-07-27 | Seiko Epson Corporation | Method to prevent static destruction of an active element comprised in a liquid crystal display device |
| USRE38292E1 (en) | 1995-10-03 | 2003-10-28 | Seiko Epson Corporation | Method to prevent static destruction of an active element comprised in a liquid crystal display device |
| USRE44267E1 (en) | 1995-10-03 | 2013-06-04 | Seiko Epson Corporation | Method to prevent static destruction of an active element comprised in a liquid crystal display device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH079506B2 (en) | 1995-02-01 |
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