JPS6218696A - Memory write system - Google Patents

Abstract

PURPOSE:To make such work as to divide a microprogram into the word length and bit one of a PROM-IC outside unnecessary by writing sequentially each data on equally divided blocks in a corresponding memory to be written. CONSTITUTION:Out of data on an IC word/bit register 1 to be written and that of a write data word/bit register 2, a memory block divider circuit 3 divides write data of Ym words xX(l) bits into blocks B1-Bn of (m) words x(l) bits for each unit of a PROM-IC. Then the block number is transferred to a write sequence circuit 8 to indicate the number of memories to be written, and the PROM-IC to be written is sequentially inserted to sockets S1-Sn and written in them. In order to write data, first a W/R control circuit 6 is made in a read mode, and a control circuit 7 controls (l) bits which simultaneously read data, whereby data in the block of a memory 5 specified by a block/address decoder 4 is transferred to the write sequence circuit 8, and is written in the PROM-IC.

Description

TECHNICAL FIELD The present invention relates to a memory writing method, and more particularly to a memory writing method for writing a microprogram into a PROM-IC (programmable read-only memory integrated circuit).

PRIOR ART A conventional writing device for writing to a PROM-IC stores write data of the same word length and bit length as the FROM-IC to be written in a memory, and writes data to one or more PROM-ICs.
The system uses data (microprogram) for xc.

The above-mentioned conventional PROM-I Ct! In the writing device, the memory for storing write data and the PROM-IC to be written have a one-to-one correspondence in terms of data capacity. When writing data with , to PROM-IC,
It is necessary to replace the written data several times.

For this purpose, it is necessary to divide the microprogram into word length and bit length of PROM-IC, and
In the case of high-mix, low-volume production, there is a drawback that the man-hours for loading the write data account for a large proportion of the total man-hours for writing.

OBJECT OF THE INVENTION The object of the present invention is to provide a memory write method that requires work to divide write data into words and bit lengths of PROM-IC, and reduces the number of man-hours required to load write data. The goal is to provide the following.

Structure of the Invention The memory write method according to the present invention includes a write memory in which write data having an arbitrary word length and bit length is divided and stored for each capacity that matches the capacity of the memory to be written, and the like. The present invention is characterized in that it includes an access means for accessing stored data for each divided block, and sequentially writes each data of the divided blocks to a corresponding write memory.

Example Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of memory peripherals, write sequence circuits, etc. of a PROM-IC writing device according to an embodiment of the present invention. FIG. 2 is a diagram showing a block configuration of a memory in the device including PROM-1Cl.

In FIG. 1, register 1 for IC word/bit to be written and register 2 for write data word/bit are connected to memory block dividing circuit 3, and write data (microprogram) is divided into several blocks. Generate control data for splitting.

Further, the memory block dividing circuit 3 is connected to a blocked address decoder 4, and the blocked address decoder 4 accesses the memory 5.

The memory 5 includes a W/R for controlling writing and reading.
The control circuit 6 is connected to a bit control circuit 7 that controls the bit length for simultaneously reading write data. All of the above circuits are connected to a common bus 10, and each takes in necessary data. In addition, the write sequence circuit 8 also uses the common bus 1.
0 and is connected to PROM-I to be written from 81 to Sn.
It controls the write target PROM-IC socket module 9 which is composed of a C socket.

In FIG. 2, ite, m, and I indicate the word length and bit length of the PROM-IC to be written, respectively. Ym again.

×1 indicates the word length and bit length of write data, respectively.

B1. B2·'Bn-2, [3n-1, 3n represents the block to be divided.

Next, to explain an example of the use of the PROM-11 included device according to the present invention, when the PROM-IC@ included device is powered on,
The word length m and bit length 1 of the PROM-IC designated as the socket module for the PROM-IC to be written are input to the register 1 for the IC word/bit to be written. Further, the word length Y'm and bit length x 1 of the write data added when write data (microprogram) is input from the outside are set in the write data register 2. Thereafter, the write data is transferred to the memory 5 by the W/R control circuit 6 and blocked address decoder 4 with word length Ym.
It is stored in a range of bits x1.

Next, from the data in the register 1 for IC words/bits to be written and the register 2 for write data words/bits, the memory block division circuit 3 divides the write data of Ym words XXI bits into m It is divided into blocks 81 to 3n of word×1 bit. After that, the number of blocks is transferred to the write sequence circuit 8, and the damaged block number is transferred to the write sequence circuit 8.
C. A number is indicated. Follow the instructions to write to the PROM-
The ICs are sequentially inserted into the sockets 81 to 3n and a write operation begins.

For writing, first, the W/R control circuit 6 is set to read mode, and the bit control circuit 7 simultaneously controls one bit to be read, so that the data in B1 in the memory 5 block specified by the block address decoder 4 is written. The data is transferred to the write sequence circuit 8 and written into the PROM-IC mounted in the socket 1-81 for the PROM-IC to be written.

Thereafter, in the same manner as described above, the write sequence circuit 8 sequentially writes the write data of blocks B2 to Bn to the PROMs 1C mounted in the sockets 82 to 3n for PROM-ICs to be written.

As described in detail, according to the present invention, write data having an arbitrary word length and bit length stored in the memory in the PROM-IC writing device is transferred to the memory Furukawa of the PROM-IC to be written. Divide into matching capacities and write to PROM-I
By implementing multiple C sockets, each data of the divided blocks is transferred to the corresponding written PROM-IC.
By making it possible to sequentially incorporate the microprogram into the PROM-IC, there is no need to externally divide the microprogram into the word length and bit length of the PROM-IC. Furthermore, it has the effect of reducing the number of man-hours required to load write data when producing a large number of products with a small number of products.

[Brief explanation of drawings]

Figure 1 is a block diagram of an embodiment of the present invention, Figure 2 is a PRO
FIG. 2 is a block configuration diagram of a memory in the M-I C@in device. Explanation of symbols of main parts 3...Memory block division circuit 4...
Blocked address decoder 5...Memory 8...Write sequence circuit 9...Socket module for PROM-IC to be written

Claims (1)

[Claims] A write memory in which write data having an arbitrary word length and bit length is divided and stored in each capacity that matches the capacity of the memory to be written, and access to access the stored data in each divided block. What is claimed is: 1. A memory writing method, comprising means for sequentially writing each data of the equally divided blocks into a corresponding memory to be written.