JPS62183683A - Look up table - Google Patents

Abstract

PURPOSE:To save the operation and the time for rewriting a table in a picture processing system using many fixed conversion tables by constituting the look up table for carrying out the gradation processing by using a random access memory RAM and a memory ROM exclusively used for reading in parallel and changing over and using both the memories. CONSTITUTION:A gradation correcting line 17 of the RAM is previously written in th RAM 2 and a gradation correcting line 18 of the ROM is previously written in the ROM 12. An address for giving an intersection point of the gradation correcting line 17 of the RAM and the gradation correcting line 18 of the ROM is considered to be C and data to be D. A data decoder 16 brings a RAM select signal 14 into L when input picture data 5 is above C, and into H when the signal 14 is below C. In this manner, since the RAM 2 and the ROM 12 can be changed over and used according to the value of the input picture data 5 by using the data decoder 16, the two correcting lines are composed as shown by a composite correcting line 19 in the figure b and a more complicate correcting line can be formed. Namely, the frequently used gradation correcting line is written in the ROM so as to be connected to the RAM in parallel, so that the operation and the time for rewriting the RAM are saved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application] The present invention relates to a look-up table for performing gradation processing in a digital image processing device.

[Conventional technology]

FIG. 4 is a block diagram showing a conventional lookup table. In the figure, +11 is an address switching circuit, (21#
-j random access memory (RAM), +3
1 is a data switching circuit, (4) is a rewrite address signal,
(6) is input image data, (6) is address signal, (7
) is a data signal, f81d rewrite data input/output signal,
(9) is output image data.

Further, Figures @5 and @6 are diagrams showing the principle of a look-up table to help explain the conventional example in Figure 4, where tlol represents a table memory element, and αD represents a gradation correction line.

Before explaining the operation of the conventional example, the principle of the look-up table will be explained with reference to FIG. 5 for better understanding.

A lookup table is a device for converting the gradation of digital image data, and arbitrarily converts input image data and outputs it. This device typically uses RAM % memory elements. In Fig. 5, the input image data (
6) is input as the address of the table memory element (101) - output image data (91) is given as the data value of the input image data (61) accessed address.The lookup table is configured as described above. For example, if you want to obtain an output value from an input value with characteristics such as the gradation correction line α°C as shown in FIG. If the data is written in advance as shown in FIG.

The above lookup table was conventionally configured like a ¥J4 leap. The operation will be explained below. First, when rewriting the contents of the table, the address switching circuit +
11 is the rewritten address signal (41 is the address signal (6
) to RAM 12+. On the other hand, the data switching circuit (31) sends the rewritten data input/output signal (8) to the data
Connect as i++71. The rewritten address signal (4) and the rewritten data signal (8) are normally connected to a central processing unit (Central Processor Unit).
Hereinafter, it will be abbreviated as CPU. ) connected to il RAM (2
The table has a configuration in which data at any address on the table can be read and written, and the contents of the table can be arbitrarily rewritten. In addition, when performing gradation correction of image data, the address switching circuit (1) converts the input image data (51) into an address signal (6).
) as RAM (21), while the data switching circuit (31 outputs the data signal (7+ of RAM (21) as output image data (91).

[Problem that the invention seeks to solve]

Since conventional lookup tables are configured as described above, it is necessary to set the contents of the table RAM before performing gradation processing, and even in image processing systems that use many fixed conversion tables. There was a problem in that it took time and operations to rewrite the table.

This invention was made to solve the above-mentioned problems, and it is possible to rewrite the contents of the table arbitrarily, and it is possible to supply conversion tables that are used in large numbers without the need to rewrite them. The purpose is to obtain a possible lookup table.

[Means for solving problems]

The lookup table related to this R light is
Connect read-only memory (ROM) in parallel with AM, and
It is designed to switch between AM and ROM.

[Effect]

In the present invention [1], a conversion table that needs to be rewritten is supplied by JRAM, and a fixed conversion table to be used is supplied by ROM.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

Figure 1 shows an example of @1, ■ is ROM, and the head is NO.
T circuit, α5iJROM, which indicates that RAM (2) is selected when IILII with the iRAM select signal
When the select signal is "°L°", it indicates that RQM (19) has been selected.Other than that, the same parts as in the conventional example are shown with - marks Ji+.

Further, FIG. 2 is a diagram showing a second embodiment of the present invention, and α6 indicates a data decoder. Figure @3 is a table diagram that helps explain the actual case of the second meat, α7) is a RAM
The gradation correction line 09 is the gradation correction line of αυiJ ROM, and 09 is the composite gradation correction line.

First, the first embodiment shown in FIG. 1 will be described.

RAM (21 is RAM select signal α)
It becomes active when II. At this time, RAM select signal q
4 is inverted by the NO'l' circuit (13 and the ROM select signal α5 becomes n Hn, so the ROM (to) does not operate. On the other hand, the RAM select signal αΦ is changed to °1H°°
If it is set to RAM (21 does not work, but NOT circuit α
By J, ROM select signal 5+O9 becomes II L 11 and ROM Q2 becomes active signal. As shown above, RAM
+21 and ROM Q3 are configured so that when one is operating, the other is not operating.

Now RAM select signal α4) is IILII
(If 21 is operating, the address switching circuit (11) will change the address signal (4) when rewriting the table.
1 is given to RAM (2+ as address signal (61),
The rewriting data signal (8) is sent to the data switching circuit (31) and the data signal (7) is sent to the RAM (21) to repurpose the table. Also, during gradation correction, the input both image data (5) is set to 7F. The switching circuit +31 is given to the RAM (21) as an address signal 54f61 by the VC, and the device output signal (7) consisting of the RAM (2+)
is output as output image data (91) by the data switching circuit (3+) and gradation correction is performed.As described above, the look-up table in this practical example can operate exactly the same as the look-up table in the conventional example.

On the other hand, ROMQ2[ has not been written with frequently used table contents in advance, and when the RAM select signal α is °'H°°, the ROM select signal 09 becomes L°1 due to NOT circuit a3, and ROMQ3 becomes active. In this case, the input image data (5) is not added to ROMQ2 as an address signal (6) by the address switching circuit (1).
If the data signal e17) output from (2) is outputted as output image data (91) by the data switching circuit (3), gradation correction can be performed using the table contents of ROMQ2. .

In the above practical example, the RAM select signal α41 requires switching from the outside, but as in the second embodiment shown in Figure @2, a data decoder αG is provided, and the input image data (from 51 to R
An AM select signal α may also be obtained. The operation of this data decoder αG will be explained with reference to FIG.

Now, in RAM i21 /-iRAM gradation correction line αη
, it is assumed that the ROM gradation correction line (2) is written in advance in ROMQ3. RAM gradation correction/9α
Let C be the address giving the intersection of η and the r'4-tone correction line in the ROM, and D be the data.

Data decoder 0d sets the RAM select signal 5+α→ to °°L°° when the input image data (5) is C or higher, and sets it to "H" when it is less than C.

As described above, using the data decoder aO, input image data (61 values) are stored in RAM (21 and ROM (1
2 can be switched and used, so it is possible to combine the two correction lines to create a more complex correction line, such as the compound correction line Q9 in FIG. 3(b).

In the above example, RAM (21 and ROM a
Only one ROM 2 may be connected in parallel, or a plurality of ROMs may be connected.

〔Effect of the invention〕

As described above, according to the present invention, frequently used gradation correction lines are written in ROM K and configured to be connected in parallel with RAM, so that a look-up table that does not require RAM rewriting operations and time-opening is created. can be easily configured.

[Brief explanation of drawings]

FIG. 1 is a block configuration diagram showing a first practical example of this invention, FIG. 2 is a block configuration diagram showing a second embodiment of this invention, and FIG. 3 is a characteristic diagram for explaining its operation. , FIG. 4 shows a block structure Fi3 showing a conventional look amplifier table.
Figure 5 is a principle diagram of the lookup table, and Figure 6 is a table diagram for explaining the principle.
M: 3) data switching circuit, (51 input image data, (6) address signal, +91 H output image data,
α2 and α6 are data decoders. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (3)

[Claims] (1) In a lookup table used in a digital image processing device to perform gradation processing, the lookup table is stored in a random access memory (
1. A lookup table comprising a RAM (RAM) and a read-only memory (ROM) in parallel so that they can be used by switching between them. (2) The lookup table according to claim 1, wherein switching between RAM and ROM is performed for each address. (3) The lookup table according to claim 1 or 2, characterized in that a plurality of ROMs are provided.