JPS62179278A - Driving circuit for solid-state image pickup element - Google Patents

Abstract

PURPOSE:To use not only a solid state image pickup element of the first system but also the solid-state image pickup element of the second system by providing a reading pulse forming circuit, a removal pulse forming circuit and a gate circuit for checking the pass of a photodetecting output read synchronously with the removal pulse. CONSTITUTION:The horizontal removal pulse B is generated from the horizontal removal pulse generating circuit 6 during a horizontal blanking period, the vertical removal pulse E is generated from the vertical removal pulse generating circuit 7 in addition to the horizontal removal pulse B generated successively from the horizontal removal pulse generating circuit 6 during a vertical blanking period and they are respectively inputted to a horizontal drive circuit 9 and a vertical drive circuit 8. Accordingly, after an image pick up output for one line is conducted out, the photodetecting output remaining in a horizontal transfer line 1a is all conducted out during the horizontal blanking period and after the image pickup output for one field is conducted out, the photodetecting output remaining in a vertical transfer line is all transferred to the horizontal transfer line which is transferring and conducted out. Thereby, only a desired image pick up output relating to the reading pulses A, D is conducted out from the gate circuit 11.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Industrial Application Field 8A relates to an imaging device imaging circuit for forming video signals of different television systems using a solid-state imaging device.

(B) Conventional technology A solid-state image sensor is formed so that the number of pixels in the vertical direction matches the television system, and the number of pixels in the horizontal direction matches the required horizontal resolution.

Therefore, solid-state image sensors are usually manufactured in accordance with the television system, and the reason for the NTSC color one-way system is described in, for example, the magazine ``Electronics'' published by Ohmsha, October 1984 issue. It is also disclosed on page 78 of .

(c) Problems to be solved by the invention However, as mentioned above, the pixel arrangement of solid-state image sensors differs depending on the system, and the system of the image sensor @ dynamic circuit and the solid-state image sensor must match. Therefore, the present invention uses a solid-state imaging device of the second method with many horizontal scanning lines to form an image pickup output of the fJ1 method with fewer horizontal scanning lines. A read pulse forming circuit that derives a read pulse; a removal pulse forming circuit that supplies all removal pulses to the drive circuit outside the read pulse generation period; and a removal pulse forming circuit that supplies all removal pulses to the drive circuit outside the read pulse generation period; The feature is that a gate circuit is added to prevent passage.

(e) According to the present invention, the light receiving output derived from the redundant light receiving area in the first method is read out by the removal pulse during the vertical blanking period, and is outputted to the imaging output in the gate circuit. Passage is blocked so that it is not derived as

(f) Example The present invention will be described below with reference to illustrative embodiments.

This example uses a PAL system (@22-way) CCD solid-state image sensor, in which one frame consists of 625 horizontal scanning lines.
It is characterized by forming a video signal of the C method (first method). That is, in this embodiment, as shown in FIG. 1, the light receiving area is formed by the number of effective scanning lines of 492 lines of the NTSC method (indicated by hatching) in the light receiving area formed by the number of effective scanning lines of PAL method #&575 lines. The extra light-receiving area is in the light state.

Therefore, in this embodiment, the times FjlI as shown in FIG.
are arranged. The NTSC solid-state image sensor drive circuit uses the master clock obtained from the master clock generation circuit (2) to the synchronization signal generation circuit (3), the horizontal readout pulse generation circuit (4), and the vertical ML output path μ generation circuit. (5) K is input. The horizontal read pulse generation circuit (4) and the vertical read pulse generation circuit (5) are connected to the synchronization signal generation circuit (
3) A readout pulse is formed by inputting the same amount of horizontal and vertical pulses (DJ) to the vertical drive circuit (8), and the horizontal readout pulse (3) to the horizontal drive circuit. (9).The vertical drive pulses vertically transfer the received light output transferred to the vertical transfer line of the CCD solid-state image sensor (1) in the horizontal synchronization period.This transfer also causes horizontal transfer. The light reception output transferred to line (1a)K is further transferred in the horizontal direction by a horizontal drive pulse, and is derived as an imaging output.

Therefore, in the case of an NTSC type solid-state imaging device, a desired imaging output can be derived using a vertical readout pulse and a horizontal readout pulse. However, when driving a PAL solid-state image sensor with a wide light-receiving area as in this embodiment,
The extra received light output in the vertical direction is generated during the vertical blanking period.
Further, it is necessary to derive the extra light reception output in the horizontal direction from the solid-state image sensor (1) during the horizontal blanking period and remove it by a blanking pulse at a stage before the signal processing circuit.

Therefore, the horizontal removal pulse (Bl k
The horizontal removal pulse (
In addition to Bl, a vertical removal pulse E)k is generated from a vertical removal pulse generation circuit (), and a horizontal drive circuit;
9) and is input to the vertical drive circuit (8). Therefore, after deriving the imaging output for one line, the horizontal transfer line (1a
) are all derived during the horizontal blanking period, and after deriving the imaging output for one field, the received light output that remains on the vertical transfer line is all transferred to the horizontal transfer line that is currently being transferred during the vertical blanking period. and is derived. FIG. 3 is a waveform diagram schematically showing the generation period of the horizontal and vertical removal pulses ('B) and (E) described above. Note that the horizontal removal pulse (B) that occurs continuously during the generation period of the vertical removal pulse (El) is derived for a certain period of time even after the vertical removal pulse (El is deactivated), and the received light output is output to the horizontal transfer line (la). It is constructed in such a way that it will not be cut down.

The imaging output derived in this way is input to the gate circuit (river). This control completely prevents the generation of imaging output during the blanking period.Therefore, only the desired imaging output related to the readout pulses (A) and (D) is derived from the gate circuit. In the waveform of the blanking pulse (C) at the bottom, the illustration of the horizontal blanking pulse is omitted, and the waveform of the corresponding horizontal removal pulse (B
) is illustrated with the horizontal scanning period omitted.

In addition, the horizontal/vertical removal pulse generation circuit mentioned above! 61 +71
The operation is controlled by a changeover switch, and when using an NTSC solid-state image sensor,
It is considered to be in a pre-harvest state.

The embodiments described above apply the present invention to an interline type solid-state image sensor, but when the present invention is applied to a frame transfer type solid-state image sensor, vertical transfer from the light receiving section to the storage section is performed. It's okay to do extra.

(G) According to the effects of the invention, the solid-state image sensor drive port WJ#-i of the present invention, the first
It is possible to use not only the solid-state imaging device of the second method but also the solid-state imaging device of the second method, and the effect is great.

[Brief explanation of drawings]

Each figure shows an embodiment of the present invention. Figure 1 is an explanatory diagram of the light receiving area of the first method and the second method, Figure 2 is a circuit block diagram, and Figure 3 is the main waveform of Figure 2. Explanatory drawings are shown respectively. t4051...Horizontal/vertical read pulse generation circuit, 191
t81...Horizontal/vertical drive circuit, (11...solid-state image sensor, :sl i7)...horizontal/vertical removal pulse generation circuit, +Ill...gate circuit. Out (4 people Sanyo Electric Co., Ltd. agent Patent attorney Shizuka Sano Inu Figure 1 Figure 2 Kuno (J 0LLI (11) Taste of J Ward

Claims (1)

[Claims] (1) A read pulse forming circuit that forms a first type horizontal/vertical read pulse in synchronization with a master clock;
a drive circuit that amplifies vertical readout pulses and drives a solid-state image sensor of a second method that has more horizontal scanning lines per frame than the first method; and a horizontal and vertical blanking period during which the horizontal and vertical readout pulses are not generated. a removal pulse generation circuit that inputs a horizontal and vertical removal pulse generated during the generation period to the drive circuit; and a gate circuit that prevents the output of the light received from the solid-state image sensor during the horizontal removal pulse generation period. A solid-state image sensor drive circuit consisting of: