JPH0693757B2 - Noise reduction circuit for solid-state imaging device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention will be described in the following order.

A Industrial Field B Outline of Invention C Conventional Technology D Problems to be Solved by the Invention E Means for Solving Problems (FIG. 1) F Action G Example G1 First Example (No. 1) 1) G2 Second embodiment (FIGS. 2 and 3) H Effect of the invention A Industrial field of application The present invention relates to a solid-state image pickup device using a solid-state image pickup device including a semiconductor element such as a CCD. The present invention relates to a noise elimination circuit for a solid-state image pickup device that eliminates noise due to crystal defects of a semiconductor element that constitutes the solid-state image pickup device.

B Outline of the Invention The present invention is directed to noise of a solid-state imaging device configured to remove noise due to crystal defects of a semiconductor element forming a solid-state imaging device using a solid-state imaging device including a semiconductor device such as a CCD. In the removal circuit, the crystal defect position information is stored in the memory for storing the crystal defect position of the semiconductor element in correspondence with the plurality of modes, and selected from the stored crystal defect position information of the plurality of modes. By providing the selecting means for outputting the signal from the memory according to the selected mode, the noise removal due to the crystal defect of the semiconductor element corresponding to the plurality of modes can be performed by one memory.

C Conventional Technology In recent years, a solid-state image pickup device using a solid-state image pickup element made of a semiconductor element such as a CCD has been put into practical use.

For example, when a CCD is used as this solid-state image sensor,
As a structure, a SiO ₂ layer is formed on one surface of a semiconductor substrate of silicon, electrodes are formed on the SiO ₂ layer at regular intervals, and an image is optically projected from the side on which the electrode is adhered or the side opposite to this, and a semiconductor element The electric charges are accumulated in the portions under the respective electrodes, and the accumulated signals are sequentially transferred and read out by a clock pulse applied to the electrodes.

In a solid-state imaging device including a solid-state imaging device using such a semiconductor element, it is difficult to uniformly form a crystal of the semiconductor element over a certain area, and a crystal defect locally occurs. Since electric charges are easily generated due to thermal causes, dark current tends to be abnormally large in this portion as compared with other portions. For this reason, when an image is projected and a signal is read out as described above, noise is generated at a place where the dark current is abnormally large. Therefore, as shown in FIG. 4, for example, the noise N larger than the white level is mixed in the video signal S ₀ , and when the noise N is displayed on the reproduction screen, the noise N is easily noticeable.

One method of removing the noise N is to use a memory. That is, it can be achieved by storing the crystal defect portion of the semiconductor substrate in a memory in advance and controlling the output of the image pickup signal obtained from the solid-state image pickup device by the output signal of this memory.

The above-mentioned memory stores the contents corresponding to the presence or absence of crystal defects, and the contents of this memory are usually the presence or absence of crystal defects for each picture element.

Therefore, it has N _H picture elements in the horizontal direction and N _{V in the} vertical direction.
A CCD having such a number of picture elements requires N _H · N _V (bit) memory capacity. To obtain the same image as a normal TV image, N _H is 300 to 500 and N _V is 200.
Since about 300 units are required, storing the crystal defects by the above method results in a large-capacity memory.Therefore, in the case of such a configuration, the memory becomes expensive, and this kind of solid-state imaging device can be provided at low cost. Has no drawbacks.

One method of reducing the memory capacity is not to sequentially store the presence or absence of a crystal defect for each picture element but to encode and store the position where the crystal defect exists. In order to code the position where the crystal defect exists, each position of the X and Y coordinates on the plane coordinates of the semiconductor element may be coded. Here, if the number of picture elements N _H in the horizontal scanning direction is about 500, the positions of the picture elements in the horizontal scanning direction can all be expressed with a capacity of about 9 bits. Similarly, the number of picture elements existing in the vertical direction
It may be 8 bits about as well as N _V is 300 or so. When the interlaced scanning method is adopted, it is necessary to judge whether the crystal defect exists in the pixel area of the odd field or in the field of the even field, and therefore one bit is required for the field judgment.

In this way, if the position (XY coordinate) where the crystal defect exists and the field discrimination are included, all of these information can be expressed with a total of about 18 bits. Also, if the maximum crystal defects that can be tolerated as a product for one CCD is 20, the memory capacity will be about 400 bits, and it can be seen that a small capacity memory is sufficient for practical use. .

A method for encoding and storing this crystal defect position is disclosed in Japanese Patent Application No.
No. 52-9108, and an example thereof will be described below. Now, for example, a solid-state image sensor having a crystal defect in a semiconductor element at a position as shown in FIG. 5 will be considered. It is assumed that X _{1 to} X ₃ are crystal defects. And the memory is 1 in 24 bits
Memorize individual crystal defects. Of these 24 bits, 12 bits show the absolute value in the horizontal direction, and 12 bits show the distance in the vertical direction. For example, in the case of a crystal defect X ₁ , if the scanning start point in the first horizontal scanning line of the field is the reference point X ₀ , it is the third horizontal line from the X ₀ point and the second line in the vertical direction. It is converted into a base number and encoded as horizontal absolute position ... XX0000000011 vertical relative distance ... XX0000000010 (however, the bit indicated by X is not actually used), and the encoded data is stored in the memory.
Also, in the case of crystal defect X ₂ , since it is on the 5th line from the X ₀ point in the horizontal direction and on the 3rd line from the X ₁ point in the vertical direction, it is converted into a binary number, and encoded as horizontal absolute position ... XX0000000110 vertical relative distance ... XX0000000011 , Store the encoded data in the memory. Further, in the case of crystal defect X ₃ , it is 509 in the horizontal direction from point X _0.
The second line from the X ₂ point in the vertical direction is 2
It is converted into a base number and encoded as horizontal absolute position ... XX0111111101 vertical relative distance ... XX0000000010, and the encoded data is stored in the memory.

By storing as described above, for example, when there are three crystal defects as described above, 24 bits × 3 = 72 bits are sufficient, and a small capacity memory can be used.

FIG. 6 shows an example of a noise elimination circuit using a memory in which crystal defects of the semiconductor element are stored in this way. The CCD transfer method used in this example is an interline transfer method as shown in FIG.

Since its structure is well known, a brief description will be made. As shown in FIG. 7, a large number of picture elements (2) are formed in an array in the vertical direction, and charges are transferred to each picture element row. A vertical shift register (3) is provided for storing the charges, and the charges transferred to these vertical shift registers (3) are sequentially transferred to the horizontal shift register (4) pixel by pixel, and a signal is read out through a terminal (5). Be done.

Then, the following drive pulses are supplied to this CCD (10). P _I is an imaging pulse supplied to each pixel (2), P _V is a transfer pulse supplied to the register (3), and P _H is a read pulse supplied to the horizontal shift register (4). .

As shown in FIG. 6, the desired subject (1
1) is projected through the optical system (12), and the imaging output obtained at the terminal (5) is guided to the output terminal (14) through the sampling and holding circuit (13). Further, the above-mentioned drive pulse obtained in the scanning system circuit (15) is supplied to the CCD (10).
Reference numeral (20) indicates a memory (ROM in the embodiment) in which crystal defects are coded and stored, and (21) indicates a synchronization signal generator. Here, the operation of storing the crystal defect in the ROM (20) is performed by examining the crystal defect of the semiconductor element of the CCD (10) used when manufacturing the noise elimination circuit, and if there is a crystal defect, encode it and store it. There is. Then, the sync signal generator (21) supplies horizontal and vertical sync signals to the scanning system circuit (15),
By this synchronizing signal, the sampling pulse generator (16) supplies the sampling pulse P _S synchronized with the above-mentioned read pulse P _H to the sampling hold circuit (13). The sampling pulse P _S controls the sampling hold circuit (13) to output an image pickup signal to the output terminal (14).

Here, when removing noise due to crystal defects in the CCD (10), the scanning system circuit (15) is blanked during the blanking period of the synchronization signal supplied from the synchronization signal generator (21) to the scanning system circuit (15). ) Addressing circuit (19) to the ROM (20), and the 24-bit data of the specified address stored in the ROM (20) is supplied to the decoder (18) in the scanning circuit (15). ) To. Then, the 24-bit encoded data supplied to the decoder (18) is decoded and temporarily stored in the memory (17), and the image pickup signal is supplied from the CCD (10) to the sampling and holding circuit (13). When the line has a crystal defect, the sampling pulse generator (16) does not supply the sampling pulse P _{S according} to the data from the memory (17) and the previous signal is held. That is, as shown in FIG. 8, if there is a crystal defect called Xa in one horizontal scanning period, data is read from the ROM (20) during the horizontal blanking period before that, and Xa point in the scanning period is read. Then, the sampling pulse P _S is not supplied and the immediately preceding signal is held.

By removing the noise of the crystal defect as described above, the position of the crystal defect is encoded and stored, whereby the memory capacity can be significantly reduced.

On the other hand, when the ROM (20) used as a memory is encoded and stored as described above, different data is stored in the ROM (20) if the CCD signal reading mode of the CCD (10) is different. Need to be replaced with a corresponding one. Therefore, if the readout mode of the imaging signal differs depending on the model that uses the solid-state imaging device, the ROM (2
0) must be prepared. Further, even when the image pickup signal is read out in a plurality of modes for one solid-state image pickup device of one model, it is necessary to provide a plurality of ROMs (20) even though the positions of crystal defects are the same. .

The case where field reading and frame reading are performed as the reading mode of the solid-state image pickup device will be described below. In frame reading, one frame image is composed of two fields of an odd field and an even field. 1,3,5 ... is read in the odd field and 2,4,6 is read in the even field. Is a read mode in which the signal on the even line is read. On the other hand, the field reading is to read two adjacent lines as a combined output at the same time. For example, in an odd field, (1,2 combined output), (3,4 combined output), (5,6 combined output). ) ..., and in the even field, it is a read mode in which (2,3 composite output), (4,5 composite output), (6,7 composite output) ... are read. Here, as shown in FIG. 9, the scanning start point in the first horizontal scanning line is set as the reference point Y ₀ , and the crystal defect Y ₁ is the third in the horizontal direction and the third in the vertical direction from the reference point Y ₀ . It is assumed that the picture element has a crystal defect Y ₂ in the fifth picture element in the horizontal direction and the sixth picture element in the vertical direction from the reference point Y ₀ . This crystal defect
When performing frame reading of Y ₁ and Y ₂ , the crystal defect Y ₁ is scanned (the second line of the odd field, the third in the horizontal direction), and the crystal defect Y ₂ is the (the third line of the even field). , The fifth scanning in the horizontal direction is performed, so that the scanning is performed in the order in which the scanning is performed as described above and stored in the ROM as two crystal defects. Further, when performing field reading, the crystal defect Y ₁ is scanned twice (the second line of the odd field, the third in the horizontal direction) and the (first line of the even field, the third in the horizontal direction). , Crystal defects
Y ₂ scans twice (the third line of the odd field, the fifth in the horizontal direction) and (the third line of the even field, the fifth in the horizontal direction). Therefore, two crystal defects are scanned a total of four times, so that the ROM is encoded and stored as four crystal defects.

D Problems to be Solved by the Invention As described above, even with the same crystal defect, the positions and the numbers stored in the ROM are completely different between the field reading and the field reading, and it is necessary to prepare different ROMs. Therefore, when manufacturing a noise elimination circuit for a solid-state imaging device for a plurality of readout modes such as field readout and frame readout, a separate memory must be prepared and attached for each readout mode used. , The manufacturing work becomes complicated. Further, preparing a plurality of ROMs at the time of manufacturing has a disadvantage in that it requires a large number of types of components and thus the cost of the noise elimination circuit is high. Note that, for example, it is also possible to store the encoded data in the ROM in correspondence with frame reading and convert this data into field reading data in the scanning system circuit (15) for field reading. However, the circuit configuration for this data conversion becomes extremely complicated, and for example, when the data stored as even field data is converted into an odd field, scanning has already ended and noise has been generated. This is not practical because removal is not in time and a frame memory must be provided for this purpose.

In view of the above points, it is an object of the present invention to provide a noise elimination circuit for a solid-state imaging device, which allows a memory to be used in common for a plurality of imaging signal read modes.

E Means for Solving Problems The noise elimination circuit of the solid-state image pickup device of the present invention includes a solid-state image pickup body (10) made of a semiconductor element, as shown in FIG.
And a memory (20) for storing the crystal defect position of the semiconductor element, and the solid-state imaging device (1
In the noise removal circuit of the solid-state imaging device, which is configured to correct the image pickup output signal of 0) to remove the noise due to the crystal defect, the memory area is referred to as the first storage area (20a) as the memory (20). First divided into two in the second storage area (20b)
As the crystal defect position information to be stored in the storage area (20a), data encoded as coordinate position data for each crystal defect corresponding to the reading order from the solid-state imaging device (10) in the first mode, Data encoded as coordinate position data for each crystal defect corresponding to the reading order from the solid-state imaging device (10) in the second mode as crystal defect position information stored in the second storage area (20b) In accordance with the selection of the first or second read mode from the solid-state imaging device (10), read crystal defect position information from the memory (20) is stored in the first storage area (20a) and the first storage area (20a). Selection means (23) for selecting one of the two storage areas (20b)
Is provided.

F action The noise elimination circuit of the solid-state imaging device of the present invention encodes and stores all the crystal defect position information according to the read modes of a plurality of image pickup signals in the memory in advance, and reads out the necessary read mode from the plurality of crystal defect position information By selecting the crystal defect position information corresponding to (1) by the selecting means and outputting it from the memory, it is possible to deal with noise removal of the solid-state imaging device by a plurality of read modes with one memory.

G Embodiment G1 First Embodiment Hereinafter, a first embodiment of the noise elimination circuit of the solid-state imaging device of the present invention will be described with reference to FIG. In FIG. 1, parts corresponding to those in FIGS. 4 to 9 are designated by the same reference numerals, and detailed description thereof will be omitted.

In the present embodiment, the noise removal circuit of the solid-state image pickup device is designed so that one solid-state image pickup device can be read out in two kinds of modes, that is, a frame read-out and a field read-out, as in the example shown in FIG. It is an example applied to.

As shown in FIG. 1, this noise elimination circuit has a switching circuit (22) connected to a scanning system circuit and a movable contact (23a) of a switching switch (23) connected to a ROM (20) which is a memory. I am doing it. The opening / closing of the opening / closing switch (22) and the switching of the switching switch (23) are interlocked with each other, and when the opening / closing switch (22) is closed, the movable contact (23a) is connected to one fixed contact (23b). The movable contact (23a) is connected to the other fixed contact (23c) when the open / close switch (22) is closed. Then, the power supply (24) is connected to one fixed contact (23b).
Is supplied with a constant DC signal (hereinafter referred to as a high level signal "1"), and the other fixed contact (23c) is supplied with a reference signal (hereinafter referred to as a low level signal "0"). The high level signal “1” or the low level signal “0” is supplied to the ROM (20) via 23). ROM (20)
Has a storage area divided into a first storage area (20a) and a second storage area (20b), and when the high level signal "1" is supplied, the data in the first storage area (20a) Can be read, and when the low level signal "0" is supplied, the data in the second storage area (20b) can be read. Data of crystal defects for field reading is stored in the first storage area (20a) and data of field defects is read in the second storage area (20b).
The data of crystal defects for frame reading is stored in each. That is, as the ROM (20), a ROM having 256 addresses, for example, and bringing back 4 bits of information to each address.
When using, the addresses 0 to 127 are used as the first storage area (20a) for reading fields, and the addresses 128 to 255 are used as the second storage area (20b) for reading frames. In addition, when the open / close switch (22) is closed, the scanning system circuit (15) reads the image pickup signal from the CCD (10) by field reading, and the ROM (20) by the above method.
When the image pickup signal is supplied to the output terminal (14) and the open / close switch (22) is opened by removing noise corresponding to the data from, the image pickup signal is read from the CCD (10) by frame reading and The noise is removed according to the data from the ROM (20) and the output terminal (14)
To supply the imaging signal. Open and close switch here (22)
And the switching switch (23) are interlocked with each other, so when the scanning system circuit (15) is set to field reading, the ROM (20)
Field read data is supplied from the ROM, and the frame read data is supplied from the ROM (20) when the frame is read.

As a result of the above, ROM as memory (20)
Although it is only one, it can support two different read modes, ie, field read and frame read. Therefore, the noise elimination circuits for two types of read mode video cameras can be configured by the same circuit. This means that even when it is uncertain which application to use for a video camera that reads out which mode when manufacturing a noise canceller,
Since the same ones can be used, it is sufficient to manufacture one type of noise elimination circuit, which can be shared, which leads to a reduction in the manufacturing cost required for noise elimination. Also, one CCD (10)
On the other hand, in the case of a video camera capable of reading in two modes, the number of ROMs (20) to be mounted can be reduced by half.

In addition, the crystal defect data can be stored in the ROM (20) in 24 bits for one data if the above-mentioned encoding is performed.
Even 128 addresses can store 4 bits at each address, so 5
12 bits, that is, 21 crystal defect data can be stored. In reality, one CCD (10) rarely has more than 10 crystal defects, and the storage capacity of the ROM (20) is insufficient. Absent.

G2 Second Embodiment Next, a second embodiment of the noise elimination circuit of the solid-state image pickup device of the present invention will be described with reference to FIGS.

In this embodiment, as a video tape recorder for recording an image pickup signal, a normal one having a horizontal scanning signal of 262.5H in one vertical scanning period (hereinafter referred to as standard scanning) and a horizontal scanning of 315H in one vertical scanning period. This is a special device (hereinafter referred to as high-speed scanning) adopted in a device in which a video camera having a signal and a video tape recorder are integrated so that noise can be removed by the same memory.

This difference in the horizontal scanning signal is caused by the difference in the head drum structure for recording the video signal of the video tape recorder. Normally, it is 262.6.2 in one vertical scanning period as shown in FIG. 2A.
While the horizontal scanning signal of 5H is provided, the head drum rotation speed is increased to 31
It has a horizontal scanning signal of 5H and compresses and records the effective signal portion S. By doing so, the same image pickup signal can be recorded even if the configuration of the head drum is different.

Here, in the standard scanning and the high-speed scanning, even if the image pickup signals to be recorded are the same, the effective of the first and second fields in the one frame image is composed of the first and second fields. The blanking period between the signal parts is 52.5H longer in the high speed scan than in the standard scan as shown in FIG.
As shown in FIG. 3, the first horizontal scanning line of the second field is the 263rd line in the standard scanning, but is different from the 316th line in the high speed scanning. Therefore, for example, as shown in FIG. 3, the scanning start point in the first horizontal scanning line is Z ₀ , and the crystal defect Z ₁ is the third pixel horizontally from the reference point Z ₀ and the fourth pixel vertically. , Then the ROM (2
The data of this crystal defect Z ₁ when it is stored in (0) becomes (264th line, third in the horizontal direction) in the standard scan and (317th line, third in the horizontal direction) in the high-speed scan. It becomes data.

This embodiment deals with the difference in the crystal defect data due to the difference in the scanning speed, and the noise removing circuit is configured in the same manner as in the above-described FIG. 1 example, and the first storage area () of the ROM (20) ( 20
The crystal defect data for standard scanning is stored in a), and the second
Data of crystal defects for high-speed scanning is stored in the storage area (20b). Then, as in the case of the above-mentioned FIG. 1, the readable storage area is switched by switching the switching switch (23), and the scanning system circuit (15) is opened and closed by opening and closing the switching switch (22).
It is assumed that the scanning of is switched between standard scanning and high-speed scanning.

As described above, when the CCD (10) is used as an image pickup device of a video camera for a video tape recorder that performs standard scanning, the open / close switch (22) is closed to perform standard scanning. At the same time, the movable contact (23a) of the switching switch (23) is connected to one fixed contact (23b) so that standard scan-like data can be read, and noise due to crystal defects in standard scan can be removed. It Further, when the CCD (10) is used as an image pickup device of a video camera for a video tape recorder which performs high-speed scanning, the open / close switch (22) is opened to perform high-speed scanning, and a switching switch (23) is also provided. Moving contact (23
By connecting the other fixed contact (23c) to (a) so that the data for high speed scanning can be read, noise removal due to crystal defects in high speed scanning can be performed.

In this way, by switching the switches (22) and (23), noise removal for both standard scanning and high-speed scanning can be performed by a single memory ROM.
You can do it in (20). Therefore, only one type of ROM (20) is required when two types of noise elimination circuits for standard scanning and high-speed scanning are required. Also in the second embodiment, the same operation and effect as those of the first embodiment can be obtained.

The present invention is not limited to the above-described first and second embodiments,
It goes without saying that various other configurations can be adopted without departing from the gist of the present invention.

EFFECT OF THE INVENTION According to the noise elimination circuit of the solid-state imaging device of the present invention, the crystal defect position information of a plurality of modes stored in the memory is selected and output by the selection means, so that noise elimination by a plurality of modes is performed. The data of the crystal defect position information required for can be obtained in one memory according to the noise removal mode, and the memory can be reduced and made common compared to the conventional noise removal circuit that requires a memory for each noise removal mode. There is an advantage that the cost required for noise reduction is reduced.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing a first embodiment of a noise elimination circuit of a solid-state image pickup device of the present invention, FIGS. 2 and 3 are diagrams for explaining the second embodiment, respectively, and FIG. , FIG. 5, FIG.
FIG. 8 and FIG. 9 are diagrams for explaining the noise elimination circuit of the conventional solid-state imaging device, respectively, and FIG. 6 is a configuration diagram of the noise elimination circuit of the conventional solid-state imaging device. (10) is a CCD, (15) is a scanning system circuit, (20) is a ROM, (20
a) is the first storage area, (20b) is the second storage area, and (2
2) is an opening / closing switch, and (23) is a switching switch.

Claims (1)

[Claims] 1. A solid-state imaging device comprising a semiconductor device and a memory for storing crystal defect positions of the semiconductor device, wherein the output signal of the memory corrects the imaging output signal of the solid-state imaging device. In a noise elimination circuit of a solid-state imaging device for eliminating noise due to crystal defects, the memory is divided into a first memory area and a second memory area, and the first memory area is used. As the crystal defect position information to be stored in, the data is encoded as coordinate position data for each crystal defect corresponding to the reading order from the solid-state image sensor in the first mode, and is stored in the second storage area. As the crystal defect position information to be generated, data encoded as coordinate position data for each crystal defect corresponding to the reading order from the solid-state imaging device in the second mode, Corresponding to the selection of the first or second read mode from the image sensor, the crystal defect position information read from the memory is stored in either the first storage area or the second storage area. A noise elimination circuit for a solid-state imaging device, characterized in that selection means for selecting is provided.