JPS6217908B2 - - Google Patents
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- Publication number
- JPS6217908B2 JPS6217908B2 JP10608379A JP10608379A JPS6217908B2 JP S6217908 B2 JPS6217908 B2 JP S6217908B2 JP 10608379 A JP10608379 A JP 10608379A JP 10608379 A JP10608379 A JP 10608379A JP S6217908 B2 JPS6217908 B2 JP S6217908B2
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- JP
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- Prior art keywords
- circuit
- signal
- output
- detection
- level
- Prior art date
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- 238000001514 detection method Methods 0.000 claims description 34
- 239000011159 matrix material Substances 0.000 claims description 11
- 238000010586 diagram Methods 0.000 description 13
- 238000000034 method Methods 0.000 description 8
- 238000000926 separation method Methods 0.000 description 6
- 230000005540 biological transmission Effects 0.000 description 4
- 230000003321 amplification Effects 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 230000007423 decrease Effects 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04H—BROADCAST COMMUNICATION
- H04H20/00—Arrangements for broadcast or for distribution combined with broadcast
- H04H20/86—Arrangements characterised by the broadcast information itself
- H04H20/88—Stereophonic broadcast systems
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Stereo-Broadcasting Methods (AREA)
Description
【発明の詳細な説明】
本発明はAMステレオ放送の一方式である
Belar方式、Magnavox方式Motorola方式のAMス
テレオ復調回路に関するものである。[Detailed Description of the Invention] The present invention is a method of AM stereo broadcasting.
This relates to AM stereo demodulation circuits for the Belar system, Magnavox system, and Motorola system.
第１図、第２図に和信号（以後Ｌ＋Ｒと呼ぶ）
をAM、差信号（以後Ｌ−Ｒと呼ぶ）をFMして
送信するBelar方式（以後AM−FM方式と呼ぶ）
の基本的な送信ブロツク図および復調ブロツク図
を示す。まず第１図により送信部を説明する。マ
トリツクス回路４の入力端子５，６にはステレオ
信号の左信号（以後Ｌ信号と呼ぶ）右信号（以後
Ｒ信号と呼ぶ）が入力し、該マトリツクス回路４
によつて出力端子７，８には、それぞれ（Ｌ−
Ｒ）信号、（Ｌ＋Ｒ）信号が出力する。（Ｌ−Ｒ）
信号はブリエンフアシス回路３を介して周波数変
調回路２に入力し、搬送波発振器１によつて発生
した搬送波信号を周波数変調する。周波数変調さ
れた搬送波信号はつぎに振幅変調回路９に入力
し、（Ｌ＋Ｒ）信号により振幅変調される。以上
の様にBelar方式では搬送波信号を（Ｌ−Ｒ）信
号で周波数変調、（Ｌ＋Ｒ）信号で振幅変調する
方式である。 Figures 1 and 2 show the sum signal (hereinafter referred to as L+R)
Belar method (hereinafter referred to as AM-FM method) in which the difference signal (hereinafter referred to as L-R) is transmitted as AM and FM (hereinafter referred to as AM-FM method)
The basic transmission block diagram and demodulation block diagram are shown. First, the transmitter will be explained with reference to FIG. A left signal (hereinafter referred to as an L signal) and a right signal (hereinafter referred to as an R signal) of a stereo signal are input to the input terminals 5 and 6 of the matrix circuit 4.
As a result, the output terminals 7 and 8 each have (L-
R) signal and (L+R) signal are output. (L-R)
The signal is inputted to the frequency modulation circuit 2 via the preamplification circuit 3, which frequency modulates the carrier signal generated by the carrier wave oscillator 1. The frequency modulated carrier wave signal is then input to the amplitude modulation circuit 9, where it is amplitude modulated by the (L+R) signal. As described above, the Belar system is a system in which a carrier signal is frequency-modulated using the (L-R) signal and amplitude-modulated using the (L+R) signal.
つぎに第２図によつて受信および復調方法を説
明する。 Next, the reception and demodulation method will be explained with reference to FIG.
ステレオ送信信号は高周波増幅回路１０、中間
周波増幅回路１１を介して中間周波数に変換され
る。中間周波数に変換されたステレオ信号は、一
方はAM検波回路１２によつて（Ｌ＋Ｒ）信号に
復調される。他方振幅制限回路１３により（Ｌ＋
Ｒ）信号のAM分を取り去り（Ｌ−Ｒ）信号で変
調されたFM信号だけとし、この信号をFM検波
回路１４によりFM検波を行い（Ｌ−Ｒ）を取り
出す。この（Ｌ−Ｒ）信号は送信時にプリエンフ
アシスされており、補正するためにデイエンフア
シス回路１５を介して出力される。つぎにそれぞ
れ検波された変調信号（Ｌ−Ｒ）、（Ｌ＋Ｒ）信号
はマトリツクス回路１６によつてＬ信号、Ｒ信号
に分離しステレオ復調を行う。 The stereo transmission signal is converted to an intermediate frequency via a high frequency amplifier circuit 10 and an intermediate frequency amplifier circuit 11. One of the stereo signals converted to the intermediate frequency is demodulated into an (L+R) signal by the AM detection circuit 12. On the other hand, the amplitude limiting circuit 13 causes (L+
R) The AM component of the signal is removed to leave only the FM signal modulated by the (LR) signal, and this signal is subjected to FM detection by the FM detection circuit 14 to extract (LR). This (LR) signal is pre-emphasized at the time of transmission, and is output via the de-emphasis circuit 15 for correction. Next, the detected modulated signals (L-R) and (L+R) signals are separated into L and R signals by a matrix circuit 16, and stereo demodulation is performed.
第３図、第４図に（Ｌ−Ｒ）信号を位相変調
（PM）する方式の送信ブロツク図、復調ブロツク
図を示す。 FIGS. 3 and 4 show a transmission block diagram and a demodulation block diagram of a system in which the (LR) signal is subjected to phase modulation (PM).
第１図、第２図で示したAM−FM方式との差
異は、第１図の周波数変調回路２が第３図では位
相変調回路１９になりプリエンフアシス回路３が
ない。第２図、第４図での受信ブロツク図での差
異は、第２図のFM検波回路１４が第４図では
PM検波回路２０になり、デイエンフアシス回路
１５がないことである。 The difference from the AM-FM system shown in FIGS. 1 and 2 is that the frequency modulation circuit 2 in FIG. 1 is replaced with a phase modulation circuit 19 in FIG. 3, and there is no pre-emphasis circuit 3. The difference between the reception block diagrams in Figures 2 and 4 is that the FM detection circuit 14 in Figure 2 is different from that in Figure 4.
The main difference is that the PM detection circuit 20 is used, and the de-emphasis circuit 15 is not provided.
他のブロツクは同一で、システムの動作はAM
−FM方式と同様である。いま、両方式でステレ
オ復調を行つた場合に問題になるのは左・右の分
離度である。一般にAM検波（Ｌ＋Ｒ信号の検
波）の場合、第５図に示す様にAM検波回路１２
の出力を低域漏波器２１に接続し、該低域漏波器
２１の出力で高周波増幅回路１０、中間周波増幅
回路１１に帰還をかけるAGC回路が用いられる
ため、入力レベル対出力レベルは第６図中２２の
特性を示し、入力レベルが小さい時には直線的に
出力レベルは増加するが、ある値になるとAGC
動作が作動し出力レベルは飽和する。しかし飽和
レベルは完全に一定にならず、入力レベルと共に
徐々に増加して行く。 All other blocks are identical and the system operates in AM.
-Same as FM method. Now, when performing stereo demodulation using both methods, the problem is the degree of separation between left and right. Generally, in the case of AM detection (detection of L+R signals), the AM detection circuit 12
Since an AGC circuit is used which connects the output of the low frequency leaker 21 to the low frequency leaker 21 and applies feedback to the high frequency amplifier circuit 10 and the intermediate frequency amplifier circuit 11 with the output of the low frequency leaker 21, the input level vs. output level is It shows the characteristic 22 in Figure 6, and when the input level is small, the output level increases linearly, but when it reaches a certain value, the AGC
The operation is activated and the output level is saturated. However, the saturation level is not completely constant and gradually increases with the input level.
一方FM検波またはPM検波の場合は第６図中
２３で示す様に、AM成分を除去するために、振
幅制限回路１３の利得を大きくし、入力レベルが
小さい時から出力レベルを一定にする。 On the other hand, in the case of FM detection or PM detection, as shown at 23 in FIG. 6, in order to remove the AM component, the gain of the amplitude limiting circuit 13 is increased and the output level is kept constant even when the input level is small.
ゆえに上述した様にAM検波とFMおよびPM検
波の入．出力特性は異り、検波された信号（Ｌ＋
Ｒ）、（Ｌ−Ｒ）信号の振幅レベル差があるため、
マトリツクス回路１６でＬ信号、Ｒ信号に分離す
る際、弱入力レベル時、強入力レベル時に分離度
が劣化するという問題が生じる。 Therefore, as mentioned above, AM detection and FM and PM detection are required. The output characteristics are different, and the detected signal (L+
Since there is a difference in the amplitude level of the R) and (L-R) signals,
When the matrix circuit 16 separates the signals into L and R signals, a problem arises in that the degree of separation deteriorates when the input level is weak or when the input level is strong.
本発明の目的は、上記した信号入力レベルが弱
入力時および強入力時に分離度が劣化するという
欠点を軽減するAM−FM方式、AM−PM方式の
ステレオ復調回路を提供するにある。 SUMMARY OF THE INVENTION An object of the present invention is to provide a stereo demodulation circuit for the AM-FM system and the AM-PM system, which alleviates the above-described drawback that the degree of separation deteriorates when the signal input level is weak or strong.
本発明の要点はAM検波に使用しているAGC回
路の低域漏波器出力でAM検波部の出力レベルを
制御する。つまりAM検波後、差動型の利得制御
回路で増幅するが、この時AGC回路の出力によ
り差動増幅器のコレクタ電流を制御し、利得およ
び振幅を可変して、FM検波の入―出力特性と一
致させるようにした点にある。 The key point of the present invention is to control the output level of the AM detection section using the low frequency leaker output of the AGC circuit used for AM detection. In other words, after AM detection, it is amplified by a differential gain control circuit, but at this time, the output of the AGC circuit controls the collector current of the differential amplifier, varying the gain and amplitude, and adjusting the input-output characteristics of FM detection. The point is that we tried to make them match.
以下、本発明の実施例を図面に基づいて説明す
る。 Embodiments of the present invention will be described below based on the drawings.
第７図により本発明の基本的構成および動作を
説明する。AM検波により（Ｌ＋Ｒ）信号を、
FM検波またはPM検波によつて（Ｌ−Ｒ）信号
を取り出しマトリツクス回路１６にてＬ信号、Ｒ
信号に分離するシステムの動作は第２図、第４
図、第５図の従来回路で説明したものと同様であ
る。ここではAM−FM方式復調回路の制御方法
を説明する。もちろんAM−PM方式でも同一で
ある。 The basic configuration and operation of the present invention will be explained with reference to FIG. (L+R) signal by AM detection,
The (L-R) signal is extracted by FM detection or PM detection, and the L signal and R signal are extracted by the matrix circuit 16.
The operation of the system that separates signals is shown in Figures 2 and 4.
This circuit is similar to that described in connection with the conventional circuit shown in FIGS. Here, a method of controlling the AM-FM demodulation circuit will be explained. Of course, the same applies to the AM-PM system.
該AM検波回路１２の出力は、利得制御回路２
４を介して該マトリツクス回路１６に入力される
と共に、該低域漏波器２１に入力される。該低域
漏波器２１は、上記検波出力のレベルに応じた直
流電圧を発生する。該低域漏波器２１の出力は、
該高周波増幅回路１０および該中間周波増幅回路
１１に帰還され、入力レベルが大きくなつた場合
でも出力レベルを一定にするAGC回路の制御電
圧となるとともに、AM検波された（Ｌ＋Ｒ）信
号を増幅する該利得制御回路２４の利得を制御す
る制御電圧としても用いられる。 The output of the AM detection circuit 12 is transmitted to the gain control circuit 2.
4 to the matrix circuit 16 and also to the low frequency leaker 21. The low frequency leaker 21 generates a DC voltage according to the level of the detected output. The output of the low frequency leaker 21 is
It is fed back to the high frequency amplifier circuit 10 and the intermediate frequency amplifier circuit 11, and serves as a control voltage for the AGC circuit that keeps the output level constant even when the input level increases, and also amplifies the AM detected (L+R) signal. It is also used as a control voltage to control the gain of the gain control circuit 24.
この制御電圧は第６図中曲線２２で示した（Ｌ
＋Ｒ）信号と比例した値になる。 This control voltage is shown by curve 22 in FIG.
+R) The value is proportional to the signal.
ここで該利得制御回路２４は制御電圧（つま
り、（Ｌ＋Ｒ）信号）と逆特性を示すものとする
必要がある。ゆえに該利得制御回路２４の入力は
第６図中２２の（Ｌ＋Ｒ）信号であるが、その制
御された出力レベルはANT入力レベルに対して
一定となり、この一定レベル値を第６図中曲線２
３で示した（Ｌ−Ｒ）信号レベルのレベル値と等
しくなるように調整すれば、ANT入力レベルに
対して常に（Ｌ＋Ｒ）＝（Ｌ−Ｒ）となり、該マト
リツクス回路１６の出力端子１７，１８での分離
度もANT入力レベルに依存することなく一定に
保つことができる。 Here, the gain control circuit 24 needs to exhibit characteristics opposite to the control voltage (that is, the (L+R) signal). Therefore, the input of the gain control circuit 24 is the (L+R) signal 22 in FIG. 6, but its controlled output level is constant with respect to the ANT input level, and this constant level value is expressed as curve 2 in FIG.
If the signal level is adjusted to be equal to the level value of the (L-R) signal level shown in 3, (L+R)=(L-R) will always hold for the ANT input level, and the output terminals 17, 17 of the matrix circuit 16, The degree of separation at 18 can also be kept constant without depending on the ANT input level.
つぎに該利得制御回路２４の具体的な実施例
を、第８図に示して説明する。入力端子４９には
中間周波数に変換されたステレオ信号が入力す
る。ステレオ信号は該AM検波回路１２により
（Ｌ＋Ｒ）信号に、また該振幅制限回路１３、該
FM検波回路１４および該デイエンフアシス回路
１５により（Ｌ−Ｒ）信号に検波される。上述の
該AM検波回路１２の後に本発明の該利得制御回
路２４が接続されるが、その構成はトランジスタ
２５，２６で第１の差動増幅回路４１を構成し、
その共通エミツタは定電流源３５に接続される。
該トランジスタ２６のベースは可変電圧源３４に
接続され、また該トランジスタ２５のベースは該
AM検波回路１２で検波された（Ｌ＋Ｒ）信号を
整流して制御電圧を発生する該低域漏波器２１の
出力と接続される。 Next, a specific embodiment of the gain control circuit 24 will be described with reference to FIG. A stereo signal converted to an intermediate frequency is input to the input terminal 49. The stereo signal is converted into an (L+R) signal by the AM detection circuit 12, and the amplitude limiting circuit 13 converts the stereo signal into an (L+R) signal.
The signal is detected by the FM detection circuit 14 and the de-emphasis circuit 15 into an (LR) signal. The gain control circuit 24 of the present invention is connected after the AM detection circuit 12 described above, and its configuration includes transistors 25 and 26 forming a first differential amplifier circuit 41,
Its common emitter is connected to a constant current source 35.
The base of the transistor 26 is connected to the variable voltage source 34, and the base of the transistor 25 is connected to the variable voltage source 34.
It is connected to the output of the low frequency leaker 21 which rectifies the (L+R) signal detected by the AM detection circuit 12 and generates a control voltage.
該トランジスタ２５のコレクタは電圧源３６に
接続され、一方該トランジスタ２６のコレクタは
該第２の差動増幅回路４２を構成するトランジス
タ２７，２８の共通エミツタと接続される。該ト
ランジスタ２７，２８のベースはそれぞれ抵抗３
１，３２を介して電圧源３３に接続され該トラン
ジスタ２７のベースは該AM検波回路１２の出力
と接続される。それぞれのコレクタは負荷抵抗２
９，３０を介して電圧源３６に接続され、該トラ
ンジスタ２８のコレクタは抵抗３９，４０に接続
される。そして、該抵抗３９，４０は、該デイエ
ンフアシス回路１５およびインバータ回路４３の
出力にそれぞれ接続された抵抗３８，３７と共に
該マトリツクス回路１６を構成する。 The collector of the transistor 25 is connected to a voltage source 36, while the collector of the transistor 26 is connected to the common emitters of transistors 27 and 28 constituting the second differential amplifier circuit 42. The bases of the transistors 27 and 28 are connected to a resistor 3, respectively.
1 and 32 to a voltage source 33, and the base of the transistor 27 is connected to the output of the AM detection circuit 12. Each collector has a load resistance of 2
The collector of the transistor 28 is connected to resistors 39, 40. The resistors 39 and 40 constitute the matrix circuit 16 together with the resistors 38 and 37 connected to the outputs of the de-emphasis circuit 15 and the inverter circuit 43, respectively.
以上該利得制御回路２４の構成を述べて来た
が、つぎに動作について、第９図の制御電圧特性
４４、差動増幅回路特性４５、その出力特性４
６、および該利得制御回路２４の出力特性４８の
関係図を用いながら説明する。 The configuration of the gain control circuit 24 has been described above. Next, regarding the operation, the control voltage characteristics 44, the differential amplifier circuit characteristics 45, and the output characteristics 4 of FIG.
6 and the output characteristic 48 of the gain control circuit 24.
周知のごとく、定電流源３５の電流をIoとすれ
ば、該トランジスタ２６のコレクタ電流は第９図
中曲線４５で示すように変化する。ここで、該ト
ランジスタ２５のベースには該低域漏波器２１が
接続されており、該低域漏波器２１のANT入力
レベル対直流電圧特性は、第９図中の曲線４４で
示すごとく該AM検波出力レベルと比例してい
る。そこで該トランジスタ２５のベースへ入力す
る制御電圧に対して該第１の差動増幅回路４１が
直線的に変化するように任意のANT入力レベル
の点（第９図中のＡ点）を調整点とし、その調整
点での制御電圧、つまり該トランジスタ２５のベ
ース電圧をV1とすれば、該トランジスタ２６の
ベース電圧V2がV1＝V2となるように該可変電圧
源３４を調整する。 As is well known, if the current of the constant current source 35 is Io, the collector current of the transistor 26 changes as shown by a curve 45 in FIG. Here, the low frequency leaker 21 is connected to the base of the transistor 25, and the ANT input level versus DC voltage characteristic of the low frequency leaker 21 is as shown by curve 44 in FIG. It is proportional to the AM detection output level. Therefore, an arbitrary ANT input level point (point A in FIG. 9) is adjusted so that the first differential amplifier circuit 41 changes linearly with respect to the control voltage input to the base of the transistor 25. If the control voltage at that adjustment point, that is, the base voltage of the transistor 25, is V1 , then the variable voltage source 34 is adjusted so that the base voltage V2 of the transistor 26 becomes V1 = V2 . .
該制御電圧が上記の調整点V1より低下してV1
＜V2となれば、該トランジスタ２６のコレクタ
電流、すなわち該第２の差動増幅回路４２に流れ
るコレクタ電流は増加し、該第２の差動増幅回路
４２の出力振幅も増加する。逆にV1＞V2となれ
ば出力振幅は減少する。このように、曲線４４で
あらわされる制御電圧に対して、該第２の差動増
幅回路４２の振幅は、第９図中の曲線４６のよう
に反比例して変化する。 The control voltage decreases below the above adjustment point V 1 to V 1
<V 2 , the collector current of the transistor 26, that is, the collector current flowing to the second differential amplifier circuit 42 increases, and the output amplitude of the second differential amplifier circuit 42 also increases. Conversely, when V 1 >V 2 , the output amplitude decreases. In this way, the amplitude of the second differential amplifier circuit 42 changes in inverse proportion to the control voltage represented by the curve 44, as shown by the curve 46 in FIG.
なお、上記の説明では、該第２の差動増幅回路
４２のベースには一定レベルの信号が入力したと
仮定したが、実際には第９図中の曲線４７で示し
たように、ANT入力レベルで変化する（Ｌ＋
Ｒ）信号が入力されるため、該利得制御回路２４
の（Ｌ＋Ｒ）信号出力は、第９図中に曲線４８で
示したようにANT入力レベルに対して一定とな
る。一方（Ｌ−Ｒ）信号は、第６図中に曲線２３
で示したように、ANT入力レベルに対して一定
であるため、（Ｌ＋Ｒ）＝（Ｌ−Ｒ）となる。もち
ろん、この時（Ｌ＋Ｒ）信号レベルは（Ｌ−Ｒ）
信号レベルと等しくなるように該第１の差動増幅
回路４１の定電流量Ioは定めておかなければなら
ない。 In the above explanation, it is assumed that a constant level signal is input to the base of the second differential amplifier circuit 42, but in reality, as shown by the curve 47 in FIG. Changes depending on the level (L+
R) Since the signal is input, the gain control circuit 24
The (L+R) signal output is constant with respect to the ANT input level, as shown by curve 48 in FIG. On the other hand, the (LR) signal is curve 23 in FIG.
As shown, since it is constant with respect to the ANT input level, (L+R)=(LR). Of course, at this time, the (L+R) signal level is (L-R)
The constant current amount Io of the first differential amplifier circuit 41 must be determined so as to be equal to the signal level.
このように構成することにより、該マトリツク
ス回路１６へ入力される３つの信号（Ｌ＋Ｒ）、
（Ｌ−Ｒ）、−（Ｌ−Ｒ）の振幅を、ANT入力レベ
ルに対して常に等しくなるように補償でき、該マ
トリツクス回路１６の出力端子１７，１８におけ
る出力信号の振幅レベル差に起因して生じる分離
度の劣化を補償することができ、ANT入力レベ
ルに依存することなく一定の値を保持することが
できる。 With this configuration, the three signals (L+R) input to the matrix circuit 16,
The amplitudes of (LR) and -(LR) can be compensated so that they are always equal to the ANT input level, and this is caused by the difference in the amplitude level of the output signals at the output terminals 17 and 18 of the matrix circuit 16. It is possible to compensate for the deterioration in the degree of separation that occurs due to the ANT input level, and it is possible to maintain a constant value without depending on the ANT input level.
以上述べて来たように（Ｌ＋Ｒ）信号の増幅度
を、該（Ｌ＋Ｒ）信号を整流した制御電圧で制御
することによつて、従来例で示した分離度が
ANT入力レベルで変化する欠点を改善すること
ができた。 As mentioned above, by controlling the amplification degree of the (L+R) signal with the control voltage obtained by rectifying the (L+R) signal, the degree of separation shown in the conventional example can be improved.
We were able to improve the drawback of changing with the ANT input level.
第１図、第２図はANステレオの一方式である
AM−FM方式の送・受信システムを示すブロツ
ク図、第３図、第４図はAM−PM方式の送・受
信システムを示すブロツク図、第５図はAM−
FM方式における受信回路の従来例のブロツク
図、第６図はAM検波、FM検波の一般的な入力
―出力特性を示した図、第７図はAM―FM方式
に本発明を適用した場合の基本的実施例のシステ
ムブロツク図、第８図はその一部の具体的な回路
例を示した図、第９図は第８図の回路動作を示す
各特性図である。
１０…高周波増幅回路、１１…中間周波増幅回
路、１２…AM検波回路、１３…振幅制限回路、
１４…FM検波回路、１６…マトリツクス回路、
２４…利得制御回路。
Figures 1 and 2 are one type of AN stereo.
A block diagram showing an AM-FM transmitting/receiving system. Figures 3 and 4 are block diagrams showing an AM-PM transmitting/receiving system. Figure 5 is an AM-FM transmitting/receiving system.
A block diagram of a conventional example of a receiver circuit in the FM system, Figure 6 is a diagram showing general input-output characteristics of AM detection and FM detection, and Figure 7 is a diagram showing the case where the present invention is applied to the AM-FM system. FIG. 8 is a system block diagram of the basic embodiment, FIG. 8 is a diagram showing a specific example of a part of the circuit, and FIG. 9 is a characteristic diagram showing the operation of the circuit shown in FIG. 10... High frequency amplification circuit, 11... Intermediate frequency amplification circuit, 12... AM detection circuit, 13... Amplitude limiting circuit,
14...FM detection circuit, 16...matrix circuit,
24...Gain control circuit.
Claims (1)
と、AM検波回路の出力を供給される低域漏波器
および利得制御回路と、受信ステレオ信号を供給
されるFMまたはPM検波回路と、利得制御回路
出力およびFMまたはPM検波回路出力を供給さ
れるマトリツクス回路とを具備し、低域漏波器の
出力に応じて利得制御回路の利得および振幅を制
御することを特徴とするAMステレオ復調回路。1 An AM detection circuit supplied with the received stereo signal, a low frequency leaker and gain control circuit supplied with the output of the AM detection circuit, an FM or PM detection circuit supplied with the received stereo signal, and a gain control circuit 1. An AM stereo demodulation circuit, comprising a matrix circuit supplied with an output and an FM or PM detection circuit output, and controlling the gain and amplitude of a gain control circuit according to the output of a low frequency leaker.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10608379A JPS5631244A (en) | 1979-08-22 | 1979-08-22 | Am stereo demodulating circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10608379A JPS5631244A (en) | 1979-08-22 | 1979-08-22 | Am stereo demodulating circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5631244A JPS5631244A (en) | 1981-03-30 |
| JPS6217908B2 true JPS6217908B2 (en) | 1987-04-20 |
Family
ID=14424662
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10608379A Granted JPS5631244A (en) | 1979-08-22 | 1979-08-22 | Am stereo demodulating circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5631244A (en) |
-
1979
- 1979-08-22 JP JP10608379A patent/JPS5631244A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5631244A (en) | 1981-03-30 |
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