JPS62173539A - In-circuit emulator - Google Patents

Abstract

PURPOSE:To attain simulation for the input/output of an input/output device set at a target side by using an emulation memory which emulates the input/ output port space of a user and a bus cycle counter. CONSTITUTION:The value of a time counter set previously by a user is preset to a bus cycle counter 6 by a host CPU 7. Then a stub function is started when a microprocessor 2 executes an instruction to output the data #phi1 to an output port A. Here the stub means a series of procedures to be carried out by a series of commands of a debug device. Thus the contents of the registered stub are carried out when the processor 2 gives an access to the relevant address instruction. Then the input/output data on an I/O can be produced even through no I/O exists actually. Thus the program of an I/O driver can be simulated.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an in-circuit emulator that can simulate a target system using an in-circuit method.

(Prior Art) Debugging devices that debug programs of target systems using an in-circuit method are well known. In one such debug device, if the target CPU and the CPU on the debug device side are different, the target CPU
An emulator that has functions that can allocate resources such as J registers, extract instructions from the target CPU, interpret their meaning, and perform operations corresponding to the meaning on the image of the target CPU. be.

However, with conventional emulators of this type, when debugging a program for input/output equipment (input/output is called 1710), it is difficult to use a CPU equipped with peripheral I10 equipment:
<Central Processing Unit) It was only possible to debug the I10 drive program after connecting to the board. Therefore, without the actual device, it is not possible to develop a program for ■10 drive, and this means that debugging of I10 software must be done after confirming the operation of the hardware, and the software development process is It depends on the wear and results in poor g1 firing efficiency.

In view of these points, the purpose of the present invention is to provide a practical solution! 1 without A
The aim is to provide an in-circuit emulator (2) that can debug programs for driving the 710.

(Means for Solving the Problems) In order to achieve such an object, the present invention provides an inner kit emulator that includes an emulation memory that can emulate the user's input/output port space, and an input/output port space for the user's input/output equipment. It has a pass cycle counter that can count the output time at the 191st bus cycle of the target microprocessor, and a function that can update the contents of the navigation emulation memory based on the contents of this pass cycle counter. The present invention is characterized in that it is equipped with a host CPU that performs necessary control, etc., and is capable of simulating input/output of input/output equipment on the target side.

(Example) The present invention will be described in detail below using the drawings. FIG. 1 is a block diagram showing an embodiment of an in-circuit emulator according to the present invention. In the figure, the part 1 surrounded by the dotted line is the target, but in this application it is not necessary to connect it because debugging can be performed without requiring the actual device. A target microprocessor (μP) 2 is provided in the debugging device and executes a program stored in the emulation memory 5.

3 is a memory in which active programs are stored. The active program is a program that runs when the microprocessor 2 performs an active operation (for example, displaying register contents, temporarily stopping microprocessor operation, etc.).

4 is an I10 emulation memory, which is a memory in which the input port and output port space of the knee 11 can be specified.

The I10 emulation memory 4 and the emulation memory 5 can also be read or written by the host C1 U7. A pass cycle counter 6 counts pass cycles of the microprocessor 2. The CP is used to preset the count 1 shift and read the count value.
It is accessible from the U7 side.

8 is a buffer, 9 is a bidirectional buffer, 10 is an address bus on the target microphone [1 setter 2 side], 11 is a data bus on the target microphone O setter 2 side, 1
2 is the address bus on the post CPU side, 13 is the host CPU
This is the data bus on the U side.

The operation in such a configuration will be explained next using a specific example as shown in FIG.

After placing data #1 in WRI at output port Δ, READ the data from input port B, and if the value is #, set the value of output port A to #. Here, input port B is set to 100 after output port △ is set to #1.
It is assumed that # is reached after the elapse of time m5.

In such a case, the user first specifies in advance a numerical value corresponding to the time counter value 100m5 using the keyboard input section (not shown) of the debugging device.

Host CPU 7 specifies an address via address bus 12 and buffer 8, and presets the value (here assumed to be 100 for convenience) in pass cycle counter 6 via data bus 13 and buffer 9.

The pass cycle (A) in the time chart in Figure 3 represents the operating state of the microprocessor.As shown in the figure, when microprocessor 2 executes an instruction to output data #1 to output port A, the stub function is activated. starts. A stub refers to a series of procedures based on a command string of a debugging device, and when the microprocessor 2 accesses the address instruction, the contents of the registered stub are executed. This stub can be set by the user, and when the bus cycle counter 1 reaches zero, it is stored in the ■/○ emulation memory 4.
A program with contents such as setting ``1'' is stored.

The bus cycle counter 6 is a down counter,
Each time the bus cycle clock shown in FIG. 3 (h) is given from the target microprocessor 2, it counts down, and as shown in FIG. 3 (h), the count value is 100,
99,98. ...and decreases. The count value is monitored by the host CPU 8, and when the count value reaches zero, the value in the I10 emulation memory 4 is rewritten to ``nono'' by an instruction in the stub.
After input port B outputs #1, ``+oomsm'' becomes #4r.

After outputting #1 to output port A, microprocessor 2 monitors the data at input port B, and when it reaches # (when 100 msl!) has passed, it changes output port 8 to #.

As described above, it is possible to generate Ilo input/output data without actually having Ilo, and thereby the I10 driver program can be simulated without the need for an actual machine equipped with I10 devices etc. be able to.

Note that there may be a small number of bus cycle counters 6, and the number of Ilo that can be allocated by the user can be specified as large as the number.

(Effects of the Invention) As explained above, according to the present invention, the I10 space is allocated to the emulation memory and operations similar to the real machine are possible, so it is possible to improve the efficiency of Ilo software development without using the real machine. can.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of an in-9-kit emulator according to the present invention, and FIGS. 2 and 3 are time charts for explaining the operation. 2... Microprocessor, 3... Active program memory, 4... I10 emulation memory, 5... Emulation memory, 6... Passnacle counter, 7... Host CPU, 8...・
・Buffer, 9... Bidirectional buffer, 10.12...
・Address bus, 11.13...data bus.

Claims (1)

[Claims] An in-circuit emulator capable of debugging a target program using an in-circuit method includes an emulation memory capable of emulating a user's input/output port space, and an input/output time of the user's input/output device. It has a bus cycle counter that can count in units of bus cycles of the target microprocessor, and a function that can rewrite the contents of the emulation memory based on the contents of this bus cycle counter, as well as controls necessary for debugging. An in-circuit emulator characterized in that it is equipped with a host CPU that performs an in-circuit emulator, and is capable of simulating input/output of input/output equipment on a target side.