JPS62173511A - Reset device for microprocessor - Google Patents

Reset device for microprocessor

Info

Publication number
JPS62173511A
JPS62173511A JP61015162A JP1516286A JPS62173511A JP S62173511 A JPS62173511 A JP S62173511A JP 61015162 A JP61015162 A JP 61015162A JP 1516286 A JP1516286 A JP 1516286A JP S62173511 A JPS62173511 A JP S62173511A
Authority
JP
Japan
Prior art keywords
circuit
microprocessor
reset
voltage
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61015162A
Other languages
Japanese (ja)
Inventor
Masahiko Kawasaki
昌彦 河崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Ecology Systems Co Ltd
Original Assignee
Matsushita Seiko Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Seiko Co Ltd filed Critical Matsushita Seiko Co Ltd
Priority to JP61015162A priority Critical patent/JPS62173511A/en
Publication of JPS62173511A publication Critical patent/JPS62173511A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To reset and restart a microprocessor in an automatic way by converting the signal received from an output port of a microprocessor into the voltage value by a pulse/voltage converting circuit and detecting a runaway by a voltage value discriminating circuit. CONSTITUTION:A microprocessor 1 contains a pulse generating means 1a and the reset terminal 1b of the processor 1 is connected to the output of a reset logic circuit 2 together with an output port 1c connected to the input of a pulse/voltage converting circuit 5. The output of the circuit 5 is connected to the circuit 2 via a voltage value deciding circuit 4. Then a power supply voltage detecting circuit 3 is connected to the circuit 2. Thus the circuit 3 detects the power supply voltage. When the processor 1 has a runaway, the signal received from the port 1c is converted into the voltage value by the circuit 5 and the circuit 4 detects the runaway. As a result, the processor 1 is automatically reset and restarted through the circuit 2.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、自動機等の制御に用いられるマイクロプロセ
ッサのリセット装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a reset device for a microprocessor used to control automatic machines and the like.

従来の技術 従来、この種のマイクロプロセッサのリセット装置は、
一般に第4図に示すようにマイクロプロセッサ11の電
源V。0に接続された抵抗器13aとコンデンサ13b
の直列回路から構成される電源電圧検知回路13のみで
構成されており、前記抵抗器13aとコンデンサ13b
の接続点(A点)をマイクロプロセッサ11のリセット
端子11aに接続していた。
Prior Art Conventionally, this type of microprocessor reset device is
Generally, as shown in FIG. 4, the power supply V of microprocessor 11. Resistor 13a and capacitor 13b connected to
The power supply voltage detection circuit 13 is composed of a series circuit of the resistor 13a and the capacitor 13b.
The connection point (point A) of the microprocessor 11 was connected to the reset terminal 11a of the microprocessor 11.

以上のように構成されたマイクロプロセッサのリセット
装置において、電源投入前はA点の電位は零であるが電
源電圧V。0が立ちあがると抵抗器13aとコンデンサ
13bの時定数によりA点の電位が上昇し電源投入後の
電源電圧■coの安定した状態で前記マイクロプロセッ
サ11のリセット端子の電位が上昇してこのマイクロプ
ロセッサ11は動作し始める。電源スィッチの切り離し
や停電等で電源電圧V。。が零になると、前記コンデン
サ13bの電位の下降とともにこのマイクロプロセッサ
11はリセットされ、動作しなくなる。
In the microprocessor reset device configured as described above, the potential at point A is zero before power is turned on, but the potential at point A is equal to the power supply voltage V. 0 rises, the potential at point A rises due to the time constant of the resistor 13a and capacitor 13b, and in a stable state of the power supply voltage co after the power is turned on, the potential at the reset terminal of the microprocessor 11 rises, and this microprocessor 11 starts working. Power supply voltage V due to disconnection of power switch or power outage. . When becomes zero, the potential of the capacitor 13b drops and the microprocessor 11 is reset and ceases to operate.

(たとえば文献;早用正春著、ワンチップマイコンの基
礎とその応用技術、CQ出版社、P171゜図9.1) 発明が解決しようとする問題点 このような従来の構成では、電源電圧の検知のみにてマ
イクロプロセッサのリセット信号の発生および解除を行
なっていたために、電源ラインのノイズ等によりマイク
ロプロセッサが暴走してしまった場合に自動的にマイク
ロプロセッサをリセット、再起動してやることが困難で
あった。本発明はこのような問題点を解決するもので、
電源電圧の検知のみならず、マイクロプロセッサの暴走
を検知して自動的にマイクロプロセッサをリセット、再
起動してやることを目的とするものである。
(For example, literature: Masaharu Hayause, Fundamentals of One-Chip Microcomputer and Its Application Technology, CQ Publishing, P171゜Figure 9.1) Problems to be Solved by the Invention In such a conventional configuration, it is difficult to detect the power supply voltage. Because the reset signal for the microprocessor was generated and released only by the controller, it was difficult to automatically reset and restart the microprocessor if it went out of control due to noise in the power line, etc. Ta. The present invention solves these problems,
The purpose is not only to detect the power supply voltage, but also to detect runaway of the microprocessor and automatically reset and restart the microprocessor.

問題点を解決するだめの手段 この問題点を解決するために本発明は、マイクロプロセ
ッサの出力ポートに接続したパルス−電圧変換回路と、
このパルス−電圧変換回路に接続した電圧値判別回路の
信号と電源電圧検知回路の信号とを受け、前記マイクロ
プロセッサのリセット端子に接続されてリセット信号を
送るリセット論理回路とよりマイクロプロセッサのリセ
ット装置を構成したものである。
Means for Solving the Problem In order to solve this problem, the present invention provides a pulse-to-voltage conversion circuit connected to the output port of the microprocessor;
A reset logic circuit that receives a signal from a voltage value discrimination circuit connected to this pulse-voltage conversion circuit and a signal from a power supply voltage detection circuit, and is connected to a reset terminal of the microprocessor and sends a reset signal, and a reset device for the microprocessor. It is composed of

作  用 この構成により、電源電圧検知回路で電源電圧の検知を
行なうとともに、マイクロプロセッサの暴走時には、マ
イクロプロセッサの出力ポートから送られてくる信号を
パルス−電圧変換回路が電圧値に変換し、電圧値判別回
路が暴走を検知し、リセット論理回路によりマイクロプ
ロセッサを自動的にリセット、再起動させることとなる
With this configuration, the power supply voltage detection circuit detects the power supply voltage, and when the microprocessor goes out of control, the pulse-voltage conversion circuit converts the signal sent from the output port of the microprocessor into a voltage value, and the voltage The value discrimination circuit detects the runaway, and the reset logic circuit automatically resets and restarts the microprocessor.

実施例 以下本発明の一実施例を第1図〜第3図にもとづき説明
する。図において1はパルス発生手段1aを内蔵したマ
イクロプロセッサであり、このマイクロプロセッサ1の
一一デーーツリセット端子1bにリセット論理回路2の
出力(E点)を接続し、出カポ−)1cにはパルス−電
圧変換回路6の入力(F点)を接続し、このパルス−電
圧変換回路5の出力を電圧値判別回路4の入力へ接続し
て、前記リセット論理回路20入力へこの電圧値判別回
路4の出力(B点と0点)と電源電圧検知回路3を接続
する。
EXAMPLE An example of the present invention will be described below with reference to FIGS. 1 to 3. In the figure, 1 is a microprocessor with a built-in pulse generating means 1a, and the output (point E) of the reset logic circuit 2 is connected to the date reset terminal 1b of this microprocessor 1. The input (point F) of the pulse-voltage conversion circuit 6 is connected, the output of this pulse-voltage conversion circuit 5 is connected to the input of the voltage value discrimination circuit 4, and the voltage value discrimination circuit is connected to the input of the reset logic circuit 20. 4 (point B and point 0) and the power supply voltage detection circuit 3 are connected.

前記リセット論理回路2は、たとえば第2図のようなエ
クスクル−シブオア2aと、単安定マルチ2bと、アン
ド2Cかもなる論理回路である。
The reset logic circuit 2 is, for example, a logic circuit including an exclusive OR 2a, a monostable multi 2b, and an AND 2C as shown in FIG.

この単安定マルチ2bの出力をD点とする。前記電源電
圧検知回路3は従来例と同様に抵抗器3aと、コンデン
サ3bの直列回路であり、この抵抗器3aとコンデンサ
3bの接続点(A点)を出力とし前記リセット論理回路
へ接続する。前記電圧値判別回路4は、たとえば第2図
のようなツェナーダイオード4aと、抵抗器+e、4f
の直列回路と、この各接続点から分岐するトランジスタ
4a、4gのペース回路と、コレクタ回路からなる。こ
のトランジスタ4cは、前記ツェナーダイオード4aと
抵抗器4eの接続点から抵抗器4bを通して分岐したペ
ース回路と、コレクタ側に抵抗器4dを接続したエミッ
タ接地回路を有している。また、トランジスタ4qは、
前記抵抗器4eと4fの接続点にベースを接続したペー
ス回路と、コレクタ側に抵抗器4hを接続したエミッタ
接地回路を有している。前記ツェナーダイオード4aの
他端は、この電圧値判別回路4の入力として、前記パル
スー電圧変換回路5の出力が接続され一抵抗器4d、4
hの他端は電源vccへ接続されている。前記パルス−
電圧変換回路6は、たとえばトランジスタ5aとコイル
6bと、コンデンサ6Cの直列回路であり、直流電源v
ccに対しコレクタを接続しエミッタとこのコイル6b
、コイル5bの他端とコンデンサ6Cを接続し、このコ
ンデンサ6Cの他端は接地されている。このコンデンサ
6Cとコイル6bの接続点を出力とする。前記トランジ
スタ5aのペースは、パルス−電圧変換回路の入力(F
点)としてマイクロプロセッサ1の出力ポートに接続さ
れている。
The output of this monostable multi 2b is designated as point D. The power supply voltage detection circuit 3 is a series circuit of a resistor 3a and a capacitor 3b as in the conventional example, and the connection point (point A) between the resistor 3a and the capacitor 3b is used as an output and connected to the reset logic circuit. The voltage value discrimination circuit 4 includes, for example, a Zener diode 4a as shown in FIG. 2, and resistors +e, 4f.
It consists of a series circuit of , a pace circuit of transistors 4a and 4g branching from each connection point, and a collector circuit. This transistor 4c has a pace circuit branched from a connection point between the Zener diode 4a and the resistor 4e through a resistor 4b, and a grounded emitter circuit having a resistor 4d connected to the collector side. Further, the transistor 4q is
It has a pace circuit whose base is connected to the connection point of the resistors 4e and 4f, and an emitter grounded circuit whose collector side is connected to the resistor 4h. The other end of the Zener diode 4a is connected to the output of the pulse-voltage conversion circuit 5 as an input to the voltage value discrimination circuit 4, and is connected to one resistor 4d, 4.
The other end of h is connected to the power supply vcc. The pulse-
The voltage conversion circuit 6 is, for example, a series circuit of a transistor 5a, a coil 6b, and a capacitor 6C, and has a DC power supply v.
Connect the collector to cc and connect the emitter and this coil 6b
, the other end of the coil 5b is connected to a capacitor 6C, and the other end of the capacitor 6C is grounded. The connection point between the capacitor 6C and the coil 6b is used as an output. The pace of the transistor 5a is determined by the input (F) of the pulse-voltage conversion circuit.
It is connected to the output port of the microprocessor 1 as a point).

上記構成において、電源投入前は、A、  B、  C
In the above configuration, A, B, C before power is turned on.
.

D、  E、  F点の電位は零であるが、電源投入後
、A点の電位は抵抗器3aとコンデンサ3bの時定数に
より時間t1 だけおくれてV。Cと同電位に達し、D
点の電位はvccと同電位になりリセット論理回路の出
力E点をV と同電位にし、マイクロC プロセッサ1は動作し始める。このマイクロプロセッサ
1はパルス発生手段1とによりパルス−電圧変換回路5
0入力F点に第3図に示すパルスを発生させる。このパ
ルス−電圧変換回路5は、F点に入力されたパルスによ
りトランジスタ5aをスイッチングさせコイル5bとコ
ンデンサ5Cのフィルタ回路で平滑し、このコンデンサ
5Cの端子間電圧に一定の電圧Va [:F点に入力さ
れるパルスの時比率により決定される電圧va=vcC
×トランジスタ6aが導通する時間/(トランジスタ5
aが導通する時間+トランジスタ5aが非導通である時
間)〕が発生する。電圧値判別回路4は、入力の電圧に
よりB点、0点の出力の組み合せが次の3通り起こりう
る。トランジスタ4Cが導通する電圧をv4o、トラン
ジスタ4qが導通する電圧を74gとすると、 1)va<v4oのとき、4c、4gともに非導通11
)■4C≦va<v4gノトキ、4 c ハ導通、  
4qは非導通 111)v4g≦vaノドき、4c、4gともに導通マ
イクロプロセッサが正常に動作しているときのvaが1
1)の条件を満たすように設定されていると、前記トラ
ンジスタ4cは導通し0点は零となり、トランジスタ4
qは非導通で6点はV。Cと同電位になり、前記リセッ
ト論理回路2の出力E点は、A点とB点と0点の電位の
組み合せのみにより、■ と同電位を保つことができ前
記マイクロプロC セッサ1は動作しつづけることとなる。
The potentials at points D, E, and F are zero, but after the power is turned on, the potential at point A becomes V after a time t1 delay due to the time constant of the resistor 3a and capacitor 3b. reaches the same potential as C, and D
The potential at the point becomes the same potential as vcc, making the output point E of the reset logic circuit the same potential as V, and the micro C processor 1 begins to operate. This microprocessor 1 includes a pulse generating means 1 and a pulse-voltage conversion circuit 5.
A pulse shown in FIG. 3 is generated at the 0 input F point. This pulse-voltage conversion circuit 5 switches a transistor 5a by a pulse inputted to a point F, smooths it by a filter circuit of a coil 5b and a capacitor 5C, and sets a constant voltage Va [: point F to the voltage between the terminals of this capacitor 5C. Voltage va=vcC determined by the duty ratio of pulses input to
×time for which transistor 6a is conductive/(transistor 5
(the time during which transistor 5a is conductive+the time during which transistor 5a is non-conductive)] occurs. In the voltage value discrimination circuit 4, the following three combinations of outputs at point B and point 0 can occur depending on the input voltage. Assuming that the voltage at which transistor 4C conducts is v4o and the voltage at which transistor 4q conducts is 74g, 1) When va<v4o, both 4c and 4g are non-conductive11
) ■4C≦va<v4gnotki, 4c c conduction,
4q is non-conductive 111) v4g≦va, 4c and 4g are both conductive and va is 1 when the microprocessor is operating normally.
When set to satisfy the condition 1), the transistor 4c becomes conductive and the 0 point becomes zero, and the transistor 4c becomes conductive.
q is non-conducting and 6 points are V. The output point E of the reset logic circuit 2 can be kept at the same potential as ① only by the combination of the potentials of points A, B, and 0, and the microprocessor C processor 1 operates. I will continue to do so.

次に、電源が瞬時停電した場合(以下瞬時停電とよぶ;
ごく短かく瞬間的に電源が零に瞬断され、また復帰する
)には、A点の電位が直ちに零になり、E点の電位も零
となり、マイクロプロセッサ1はリセットされ、電源電
圧の立ち上がりとともに電源投入時と同様にマイクロプ
ロセッサ1は再起動する。
Next, if there is a momentary power outage (hereinafter referred to as a momentary power outage);
When the power is momentarily cut off to zero and then restored again), the potential at point A immediately becomes zero, the potential at point E also becomes zero, the microprocessor 1 is reset, and the power supply voltage rises. At the same time, the microprocessor 1 is restarted in the same way as when the power is turned on.

マイクロプロセッサ1が外来ノイズ等により暴走した場
合には、トランジスタ6aが導通した状態のとき(暴走
と)と、トランジスタ5aが非導通の状態(暴走b)と
の2つの場合が考えられる。
When the microprocessor 1 goes out of control due to external noise or the like, there are two possible cases: the transistor 6a is in a conductive state (runaway), and the transistor 5a is in a non-conductive state (runaway b).

前者は、1ii)の場合であり、後者は、1)の場合で
ありどちらもB点と0点の電位が同時に等しくカリ、リ
セット論理回路2のエクスクル−シブオア2aの出力は
零となシ、単安定マルチ回路2bの出力り点は時間t2
だけ零電位となり、マイクロプロセッサ1を自動的にリ
セット再起動させる。
The former is the case of 1ii), and the latter is the case of 1). In both cases, the potentials of the B point and the 0 point are equal at the same time, and the output of the exclusive OR 2a of the reset logic circuit 2 is zero. The output point of the monostable multi-circuit 2b is at time t2
becomes zero potential, and the microprocessor 1 is automatically reset and restarted.

発明の効果 以上のように本発明によれば、マイクロプロセッサの出
力ポートに接続したパルス−電圧変換回路と、このパル
ス−電圧変換回路に接続した電圧値判別回路の信号と、
電源電圧検知回路の信号とを受け、前記マイクロプロセ
ッサへリセット信号を送るリセット論理回路を設ける。
Effects of the Invention As described above, according to the present invention, the signal of the pulse-voltage conversion circuit connected to the output port of the microprocessor, the voltage value discrimination circuit connected to this pulse-voltage conversion circuit,
A reset logic circuit is provided which receives the signal from the power supply voltage detection circuit and sends a reset signal to the microprocessor.

ことにより、電源電圧の検知のみならず、マイクロプロ
セッサの暴走を検知して自動的にマイクロプロセッサを
リセット、再起動させることができるという効果が得ら
れる。
As a result, it is possible to not only detect the power supply voltage but also detect runaway of the microprocessor and automatically reset and restart the microprocessor.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例によるマイクロプロセッサの
リセット装置のブロック図、第2図は同回路図、第3図
は同動作図、第4図は従来のマイクロプロセッサのリセ
ット装置の回路図である。 1・・・・・・マイクロプロセッサ、1b・・・・・・
リセット@A−1−1c・・・・・・出力ポート−2・
・・・・・リセット論理回路、3・・・・・・電源電圧
検知回路、4・・・・・・電圧値判別回路、6・・・・
・・パルス−電圧変換回路。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名4−
−−71207°Ot、/1 2−−−リたシト詰1r!(シμに 3−#:、源l町圧ま知目浴 4−−一電圧j!ヤj別回浴 5−−−へ゛ルス〜/を圧変$徊2δ、第4図
FIG. 1 is a block diagram of a microprocessor reset device according to an embodiment of the present invention, FIG. 2 is a circuit diagram of the same, FIG. 3 is an operational diagram of the same, and FIG. 4 is a circuit diagram of a conventional microprocessor reset device. It is. 1...Microprocessor, 1b...
Reset @A-1-1c...Output port-2.
... Reset logic circuit, 3 ... Power supply voltage detection circuit, 4 ... Voltage value discrimination circuit, 6 ...
...Pulse-voltage conversion circuit. Name of agent: Patent attorney Toshio Nakao and 1 other person 4-
--71207°Ot, /1 2---Reta Shitozume 1r! (3-# to μ: source l town pressure machime bath 4--one voltage j! Ya j separate bath 5---heel ~/ to pressure change $2δ, Fig. 4

Claims (1)

【特許請求の範囲】[Claims] マイクロプロセッサの出力ポートに接続したパルス−電
圧変換回路と、このパルス−電圧変換回路に接続した電
圧値判別回路の信号と電源電圧検知回路の信号とを受け
、前記マイクロプロセッサのリセット端子に接続されて
リセット信号を送るリセット論理回路とから構成される
マイクロプロセッサのリセット装置。
A pulse-to-voltage conversion circuit connected to an output port of the microprocessor, a signal from a voltage value discrimination circuit connected to the pulse-to-voltage conversion circuit, and a signal from a power supply voltage detection circuit, and connected to a reset terminal of the microprocessor. A microprocessor reset device consisting of a reset logic circuit that sends a reset signal.
JP61015162A 1986-01-27 1986-01-27 Reset device for microprocessor Pending JPS62173511A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61015162A JPS62173511A (en) 1986-01-27 1986-01-27 Reset device for microprocessor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61015162A JPS62173511A (en) 1986-01-27 1986-01-27 Reset device for microprocessor

Publications (1)

Publication Number Publication Date
JPS62173511A true JPS62173511A (en) 1987-07-30

Family

ID=11881106

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61015162A Pending JPS62173511A (en) 1986-01-27 1986-01-27 Reset device for microprocessor

Country Status (1)

Country Link
JP (1) JPS62173511A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01166115A (en) * 1987-12-22 1989-06-30 Matsushita Electric Works Ltd Resetting circuit for processor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01166115A (en) * 1987-12-22 1989-06-30 Matsushita Electric Works Ltd Resetting circuit for processor

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