JPS62169329A - Alignment method - Google Patents

Abstract

PURPOSE:To make alignment possible without decreasing throughput, by performing a measurement for a pattern part, determining a calculation formula based on measured data, and contarolling the step movement of a wafer. CONSTITUTION:When a wafer 1 has the arrangement distortion of a pattern at the time of global alignment between points P and Q, a difference deltax exists between two distances; the one being a distance between two measurement points P and Q, and the other being an intrinsic specified distance. When this difference is generated data concerning prescribed arrangement coordinates are measured with respect to some of pattern parts. Based on these measured data, the coefficients of a calculation formula by which each data of the pattern with respect to the arrangement coordinates is obtained are determined. Setup movement is controlled based on each data with respect to the arrangement coordinates of pattern part being obtained by the above calculation formula.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an alignment method for a step-and-repeat type processing apparatus, and more particularly to an alignment method for a step-and-repeat type projection exposure apparatus (hereinafter referred to as a stepper) used in the manufacturing process of integrated circuit devices.

For example, a stepper is a reduction projection optical system (hereinafter referred to as a reticle) that reduces a pattern for forming a circuit on an enlarged original plate (hereinafter referred to as a reticle).
This is a device that repeatedly exposes and prints a semiconductor substrate (hereinafter referred to as a wafer) through a lens (hereinafter referred to as a lens).

In this apparatus, the area that is projected and exposed at one time is usually a small area corresponding to one integrated circuit element portion (hereinafter abbreviated as a chip) to several chips. Therefore, in order to print the pattern on the reticle over the entire surface of the wafer, exposure is repeated while the wafer is moved stepwise relative to the reticle in the X and Y directions within a plane orthogonal to the optical axis of the lens. Here, the number of exposures ranges from tens to hundreds.

This photo-elimination is usually performed on the wafer several to ten times until the chip is completed, so from the second process onwards, the relative positioning (hereinafter abbreviated as alignment) between the reticle pattern and each chip pattern on the wafer is performed. )Is required. Here, alignment methods can be roughly classified into the following two types.

One method is to align the reticle between two or more predetermined points between two or more chips on the wafer, and use the coordinates obtained through this alignment as the origin to measure the wafer using a length measurement scale such as a laser interferometer. This is a method called global alignment, in which exposure is repeated while stepping the image.

The other method is called die-by-die alignment, in which the reticle pattern and the chip pattern on the wafer are directly aligned and exposed through a projection exposure lens at each chip printing position.

By the way, in die-by-die alignment, since the wafer chip pattern and reticle pattern are directly aligned for each chip, there is no positional deviation between the reticle pattern image and the wafer chip pattern during exposure, but the wafer processing time is long (throughput is low). It has the disadvantage of decreasing.

On the other hand, although global alignment is good in terms of throughput, it poses a problem of positional deviation between the reticle pattern image and the wafer chip pattern.

The present invention was made in view of the above circumstances, and its purpose is to process each pattern portion with high precision while reducing the throughput of the device in a device that processes multiple pattern portions on a substrate using step-and-repeat processing. The object of the present invention is to provide an alignment method that can perform alignment without any problems.

In order to achieve this object, the present invention measures data regarding predetermined array coordinates for some of the pattern parts, and obtains data for each of the pattern parts regarding the array coordinates based on the measured data. The present invention is characterized in that an arithmetic expression is determined, and step movement of the substrate is controlled based on data regarding the pattern portion and its arrangement coordinates determined by this arithmetic expression.

The alignment method of the present invention will be explained below using a stepper as an example.

Generally, chip patterns arranged on a wafer should originally be arranged at equal intervals along the XY axes, but the arrangement is slightly disordered mainly due to the following two reasons. One of the reasons for this is due to the nature of the exposure equipment (aligner) used during pattern printing at the process opening, or the condition of the wafer and reticle (mask).The other reason is that the wafer is damaged due to heating processes such as diffusion and oxidation. This is caused by your own distortion.

When global alignment is performed, for example, between P and Q for a plurality of chips 2 on a wafer 1 as shown in FIG. , Q and the distance that should originally be (distance when the chips are correctly arranged) a difference δX occurs. If this difference occurs, assume that there is a linear pattern alignment distortion radially from the center of the wafer 1 as shown in Figure 2, and perform step exposure with the following correction values taken into account. is possible.

That is, L is the actual measurement value, Lo is the original dimension, and >(=(1+K)Xo ・・・・・・・・・・・・・・・
・・・・・・・・・・・・・・・・・・(2) Y=(1+K
)Yo ・・・・・・・・・・・・・・・・・・
・・・・・・・・・・・・Step exposure is performed so that (3) is obtained. X here. .

Yo is the original step feed amount. However, wafer 1
The pattern arrangement within is not always linear. For example, if you have a nonlinear array characteristic curve (curve 4) as shown in Figure 2, the reticle pattern will have an alignment error represented by the difference between straight line 3 and curve 4 at each X point. As a result, each chip pattern on the wafer 1 is printed in an overlapping manner. Furthermore, alignment errors also occur when the arrangement of the chip patterns on the wafer 1 is not arranged radially. In other words, when step-feeding the wafer I, alignment accuracy is not sufficient if the step-feed correction iK is always constant.

On the other hand, if you want information about the pattern arrangement of the wafer,
It becomes possible to apply accurate correction to global alignment using the above information. The means for this are (A)
means for reading the array of chip patterns on the wafer l, (
B) Means for calculating and/or storing read information; and (C) Means for associating information with wafer l and making it possible to use the information for global alignment. valid processes (
procedure) can be considered.

First, we will discuss individual methods.

As for the means for reading the arrangement of chip patterns on the wafer l in (A), there is a method (1) of using the measuring means of the stepper itself. If the alignment position of each individual chip is read by a built-in laser interferometer or other length measurement function after one die-by-die alignment,
The data can be used as correction values for subsequent global alignment of that wafer 1. Or (2
) It may be an independent device with only an alignment function. It is a stepper with the projection exposure function removed, and can be considered an improved version of the current 1Fllll coordinate machine.

Next, regarding the means for calculating and/or storing information in (B), first, there is a method (1) for storing all measurement data in a storage device with respect to coordinates based on a specific chip pattern in wafer 1. Conceivable. However, when this method is applied to all wafers l in the middle of the process, it has the disadvantage that a huge storage capacity is required. In that case, (2) means for storing the obtained data as a constant of a mathematical formula for pattern arrangement distortion predicted in advance becomes effective. The majority of currently available aligners other than steppers are contact or proximity type aligners and mirror projection type aligners. It is known which type of aligner was used for the first photo process on the target wafer l, and the characteristics of these aligners during patterning can be expressed in the form of a mathematical formula. For example, for some mirror projection types, X=x+△x = x+G(x, y) sθx +
G(x, y)sOy −f21ylα×G(x, y
) lφx+kx・・・・・・・・・(4) y=y+△
y=y−k(y)(θχ1θy)10y(θχ10θy)+
2G(x, y)sθx+(f2K(y)±f2S)α
+2G(x,y)j? φy+ky...
......(5). Here, S, l are machine-specific constants, G (x.

y), K(y) are values determined by the coordinates of wafer l, θ
X, θy, φX, φy, α are the angular errors of the optical system, and
kx and Icy show linear elongation in the radial direction depending on the temperature of the mask and wafer. By substituting the obtained data into the equation, simultaneous equations are established, and the unknowns θ2. θXφ
Xφyα can be obtained and these can be stored in a storage device. The number of distortion factors is much smaller than the number of data in (1), making it possible to store a larger amount of general data. In the case of this method, (i) data acquisition can be limited to the minimum amount of data necessary to solve the equation, or (ii) accuracy of variables can be further improved by using data from all measurement points, and ( ii
i) Alternatively, in preparation for unpredictable distortion, or the habits of individual aligners can be added as a variable term.

Next, regarding the means for associating information with wafers in (C), wafers are generally managed in units of lots, for example, 25 carriers, and wafers within a lot are preferably processed under the same conditions. Therefore, one possible method is to consider one wafer among the wafers as a representative and associate them with each other. Further, a code mark, number, symbol, etc. may be marked on a part of the wafer to manage each wafer.

Next, consider combinations of the above means.

l) If wafers are subject to process control on a lot-by-lot basis, there is a way to perform die-by-die alignment on the first wafer in the lot using a stepper, and at the same time import that information to globally align the second and subsequent wafers. validate. In this case, even if all the data is stored, once all the machining in the lot is completed, the stored data becomes unnecessary and can be deleted.

2) Also, in the case of lot-by-lot management, it is also possible to place a dedicated alignment device in front of the stepper and memorize the positions of all chips before sending them to the stepper. This procedure is nothing but saving the time lost due to the serial operation of alignment and exposure in die-by-die alignment using a stepper by removing only the alignment operation and performing parallel operations. In this case as well, it is advantageous to use all the data as is. According to this method,
Since the measurement is taken just before exposure, all error components can be read.

3) When management is performed on a wafer basis, it is effective to store the variables in the form of the formula variables described above. In this case, the information is captured by die-by-die alignment using the first stepper in the repeated photo process, or an alignment machine is placed in front of the first stepper to capture the data, and these data are then used in the subsequent global alignment. data will be used.

Various other combinations can be considered based on the above three combinations, but ultimately the process manager will consider the balance between alignment accuracy and throughput required in the actual process.

As described above, according to the present invention, a highly accurate alignment method using global alignment can be provided.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a wafer having a plurality of chip patterns, and FIG. 2 is a diagram showing an arrangement error curve of the chip patterns of the wafer shown in FIG.

Claims (1)

[Claims] In a method for processing a plurality of pattern portions on a substrate in a step-and-repeat manner, each of the pattern portions is sequentially aligned with respect to a predetermined reference by stepping the substrate. Measure some of the pattern parts, and based on the measured data, determine the coefficients of an arithmetic expression for determining the data of each of the pattern parts regarding the array coordinates, and calculate the coefficients of the pattern part obtained by this calculation formula. An alignment method characterized in that the step movement is controlled based on data regarding each of the array coordinates.