JPS62169125A - Preparation of liquid crystal display panel - Google Patents

Preparation of liquid crystal display panel

Info

Publication number
JPS62169125A
JPS62169125A JP61011384A JP1138486A JPS62169125A JP S62169125 A JPS62169125 A JP S62169125A JP 61011384 A JP61011384 A JP 61011384A JP 1138486 A JP1138486 A JP 1138486A JP S62169125 A JPS62169125 A JP S62169125A
Authority
JP
Japan
Prior art keywords
thin film
resistance semiconductor
liquid crystal
display panel
crystal display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61011384A
Other languages
Japanese (ja)
Inventor
Ryosuke Araki
亮輔 荒木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP61011384A priority Critical patent/JPS62169125A/en
Publication of JPS62169125A publication Critical patent/JPS62169125A/en
Pending legal-status Critical Current

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  • Liquid Crystal (AREA)

Abstract

PURPOSE:To prevent disconnection of wiring of a liquid crystal display panel and to reduce preparation cost of the liquid crystal display panel by etching thin film of a high resistance semiconductor, then etching thin film of a low resistance semiconductor. CONSTITUTION:Thin film 2 of a transparent conductor and thin film 3 of a low resistance semiconductor are formed on a transparent insulating substrate 1, then the low resistance semiconductor thin film 3 and the transparent conductor 2 are etched in the order. The low resistance semiconductor thin film 3 is etched further. Thereafter, the thin film 4 of high resistance semiconductor, thin film 5 of insulating body, and thin film 6 of the conductor are formed in the order, then the conductor thin film 6, insulator thin film 5, and the high resistance semiconductor thin film 4 are etched. Further, the low resistance semiconductor thin film 3 is etched. By this method, photoetching stage which has been required conventionally to be repeated 4 times, is saved to two times, shortening thus the preparation stage.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、液晶表示パネルのアクティブマトリクス基板
の製造方法に関する◇ 〔発明の概要〕 本発明はアクティブマトリクス基板を具備した液晶表示
パネルの製造J法において、a)透明導電体薄膜と低抵
抗半導体薄膜、及び高抵抗半導体薄膜と絶縁体薄膜と導
体薄膜をそれぞれ同一パターンで形成し、計2回のフォ
トエツチング工程でトランジスタを有するアクティブマ
トリクスJ[を製造すること、b)透明導電体薄膜をエ
ツチング後、再度低抵抗半導体薄膜をエツチングするこ
と、C)高抵抗半導体薄膜エツチング後、低抵抗半導体
薄膜をエツチングすることにより、a)フォトエツチン
グ工程を2回アクティブマトリクス基板形成し、b)配
線の断線を防ぎ、液晶表示パネルの低コスト化し、また
C)フォトエツチング工程を増すことなく不要な低抵抗
半導体を除去し表示特性を向上したものである〇 〔従来の技術〕 従来ノアクチイブマトリクス基板を具備した液晶表示パ
ネルは、Sより83D工GEST、PM56にあるよう
になっており、 第2図に従って説明すると透明絶縁基板1上に81半導
体薄膜を形成しフォトエツチングして所定の形状にした
後、ゲート絶縁膜を形成し、ポリS1膜を形成してフォ
トエツチングによりゲート111i25を形成する0イ
オン注入によりソース24、ドレイン23を形成した後
、層間絶縁膜を形成し、コンタクトホールをフォトエツ
チングにより開口して、透明導電膜を形成し、フォトエ
ツチングにより画素電極21とデータ@22を形成して
了クチイブマトリクス基板となし、通常の液晶パネルの
工程に従って液晶の配向処理を行い、配向処理を行った
対向基板と所定の間隙を有するセルとなし、これに液晶
を封入することにより液晶表示パネルとなす・ 〔発明が解決しようとする問題点〕 しかし、前述の従来技術ではアクティブマトリクス基板
の製造工程が長く、また複雑でα)液晶表示パネルのコ
ストが非常に高くなる、h)歩留りが低い、C)大画面
がむずかしいという問題点を有する◇ そこで本発明はこのような問題点を解決するもので、そ
の目的とするところは、低コストで大画面の液晶表示パ
ネルが可能な液晶表示パネルの製造方法を提供すること
にある。
[Detailed Description of the Invention] [Industrial Field of Application] The present invention relates to a method for manufacturing an active matrix substrate for a liquid crystal display panel. [Summary of the Invention] The present invention relates to a method for manufacturing an active matrix substrate for a liquid crystal display panel. In the method, a) a transparent conductor thin film, a low-resistance semiconductor thin film, a high-resistance semiconductor thin film, an insulator thin film, and a conductor thin film are each formed in the same pattern, and an active matrix J[ b) etching the low-resistance semiconductor thin film after etching the transparent conductor thin film; C) etching the low-resistance semiconductor thin film after etching the high-resistance semiconductor thin film; The active matrix substrate is formed twice, b) prevents wire breakage and reduces the cost of the liquid crystal display panel, and c) improves display characteristics by removing unnecessary low-resistance semiconductors without increasing the number of photo-etching steps. 〇 [Prior art] A conventional liquid crystal display panel equipped with a non-active matrix substrate is as shown in 83D GEST, PM56 from S, and as explained according to Fig. 2, 81 semiconductor thin film is formed on a transparent insulating substrate 1. After forming and photo-etching into a predetermined shape, a gate insulating film is formed, a poly S1 film is formed, and a gate 111i25 is formed by photo-etching. A source 24 and a drain 23 are formed by 0 ion implantation. An interlayer insulating film is formed, a contact hole is opened by photo-etching, a transparent conductive film is formed, and a pixel electrode 21 and data@22 are formed by photo-etching to form a transparent matrix substrate and a normal liquid crystal panel. A liquid crystal display panel is produced by aligning the liquid crystal according to the process described above, forming a cell having a predetermined gap with the counter substrate subjected to the alignment process, and filling the cell with liquid crystal. [Problems to be Solved by the Invention] ] However, with the above-mentioned conventional technology, the manufacturing process of the active matrix substrate is long and complicated, and has the following problems: (a) the cost of the liquid crystal display panel is extremely high, (h) the yield is low, and (C) it is difficult to produce a large screen. ◇ The present invention is intended to solve these problems, and its purpose is to provide a method of manufacturing a liquid crystal display panel that allows a large-screen liquid crystal display panel to be produced at low cost.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の液晶表示パネルの製造方法は、a)データ線と
画素電極及びトランジスタのソースとドレイン電極を1
回のフォトエツチング工程で形成し、トランジスタのチ
ャネル部(半導体層)とゲート絶縁膜及びゲート電極と
タイミング線を1回のフォトエツチングで形成し、計2
回のフォトエツチング工程で了クチイブマトリクス基板
を形成したこと、b)ソース・ドレインを構成する低抵
抗半導体、データ線と画素電極を構成する透明電極を順
にエツチングした後、再び低抵抗半導体をエツチングす
ること、c)ゲート電極及びタイミング線を構成する導
体薄膜、ゲート絶縁膜、チャネル部を構成する高抵抗半
導体薄膜を順にエツチングした後、不用な画素電極上に
露出した低抵抗半導体薄膜を除去したことを特徴とする
The method for manufacturing a liquid crystal display panel of the present invention includes: a) connecting a data line, a pixel electrode, and a source and drain electrode of a transistor;
The channel part (semiconductor layer) of the transistor, the gate insulating film, the gate electrode, and the timing line are formed in one photoetching process.
b) The low-resistance semiconductors forming the source and drain, the transparent electrodes forming the data lines and pixel electrodes are sequentially etched, and then the low-resistance semiconductor is etched again. c) After sequentially etching the conductor thin film constituting the gate electrode and timing line, the gate insulating film, and the high resistance semiconductor thin film constituting the channel part, the low resistance semiconductor thin film exposed on the unnecessary pixel electrode was removed. It is characterized by

〔作 用〕[For production]

本発明の上記の製造方法によれば、a)フォトエツチン
グ工程が、従来の4回から半分の2回でアクティブマト
リクス基板が製造可能となること、b)低抵抗半導体薄
膜、透明導電体薄膜の順でエツチングすると第3図のよ
うに透明導電体薄膜32が低抵抗半導体薄膜33に比べ
、サイドエツチングが進み、その上層に形成されるゲー
ト電極、タイミング線の断線やショートあるいは低抵抗
半導体薄膜パターンの断線等の原因となるが、さらに低
抵抗半導体薄膜をエツチングすることにより、第4図の
ように透明導電体薄膜パターンに対しさらにサイドエツ
チングを進めることにより、上記不良原因を除去出来る
こと、6)  2回のフォトエツチングにより、アクテ
ィブマトリクス基板は形成出来るわけであるが、画素電
極上に低抵抗の半導体薄膜が残されることになる。この
半導体薄膜の光吸収により液晶表示パネルは、透過率は
低下し、さらに色付きが生ずる。
According to the above-described manufacturing method of the present invention, a) an active matrix substrate can be manufactured in two photoetching steps, which is half the conventional four times, and b) a low-resistance semiconductor thin film and a transparent conductor thin film can be manufactured. When the transparent conductor thin film 32 is etched in this order, the side etching progresses more than the low resistance semiconductor thin film 33 as shown in FIG. However, by further etching the low-resistance semiconductor thin film, and by further performing side etching on the transparent conductor thin film pattern as shown in FIG. ) Although an active matrix substrate can be formed by photo-etching twice, a low-resistance semiconductor thin film remains on the pixel electrode. Due to this light absorption by the semiconductor thin film, the transmittance of the liquid crystal display panel decreases and coloring occurs.

したがって、高抵抗半導体薄膜のエツチングした後ひき
続き画素電極上の低抵抗半導体薄膜を除去することで上
記問題は、工程を増すことなく解決出来る。
Therefore, the above-mentioned problem can be solved without increasing the number of steps by removing the low-resistance semiconductor thin film on the pixel electrode after etching the high-resistance semiconductor thin film.

〔実施例〕〔Example〕

第1図は、本発明の実施例における液晶表示パネルのア
クティブマトリクス基板の主要断面図を示す。透明絶縁
基板1上に透明導電体薄膜2を形成する。透明導電体薄
膜としてはスズ酸化物、インジウム酸化物あるいはそれ
らの混合物があり、気相成長法やスパッタ蒸着法により
膜形成ができ、膜厚としては20 nmから400 n
mの膜厚が適当である。この透明導電体薄膜2の上に低
抵抗半導体薄膜3を一般的な手法(例えば、気相成長法
)により形成する。低抵抗半導体としては、リンやポロ
ン等の不純物をドープしたアモルファスシリコンやポリ
シリコンがあり、膜厚としては数nmから100 nm
が適当である0この基板上に7オトレジストパターン4
を形成し、まず低抵抗の半導体薄膜3をレジストパター
ン4に従って選択的にエツチングし、低抵抗の半導体薄
膜3が除却され露出した透明導電体薄膜2をエツチング
する。このとき第3図に示したように透明導電体薄膜2
はサイドエツチングされるため、再び低抵抗半導体薄膜
3をエツチングして透明導電体薄膜2より内側になるよ
うにサイドエツチングさせて第4図のようにする@レジ
スト膜を除却した後高抵抗半導体薄膜4を気相成長法な
どにより10 mmから300 nmの膜厚で形成する
0さらにゲート絶縁膜5を気相成長法あるいはスパッタ
蒸着法により10mmから300 Onmの膜厚で形成
する。ゲート絶縁膜5としてはシリコン酸化物やシリコ
ン酸化物が一般的である・この絶縁膜はゲート絶縁膜の
ほか層間絶縁膜としても使われる@さらに導体薄膜6を
スパッタ蒸着あるいは気相成長法により形成する0導体
薄膜としてはアルミニウムやτα等の金属、低抵抗半導
体、インジウム酸化物等の導の導電性金属酸化物が適応
できる。第5図及び第6図にアクティブマトリクス基板
の主要平面図の例を示す0透明導電薄膜2及び低抵抗半
導体薄膜3をパターン形成することにより、データI!
22及び画素電極21、さらにはソース24及びドレ゛
イン25を形成する0次に高抵抗半導体膜FII4、絶
縁体薄膜5及び導体薄膜6をパターン形成することによ
り、チャネル部25、ゲー)[1525(チャネル部と
ゲート電極が重なっているので添字25で共に示す)、
タイミング線26を形成する・以上により了クチイブマ
トリクスを形成した透明絶縁基板表面に通常行われる液
晶の配向処理を行う0すなわちポリイミド樹脂等の有機
膜を形成し・所定の方向に綿布等でこすることにより液
晶の配向処理を行う。さらに対向する基板にも同様に配
向処理し、この2枚の基板を所定の間隙を保ち、しかも
周辺をシールする0この間隙に液晶を注入し封止して液
晶パネルとなす。
FIG. 1 shows a main cross-sectional view of an active matrix substrate of a liquid crystal display panel in an embodiment of the present invention. A transparent conductor thin film 2 is formed on a transparent insulating substrate 1. The transparent conductor thin film is made of tin oxide, indium oxide, or a mixture thereof, and can be formed by vapor phase growth or sputter deposition, and the film thickness ranges from 20 nm to 400 nm.
A film thickness of m is appropriate. A low-resistance semiconductor thin film 3 is formed on this transparent conductor thin film 2 by a general method (eg, vapor phase growth method). Low-resistance semiconductors include amorphous silicon and polysilicon doped with impurities such as phosphorus and poron, and the film thickness ranges from several nm to 100 nm.
is suitable 0 7 photoresist pattern 4 on this substrate
First, the low resistance semiconductor thin film 3 is selectively etched according to the resist pattern 4, and the low resistance semiconductor thin film 3 is removed and the exposed transparent conductor thin film 2 is etched. At this time, as shown in FIG.
is side-etched, so the low-resistance semiconductor thin film 3 is side-etched again so that it is inside the transparent conductor thin film 2, as shown in Figure 4.@After removing the resist film, the high-resistance semiconductor thin film is etched. A gate insulating film 5 is formed to a thickness of 10 mm to 300 nm using a vapor phase epitaxy method or a sputter deposition method. Silicon oxide or silicon oxide is generally used as the gate insulating film 5. This insulating film is used not only as a gate insulating film but also as an interlayer insulating film.@Furthermore, a conductive thin film 6 is formed by sputter deposition or vapor deposition. As the zero conductor thin film, metals such as aluminum and τα, low resistance semiconductors, and conductive metal oxides such as indium oxide can be used. By patterning the transparent conductive thin film 2 and the low resistance semiconductor thin film 3, the data I!
By patterning the zero-order high resistance semiconductor film FII4, the insulating thin film 5, and the conductive thin film 6 that form the source 24 and the drain 25, the channel part 25, the gate electrode 22 and the pixel electrode 21, (Since the channel part and the gate electrode overlap, they are both indicated by the subscript 25),
Forming the timing line 26 ・Form the organic film such as polyimide resin, which performs the liquid crystal alignment treatment normally performed, on the surface of the transparent insulating substrate on which the transparent matrix has been formed by the above steps. By doing this, alignment treatment of the liquid crystal is performed. Further, the facing substrates are similarly aligned, and a predetermined gap is maintained between the two substrates, and the periphery is sealed.Liquid crystal is injected into this gap and sealed to form a liquid crystal panel.

〔発明の効果〕〔Effect of the invention〕

以上述べたように本発明によれば、従来4回のフォトエ
ツチング工程を必要としたm雑で長いアクティブマトリ
クス基板の製造工程を半分の2回のフォトエツチング工
程で製造可能とし、製造工程を簡単で短いものとなすこ
とが出来る0また透明導電体薄膜のオーバーハングによ
るゲート電極、タイミング線の断線やショートあるいは
トランジスタの半導体部の断線といった不良原因を除去
出来る6oまた画素電極上の半導体薄膜を除去すること
で液晶表示パネルの色付きの無い明るい表示を可能にす
ることができる。
As described above, according to the present invention, the complicated and long active matrix substrate manufacturing process that conventionally required four photo-etching processes can be reduced to two photo-etching processes, thereby simplifying the manufacturing process. 6o Also, the semiconductor thin film on the pixel electrode can be removed. By doing so, it is possible to provide a bright display without coloring on the liquid crystal display panel.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の液晶表示パネルのアクティブマ) I
Jクス基板の主要断面図。 第2図は従来の液晶表示パネルのアクティブマトリクス
基板の主要断面図◇ 第3図は透過導電膜パターンのサイドエツチングを示す
断面図。 第4図は半導体パターンのサイドエツチングを示す断面
図。 第5図、第6図は本発明の液晶表示パネルのアクティブ
マトリクス基板の例を示す主要平面図02・・・透明導
電膜    3・・・低抵抗半導体膜4・・・高抵抗半
導体膜  5・・・絶縁膜6・・・導電体膜    2
1・・・画素電極22・・・データ!I      2
3・・・ドレイン24・・・ソース      25・
・・ゲート26・・・タイミング線 以  上
Figure 1 shows the active material of the liquid crystal display panel of the present invention.
Main cross-sectional view of the J-custom board. Figure 2 is a main sectional view of an active matrix substrate of a conventional liquid crystal display panel. ◇ Figure 3 is a sectional view showing side etching of a transparent conductive film pattern. FIG. 4 is a sectional view showing side etching of a semiconductor pattern. 5 and 6 are main plan views showing examples of the active matrix substrate of the liquid crystal display panel of the present invention 02...Transparent conductive film 3...Low resistance semiconductor film 4...High resistance semiconductor film 5. ...Insulating film 6...Conductor film 2
1... Pixel electrode 22... Data! I 2
3...Drain 24...Source 25.
...Gate 26...Above the timing line

Claims (1)

【特許請求の範囲】[Claims] トランジスタをマトリクス状に配置した液晶表示パネル
の製造方法において、a)透明絶縁基板上に透明導電体
薄膜と低抵抗の半導体薄膜とを形成する工程と、b)ウ
ォトレジストパターンを所定の形状に形成し、該低抵抗
の半導体薄膜、該透明導電体薄膜の順にエッチングし、
さらに該低抵抗の半導体薄膜をエッチングする工程と、
c)高抵抗半導体薄膜、絶縁体薄膜、導体薄膜の順に薄
膜形成する工程と、d)フォトレジストパターンを所定
の形状に形成し、該導体薄膜、該絶縁体薄膜、該高抵抗
半導体薄膜をエッチングし、さらに該低抵抗半導体薄膜
をエッチングする工程とを有する液晶表示パネルの製造
方法。
A method for manufacturing a liquid crystal display panel in which transistors are arranged in a matrix includes the steps of: a) forming a transparent conductor thin film and a low-resistance semiconductor thin film on a transparent insulating substrate; and b) forming a water resist pattern into a predetermined shape. forming and etching the low resistance semiconductor thin film and the transparent conductor thin film in this order,
further etching the low resistance semiconductor thin film;
c) forming thin films in the order of a high-resistance semiconductor thin film, an insulator thin film, and a conductor thin film, and d) forming a photoresist pattern into a predetermined shape, and etching the conductor thin film, the insulator thin film, and the high-resistance semiconductor thin film. A method for manufacturing a liquid crystal display panel, further comprising the step of etching the low resistance semiconductor thin film.
JP61011384A 1986-01-22 1986-01-22 Preparation of liquid crystal display panel Pending JPS62169125A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61011384A JPS62169125A (en) 1986-01-22 1986-01-22 Preparation of liquid crystal display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61011384A JPS62169125A (en) 1986-01-22 1986-01-22 Preparation of liquid crystal display panel

Publications (1)

Publication Number Publication Date
JPS62169125A true JPS62169125A (en) 1987-07-25

Family

ID=11776510

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61011384A Pending JPS62169125A (en) 1986-01-22 1986-01-22 Preparation of liquid crystal display panel

Country Status (1)

Country Link
JP (1) JPS62169125A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01274117A (en) * 1988-04-27 1989-11-01 Sony Corp Display device
JPH0386548U (en) * 1989-12-25 1991-09-02
US7649584B2 (en) 2002-10-21 2010-01-19 Lg Display Co., Ltd. LCD array substrate and fabrication method thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01274117A (en) * 1988-04-27 1989-11-01 Sony Corp Display device
JPH0386548U (en) * 1989-12-25 1991-09-02
US7649584B2 (en) 2002-10-21 2010-01-19 Lg Display Co., Ltd. LCD array substrate and fabrication method thereof

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