JPS6215914A - Controller for channel selection circuit - Google Patents

Abstract

PURPOSE:To allow the user to set freely a channel up/down channel selection speed as preference by using a preset signal from a means generating a prescribed preset signal so as to switch a channel switching speed setting data generated by the depression of a channel up or down key into another data. CONSTITUTION:A voltage produced across a resistor R2 through the current flowing from a voltage source 21 to resistors R4, R2 by closing, e.g., a contact S2 is generated at a terminal P2 via the 3rd port 19. Then a CPU 17 detects a signal caused at any of preset terminals P1-P3 and decides to which contact the signal corresponds to give a data different from contacts S1-S3 to a register 26. Thus, the difference between the initial value of a counter 25 and a reference value of the register 26 is varied so as to change the switching speed of the channel depending on the position of the contacts S1-S3.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to an up/down type tuning circuit that sequentially switches receiving stations and selects a desired station, in which the tuning speed can be set arbitrarily. The present invention relates to a circuit control device.

[Technical Background of the Invention] In general, a channel selection circuit in a television receiver, for example, a CATV terminal device, has as many as 62 receiving stations, so a method of digitally controlling the local oscillation frequency is adopted. Ru.

The reason for this is that channel data corresponding to the tuning voltage or the division ratio of the local oscillation frequency is stored in the memory and direct tuning can be performed.

FIG. 9 shows an example of a conventional channel selection circuit composed of digital circuits as described above, which is mainly composed of a microcomputer 100, and includes a memory circuit etc. connected to its processor 101 (hereinafter referred to as CPU). It is omitted.

The CPU 101 inputs a signal from a key input unit 110 provided with various control keys including channel up/down keys via the boat 103, and if this signal is channel selection request information, it is used for predetermined channel selection. Digital signal 101
a is read from the memory and supplied to the tuner 112.

Further, the CPU 101 supplies data 101b for setting the channel switching speed to the boat 105 using information from the channel up or down key. This data 10
1b, CPLJlol is generated simultaneously with the timer operation start data 101C and the timer circuit 10.
4, and the timer circuit 104 transfers the data 101 to
A timer operation is performed according to the data contents of b. That is, the timer circuit 4 counts clock pulses from the clock generation circuit 111, and the count value is the data 101.
The timer operates until the value becomes equal to -b. When the timer operation for this predetermined period ends, the timer circuit 104 supplies a timer operation end signal 104a as an interrupt signal to CPLJlol.

On the other hand, the CPU 101 supplies the digital signal for channel selection to the tuner 112 while the timer circuit 104 is operating, and updates the digital signal to a signal for receiving the adjacent channel when the timer operation end signal 104a is generated. .

When this update is completed, the CPU 101 sends a timer stop signal 101d to the timer circuit 104 via the boat 106.
is supplied to return the counter value to its initial value. Thereby, the timer circuit 104 repeatedly generates the timer operation end signal 104a while the channel up or down key is pressed.

[Problems in the background art] In conventional channel selection circuits, the speed when channel up/down is selected, that is, the channel switching speed varies depending on the model or manufacturer and is constant, and the user cannot switch arbitrarily. Not possible -0 In Fig. 9, the channel selection speed when channel up/down can be set by changing the generation frequency of the pulse generation circuit 111 or by varying the timer time of the timer circuit 104, but the generation frequency It is undesirable to change the operating time of the timer circuit because the pulse generating circuit 111 is normally used as the clock pulse of the CPU 101, and changing the operating time of the timer circuit is undesirable because it means changing the period of the counter, for example. It had the disadvantage that it became complicated.

[Object of the Invention] The present invention has been made in view of the above-mentioned points, and in the channel up/down tuning method, the channel up/down tuning method is implemented by switching and setting different data specifying the tuning speed. It is an object of the present invention to provide a control device for a tuning circuit that allows the speed to be varied in steps.

[Summary of the Invention] To achieve the above object, the present invention converts data for setting a channel switching speed generated by pressing a channel up or down key into a preset signal from means for generating a preset signal. The channel up/down speed can be varied in stages by switching to different data.

[Embodiments of the invention] Hereinafter, the present invention will be described with reference to illustrated embodiments.

FIG. 1 is a circuit block diagram showing one embodiment of a control device according to the present invention, which is applied to a CATV terminal device. FIG. 2 shows an overall outline of the terminal device, FIG. 3 is a block diagram showing the terminal device, FIG. 4 is a time chart showing the timing of data processing according to the present invention, and FIG.
The figure is a circuit diagram showing an embodiment of the present invention in a remote control transmitter, Figure 6 is a signal diagram showing the remote control transmission data code, and Figure 7 is the signal waveform and reception waveform. Waveform Diagram FIG. 8 is a waveform diagram showing the transmission waveform when a key is pressed continuously.

The present invention provides a two-way CATV system and an end-direction CATV system.
The system can be applied to any case.

Whether the CATV device is bidirectional or unidirectional, its basic configuration can be shown as shown in FIG. That is,
One central office (hereinafter referred to as center) 1 to sub-central office 2
, 2... (hereinafter referred to as sub-centers) are connected over multiple locations, and each sub-center 2.2...
. . . to which CATV terminal devices 3, 3 . . . of a plurality of subscriber homes are connected. FIG. 3 shows the internal configuration of the CATV terminal device 3. Data transferred from the center 1 to the CATV terminal device 3 is transferred to the modem 5 via the bidirectional distributor 4, demodulated here, and then Processed by bit microcomputer 6, RAM
7 is stored in memory.

The data stored in the RAM 7 includes a channel map, control data for the encoder 9, and control data for the power relay 15 for turning on the power, and these data are stored for each CATV terminal. different. Also, CA
Each TV terminal device 3 is distinguished by an address code, and this code is determined by setting an address switch inside the terminal or by receiving a command from the center 1.

Further, the bidirectional distributor 4 is connected to a television signal output terminal 10 via a converter/tuner 8j3 and an encoder 9. These two-way distributor 8 and encoder 9 are controlled in accordance with a digital channel selection signal 11a and plain text signal 11b from a 4-bit microcomputer 11. That is, the 4-bit microcomputer 11 reads the key input from the key input section 12 or the remote control receiver 13, transmits this key information to the 8-bit microcomputer 6, and the 8-bit microcomputer 6 uses this key information as a channel selection request. By decoding the fact that
The signals 11a and 11b are supplied to the 4-bit microcomputer 11 through the 4-bit microcomputer 11. Note that this data also includes data for displaying the channel number on the channel display 14 in addition to the above.

In the present invention, the 4-bit microcomputer 11 is connected to a signal presetting means for variable channel switching speed as described below.

In FIG. 1, the same parts as in FIG. microcomputer 6
It has a second boat 18 for exchanging data with.

Moreover, c p U 17 is the preset end P1゜R2,R
3, and each of these preset ends P1 to P3 is connected to the third boat 19. To this third boat 19, one end is connected to the reference potential end, and the other end of resistors R1, R2, and R3 are connected, and each other end has three contacts (Sz, S2, S
3) It is connected to one end of each changeover switch 20, and the other end of each switch 20 is connected to a voltage source 21 via a resistor R4.

On the other hand, reference numeral 24 is a timer circuit. This timer circuit 24 is supplied with a clock pulse from a clock generation circuit (not shown) to a counter 25, and the c p
First and second data 17a from U 17.

17b are respectively connected to the registers 26.23 via the fourth and fifth ports 22.23. The signal is supplied to the control circuit 27. Among these data, the first data 17a is a signal generated when the CPLJ 17 detects key information when the channel up/down key is pressed in the key input section 12, and the second data 17b is It includes a timer operation start signal and a timer operation end signal that are generated simultaneously with the first data 17a. And register 2
The output of the counter 6 is supplied to the first input section 28a of the addition circuit 28, and the output of the counter 25 is supplied to the second input section 28tl of the addition circuit 28. This adder circuit 28 is connected to the first .
When the sum of data values input to the second input section exceeds a predetermined value, an overflow signal 28c is generated and this signal is supplied to the interrupt signal generation circuit 29 at the next stage. The over 70-signal 28C to this interrupt signal generation circuit 29
is input, the interrupt signal generation circuit 29 interrupts the CPU
An interrupt signal 29a is supplied to the interrupt input terminal PO of the CPU 17, whereby the CPU 17 inputs a timer operation end signal to the control circuit 27 via the fifth port 23.

The control circuit 27 uses this timer operation end signal to start the counter 2.
The signal 27.8 supplied to the counter 5 is used as a signal to stop the counter. In addition, the CPU 17 is connected to a remote control receiver 13 (not shown) via a boat 30, to a channel display 14 via a boat 31, to a converter/tuner 8 via a boat 32, It is connected to the encoder 9 via a boat 33, and to the power relay 15 via a boat 34.

The present invention is configured as described above, and the operation thereof is as follows:
The switching case will be explained separately.

(1) If the up/down speed is not switched, in this case, the channel up/down speed is determined by the timer circuit 2.
It is uniquely determined by the counter value of 4 and the frequency of the clock pulse.

When the channel up or down key is pressed on the key input unit 12, the CPU 17 detects the key information and supplies the microcomputer 6 with a signal for reading predetermined data from the RAM 7.

On the other hand, the CP tJ 17 supplies data for one predetermined shift to the register 26 via the first port 22, which serves as a reference for the channel switching speed. This data is data for causing the timer circuit 24 to measure, for example, 0.5 seconds, and this data value is added to the initial value from the counter 25 in the addition circuit 28, and when the added value exceeds a predetermined value, Addition circuit 2
B generates an overflow signal 27c and operates the interrupt signal generation circuit 29. In other words, generating this interrupt signal generating circuit 29a signals that 1065 seconds have elapsed.

As described above, while the timer circuit 24 measures 0.5 seconds, the CP tJ 17 receives the channel data from the boat 16.
The response data from the microcomputer 6 corresponding to the input of the up key or the channel down key is read, decoded, and based on the result, the channel number is displayed on the display 14, and the converter tuner 8 and the code The channel selection process is completed by controlling the device 9. Thereafter, the CPU 17 determines whether or not the channel up or down key is being held down, and if it is being held down, the CPU 17 further transmits this key information to the microcomputer 6.
and read the corresponding response data. Also,
Register 26 now has a 0 value shorter than, for example, 0.5 seconds.
．． Data is written to bring up or down one channel every second. Then, the timer circuit 24 is further activated, and when 0.1 seconds have elapsed, the same processing as when 0.5 seconds have elapsed is executed.

Thereafter, the CPU 17 repeats the following process every 0.1 second while the up key or down key is pressed.

1) Stopping the operation of the timer circuit 24.

2) Determining whether the channel up/down key is held down.

3) Transfer of key information from the key input section.

4) Activation of the timer circuit 24.

5) Key human power polling.

6) Decipher and process the response data from the microcomputer 6 (control the display 14, converter/tuner 8, and encoder 9).

7) Continue key manual polling.

Here, during the operation period of the timer circuit 24, the channel
When the up/down key is released or another key is pressed, the CPU 17 stops the operation of the timer circuit 24 and transmits other key input information. FIG. 4 is a time chart showing the data processing procedure between the microcomputers 11 and 6 when the channel up/down key is kept pressed; (a) shows the passage of time; (b) ) indicates the timing when the channel up key is pressed, (C) indicates the data transferred from the microcomputer 11 to 6, (d) indicates the data transferred from the microcomputer 6 to 11,
(e) shows a change in channel display number. In this figure, it can be seen that to is the time required for the input data of the microcomputer 6 to be processed, and tl and t2 are the processing times of the microcomputer 11.

(2) Switching of the channel switching speed according to the pumping invention in which the channel switching speed is varied is achieved by generating a signal with a mark "'1" on one of the preset ends P1 to P3 of the microcomputer 17, e.g. Can be varied over stages. For example, as shown in Figure 1, contact S
2 is made conductive, current flows from the voltage source 21 to the resistor R4 and the resistor R2, and a voltage generated across the resistor R2 is generated at P2 via one third port. Therefore, c
The pU 17 detects a signal generated at any one of these preset terminals P1 to P3, and determines which contact the signal corresponds to, and sends data of different values corresponding to each contact 81 to S3 to the register 26. supply to. As a result, the difference between the initial value of the counter 25 and the reference value of the register 26 is varied, and the cutting speed of the channel can be changed in accordance with the positions of the contacts $1 to S3.

Therefore, for example, when contact S1 is made conductive, 1
The switching speed of 0 channels can be varied from 5 channels per second when the lx point S2 is conductive to a switching speed of 2 channels per second when the contact S3 is conductive.

In this way, for example, when contact $1 is made conductive, the interrupt signal generation circuit 29 can supply an interrupt signal to the CPU 17 every 0.1 seconds, and each time an interrupt occurs, the interrupt signals (1) to (7) described above are ) will be repeated.

Next, an embodiment of the present invention using a remote control transmitter will be described with reference to FIGS. 5 to 8.

In FIG. 5, 35 is a remote control transmitter, which is comprised of an integrated circuit 36 for remote control transmission. This transmitting IC 36 is a CC8 input terminal.

00-, -K 07. at the key matrix output end. Key matrix human power tI'aKi1~Ki4. R.E.M.
It has an output terminal and a power supply terminal Vdd, VSS, and the up/down keys UP and ON are Kil and K2, respectively.
It is connected between KiO and KO2. Also,
The remote control transmission signal is taken out from the REV output terminal and sent to the receiver 13 shown in FIG. 1 via a remote control output circuit 37 consisting of an infrared light emitting diode or the like.

The present invention provides key matrix output terminals KO5, KO6, KO7 of the above-mentioned transmitting IC 36.
f12° A channel speed changeover switch 38 to which third contacts a, b, and c are connected is provided, and the output terminal C of this switch 38 is connected to the CC8 input terminal via three diodes. Note that a diode D1 is connected between the CC8 input terminal and KOI.

The data format of the remote control signal, as shown in FIG. 6, consists of a reader code that notifies data transmission, a custom code that specifies a control device, and a data code that specifies a control function equivalent to manual key power.

The custom code and data code are each sent as bit-reversed data so that parity can be performed after decoding. The custom code is determined by a diode connected to the CC8 input terminal and the key matrix output terminal KOO-KO7, and any of the bits C8 to C7 to which the diode D1.39 is connected is set to logic 111.
It becomes N.

According to the present invention, the switch 38 is connected between aC and the switch diode 39 is connected between the CC8 input terminal and KO7, so the custom code at that time is "01000".
001'', and when the switch 39 is conducting between a and b, [0
1000010J, when there is a gap between a and d [01000
You can get 3 codes that equal 100. Therefore, if these three codes are used to set the three-step speed for up/down channel switching, the remote control transmitter 3
The switching of the switch 38 provided at 5 is the contact S in FIG.
This means that the reference value data set in the register 26 can be changed corresponding to the switching of -83.

FIG. 7 shows the transmission signal waveform (
A) and a received output waveform (B) supplied from the remote control receiver 2913 to the microcomputer 11 are shown. In this case, the carrier frequency used is, for example, 38KH2, and when a predetermined key is pressed, a signal @40 corresponding to the reader code is continuously output, followed by a signal 41 corresponding to the logic level of the custom code and data code. be done. The remote control receiver 13 receiving these signals 40 and 41 connects the microcomputer 1 through the boat 30.
7, data corresponding to the key information is input one after another. As is clear from this figure, when the interval between the signals 41 is narrow, the bit data of logic "0" level is used, and when the interval of the signal 41 is wide, the pit data of logic "1" is input.

Figure 8 shows the case where the key is pressed continuously.
(A) is a transmission signal corresponding to FIG. 7(A), and shows that the data portion is 67.5 alS and is transmitted at an interval of 10811 s. (B) is an enlarged version of one of (A), and (C) is a further enlarged version of (B). Also, (D) shows the waveform when the key is pressed continuously, and as can be understood by comparing (C) and (D),
When the key is pressed continuously, the interval between the signal 40 and the first signal @41 becomes narrower from the second time onward. In other words, 1
The second time, the time is 4.5 ms, but if the key is pressed continuously, the interval becomes approximately half, 2.25 ms. This simply means that the data length of the reader code has changed, and the microcomputer 11
Continuous key presses can be detected by changing the data length of the code. Note that (E) shows a carrier waveform, in which a high frequency signal with a period of 26.3 IJs and a pulse width of 8.77 yen is used.

In this manner, the present invention allows the user to arbitrarily and variably set the channel switching speed by selecting and selecting the switch 20.38.

[Effects of the Invention] As explained above, according to the present invention, the user can freely set the channel up/down tuning speed according to his/her preference, which is equivalent to direct tuning using the numeric keys. It has the effect of demonstrating the channel selection function.

[Brief explanation of drawings]

Fig. 1 is a circuit block diagram showing an embodiment of a control device according to the present invention, Fig. 2 is an explanatory diagram showing an outline of a CATV system, and Fig. 3 is a schematic diagram showing an outline of an ATV terminal device to which the invention is applied. 4 is a time chart showing the processing timing of data during up/down tuning, FIG. 5 is a circuit diagram showing an embodiment of the present invention using a remote control transmitter, and FIG. 6 is the same. A signal diagram showing the data format of the transmitter. Figure 7 is a waveform diagram showing the transmitted signal waveform and received output waveform. A waveform diagram showing the transmitted signal waveform when the key is pressed continuously. Figure 8 is a waveform diagram showing the transmitted signal waveform when the key is pressed continuously. FIG. 9 is a circuit block diagram showing a conventional channel selection circuit control device. 3... CATV terminal device, 4... Bidirectional distributor,
5...Modem, 6.11...Microcomputer 7...RAM18...Converter tuner, 9.
... Encryptor, 12... Key input unit, 13 Remote control receiver, 14... Channel display, 16.18,
19°20.38...Switch, 22,23.3G
, 31, 32. 33 boats, 17... processor,
25...Counter, 26...Register, 27.
...control circuit, 28...addition circuit, 29...interrupt signal generation port, 35...remote control transmitter,
39...Diode. Agent Patent Attorney Noriyuki Chika Yukio Yuyama Figure 2 Figure 4 Diagram I-'WIb

Claims (1)

[Scope of Claims] A key input unit equipped with a channel selection key including a channel up/down key, and a channel selection circuit that generates a digital signal for channel selection based on a signal from the key input unit. and a data signal generating means for detecting a signal from the channel up or down key in the key input section and generating data for setting a channel switching speed in the up or down direction, and using this data as a predetermined reference value. , and when the count value exceeds a predetermined value, a timer operation end signal is generated, and the count value is returned to the original value while the channel up or down key is pressed. A timer circuit that repeatedly generates the timer operation end signal; and an operation end signal from the timer circuit that controls the tuning circuit to sequentially update a digital signal for tuning to data for tuning an adjacent channel. one of a plurality of different preset signals is selectively set, and this signal is supplied to the data signal generating means to switch the generated data to another reference value data and vary the timer time. A control device for a channel selection circuit, comprising speed setting means for changing channel switching speed.