JPS62158512U - - Google Patents
Info
- Publication number
- JPS62158512U JPS62158512U JP4671186U JP4671186U JPS62158512U JP S62158512 U JPS62158512 U JP S62158512U JP 4671186 U JP4671186 U JP 4671186U JP 4671186 U JP4671186 U JP 4671186U JP S62158512 U JPS62158512 U JP S62158512U
- Authority
- JP
- Japan
- Prior art keywords
- digital
- analog converter
- hold
- memory
- analog
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Control Of Voltage And Current In General (AREA)
- Analogue/Digital Conversion (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4671186U JPS62158512U (enExample) | 1986-03-27 | 1986-03-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4671186U JPS62158512U (enExample) | 1986-03-27 | 1986-03-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62158512U true JPS62158512U (enExample) | 1987-10-08 |
Family
ID=30866623
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4671186U Pending JPS62158512U (enExample) | 1986-03-27 | 1986-03-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62158512U (enExample) |
-
1986
- 1986-03-27 JP JP4671186U patent/JPS62158512U/ja active Pending