JPS621568A - Apparatus for generating rule line - Google Patents

Abstract

PURPOSE:To prevent the erasion of a rule line at the time of the correction and erasion of a character without accompanying the increase in cost, by mounting a table for storing the position of a rule line in the order corresponding to the scanning order of a memory and a comparator for performing the control of the display or printing output of the rule line on the basis of the coincidence and non-coincidence of the output data from the table and the address on the memory. CONSTITUTION:At the time of the start of printing, the lead data of tables 11, 21 are loaded to registers 12, 22. When YS coincides with a Y-address accessing a memory to generate an enable signal ENABLE 1, a dot plot indication signal DOT PLOT is generated from a flip-flop 19 until an X-address coincides with X1 after the coincidence with X and a straight line in the X- direction is drawn. When the Y-address accessing the memory coincides with YO and the X-address coincides with XS, a dot plot signal is generated from an AND gate 27 and one dot of the straight line in the Y-direction is printed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a ruled line generation device for displaying or printing an image with ruled lines.

[Technical background of the invention]

Conventionally, in a form display or printing system connected to a computer, characters and ruled lines are temporarily stored in the same memory and then the image is output. With this method, when correcting or erasing characters, the ruled lines may also disappear at the same time. As a countermeasure to this problem, a method was considered to have two types of memory, one for characters and one for lines, and output the image by taking the logical OR of the outputs, but the disadvantage is that it would increase costs because two memories were required. was there.

C) An object of the present invention is to provide a ruled line generation device that can prevent ruled line erasure when correcting or erasing characters without increasing costs.

[Summary of the invention]

The ruled line generator of the present invention includes a memory for storing characters, a ruled line generator for generating data related to ruled lines, and an OR circuit for ORing the outputs of the memory and the ruled line generator. A table that stores the positions of ruled lines in an order according to the order of scanning of the memory, and a comparator that controls the display of ruled lines or printout based on the match or mismatch between the output data from the table and the address on the memory. It is equipped with the following.

[Embodiments of the invention]

FIG. 2 shows a ruled line generation device according to the present invention. As shown in the figure, this Vt position includes a memory 1 that stores images such as characters and figures, a ruled line generator 2, and an OR circuit 3 that takes the logical sum of the outputs of the memory 1 and the ruled line generator 2.
The output of the OR circuit 3 is connected to a printer 4. Note that the printer 4 may be a display device.

FIG. 1 shows an example of one piece of the ruled line generator 2. As shown in FIG. In the figure, the X-direction straight line table 11 stores data regarding the straight line in the X direction, that is, the starting coordinate value in the X direction of the straight line XO1, the ending coordinate in the X direction of the straight line×1, and the Y coordinate value YS of the straight line. . If there are multiple straight lines, these data are stored in the order of scanning, that is, in order of decreasing YS.

First, the first data in the table 11 is stored in the X-direction straight line register 12.

The comparator 15 compares the Y address (Y coordinate value of the address) on the memory 1 being scanned and the YS in the register 12.
If they match, an enable signal ENABLE1 is generated that enables the start of coordinate generation of a straight line in the X direction.

The comparator 13 compares the X address on the memory 1 with the XO in the register 12, and if they match while the ENABLE1 signal is being output, the condition of the AND gate 16 is satisfied and a command is given to start dot plotting. This command sets the flip-flop 19 and outputs the dot plot instruction signal DOTPLOT.

The comparator 14 compares the X address on the memory 1 and the x1 in the register 12, and if they match, the address is ! ! This command to end the A generation is output to the outside when the AND gate 17 is opened by the enable signal ENABLE1. This output indicates the end of the dot plot. This termination instruction signal resets the flip-flop 19 and the dot plot instruction signal disappears. At the end of the dot plot, the AND gate 18 outputs a load instruction signal for the next X-direction straight line data, and the next straight line data is stored in the register 12.

The Y-direction straight line table 21 includes data regarding Y-direction straight lines,
That is, the starting coordinate value YO of the straight line in the Y direction, the ending coordinate value Y1 of the straight line in the Y direction, and the X coordinate value XS of the straight line are stored. Each Y direction straight line data is stored in the table 21 starting from the one with the smallest XS coordinate value.
The direction straight line data are stored in the table 21 in order from the smallest value of YO.

First, among the data in the table 21, the Y-direction straight line data stored in the highest position is stored in the Y-direction straight line register 22.
is stored in The X address changes for a specific Y address. Comparator 23 matches YO and Y address and outputs ENABLE2 Shintan, and comparator 24
When the values of XS and X address match, the AND gate 27 outputs a dot plot instruction signal. At the same time, the comparator 26 compares the value of Yl and the value of YO to determine whether printing of the straight line in the Y direction has been completed. Due to this action, the comparator 26 cannot find a match, and the comparator 2
When a match was found at 4, the adder 25 added (
The value of YO+1> is loaded into the corresponding address of the table 21 instead of YO. Next, when a match is found in the comparator 24, the next Y-direction straight line data is loaded into the Y-direction straight line register 22, regardless of whether the dot plot signal is output or not. At this time, if the XS of the next Y-direction straight line data is the same, that data is skipped and a different xS
Data having a value of is loaded into register 22. This process is executed by managing the value of XS or setting a flag to instruct skipping.

Thereafter, this operation is repeated one after another, but when the Y address changes, loading of the register 22 is started again from the beginning of the daple 21. Note that the table 11 may use FIFO memory, and the table 21 may use Cyflick output memory.

The operation of the above device will be explained below.

At the start of printing, the data at the head of table 11.21 is loaded into register 12.22. As the image is printed out, the address value for accessing the memory 1 changes. When YS matches the Y address that accesses memory 1, the enable signal ENABLE1 is activated.
is occurring, the dot-out instruction signal D6TPLO is generated from the flip 70 block 19 until the X address matches XO and x1, and a straight line in the X direction is drawn. When the drawing is completed, the data in the register 12 is rewritten to the next X-direction straight line data in the table 11.

When the Y address for accessing the memory 1 matches YO and the X address matches XS, a dot plot instruction signal is generated from the AND gate 27, and one dot of a straight line in the Y direction is printed. And the above Y
If the address and the value of Yl do not match, that is,
If printing of the Y-direction straight line has not been completed, YO of the Y-direction straight line is incremented by +1, and the data in the table 21 is rewritten to the value of (YO+1>. As described above, the comparator 24 When a match is found, the next Y-direction straight line data having a different XS value is loaded from the table 21 into the register 22.

The operation continues in the same manner, and when all Y addresses are scanned, printing of characters and ruled lines is completed.

〔Effect of the invention〕

As described above, according to the present invention, since the ruled line generator is used, there is no increase in cost, and in addition, character correction and
It is possible to prevent the ruled lines from being erased when erasing.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a ruled line generator used in an embodiment of the present invention, and FIG. 2 is a block diagram schematically showing the ruled line generating device of the present invention. 1... Memory, 2... Ruled line generation diagram, 3... OR circuit, 4... Printer, 11... X-direction straight line table, 12... X-direction straight line register, 13.14, 15 ．．
23゜24.26... Comparator, 16.17.27.2
8...AND gate, 21...Y direction straight line table, 22...Y direction straight line register, 25...adder.

Claims (1)

[Claims] A memory for storing and generating data related to characters, a ruled line generator for generating data related to ruled lines, and an OR circuit for calculating the logical sum of outputs generated from the memory and the ruled line generator, A ruled line generator supplies output to a display or printing device, and the ruled line generator includes a table that stores the positions of ruled lines in an order according to the order of scanning of the memory, and output data from the table and the output data stored in the memory. and a comparator that controls the display or printing of ruled lines based on the match or mismatch.