JPS6215589A - Display controller - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field 1] The present invention relates to a display control device having a digital interface.

[Prior Art] Systems using monochrome monitors or color monitors include display devices with analog interfaces and display control devices with digital interfaces.

In a display device having a digital interface,
Among the color monitors used for this, there is a problem in that the colors that can be expressed by a color monitor that inputs a plurality of digital signals are very different from natural colors. for example,
A color monitor that receives three digital signals, R, G, and H, can display only eight colors, and there is a problem in that it cannot display natural colors.

[Object of the Invention] The present invention has been made in view of the above-mentioned conventional problems, and provides a display control device that can display colors closer to natural colors in a color monitor that inputs a plurality of digital signals. The first objective is to provide the following.

[Summary of the Invention] The present invention has been made in view of the problems of the prior art described in -1-1, and is capable of displaying natural colors on a color monitor to which a plurality of digital signals are input. Therefore, a plurality of digital video signal converting means are provided in a predetermined area of one display screen to convert predetermined color code information into digital video signals corresponding to frames and display positions.

[Embodiments of the invention] FIG. 1 is a block diagram showing one embodiment of the present invention.

The display control device A includes a CRT controller 10 and a VRA.
M (video RAM) 20, shift register 30,
It has a lookup table 40, a digital video signal control circuit 50, and a display interface 60.

The CRT controller 10 controls the entire display control device A. V RA, M 2.0 is CPU8
Under the control of No. 2, the display data is read out, and the data to be displayed on the display device is read out as necessary.

The shift register 30 receives the data read from the VRAM 70.
This converts the serial display data into serial data.

The lookup table 40 stores color code information, that is, a color code (physical color code) to be actually displayed, in correspondence with display data read from VRAM 2.0, that is, a color code (logical code). It is something that converts.

The digital video signal control circuit 50 is a circuit that outputs digital video and video signals in predetermined areas of 11 display screens based on color code information according to the frame (display screen) and display position device.

The display interface 60 combines the digital video signal and the synchronization signal into a display signal, and sends this to the monitor 70.

Note that the memory 81. The I10 device 83 is the same as that normally used.

FIG. 2 is a block diagram illustrating the first embodiment in more detail.

The VRAM20 has four RAM2'l, 22°23',
The shift register 30 also has four shift registers 31, 32, 33, and 34. These VRAMs 21 to 24 and shift registers 31 to 34 are
Four of them are provided to generate 16 colors. Further, the lookup table 40 is composed of three lookup tables 41, 42, and 43.

The digital video signal control circuit 50 includes a frame counter 51, a line counter 52, a dot counter 53, and three color code/display pattern converters 94, 92, 9.
．． 3.

Based on the vertical synchronization signal, the frame counter 51'
It outputs a 3-bit frame count signal %FC2-0, and this frame count signal is a signal for distinguishing which frame is number 1 among the seven frames. The line counter 52 outputs a 1-bit line count signal LCO based on the horizontal synchronization signal, and this line count signal +41. c o is a signal that distinguishes even line/odd line positions.

The dot counter 53 calculates 1 based on the dot clock.
A dot count signal DCO of bits is output, and this dot count signal DCO is a signal for distinguishing between an even number dot/odd number dot 14Q position.

The color code/display pattern converter 91 converts 4-bit color code information CC3 to CC0 and a frame count signal FC.
2 to 0, line count; - Digital video signal is sent to one bin to form a predetermined display pattern based on the signal LCO and the dot count signal +5nco.
It outputs one by one. The prescribed display pattern is
It is shown in FIG. 3 and will be described later.

The color code/display pattern converters 92 and 93 also include a frame counter 51, a line counter 52) and a dot counter 5.
3 receives a signal similar to that of the color code/display pattern converter 91. However, the color code/display pattern converter 91
, 92.93 are the lookup table 41, respectively.
, 42.43. Further, color code/display pattern converters 91, 92, and 93 output digital video signals for red (R), green (G), and blue (B), respectively.

FIG. 3 shows the operation of the color code/display pattern converter, and is a chart showing an example of code conversion and a table. In other words, it shows the relationship between color code information CC3-0, frame count signals FC2-0, line count signal LCO, dot count signal nCO, and digital video signals output accordingly.

Next, the operation of the -12 embodiment will be explained.

First, it is assumed that the monitor 70 is a color monitor into which three digital signals are input. When displaying on this monitor 70, the CPU 82 writes predetermined display data into each of the VRAMs 21-24. Then, the CRT controller lo transfers the display address to each of the VRAMs 21 to 24, and the display data corresponding to the display address is converted into a serial signal by the shift registers 31 to 34, and is converted to a serial signal by the lookup tables 41 to 43.
It is converted into 4-bit color code information CC3 to CC0.

The color code information CG3 to CG0 is then converted into a display pattern in which one display unit is an area of 2 dots x 2 lines. The display pattern is frame O~
7 of 8 framers - circumference 1ffJ,! = is displayed repeatedly.

Therefore, by changing the ratio of display of frames 0 to 7 to be turned on or off, display of eight gradations can be realized. This will be explained in detail below.

In FIG. 3, repeated parts are omitted. Therefore, it is possible to immediately determine how many frames the display repetition period is.

For example, in the case of color code information l, at an even line position (line count O position) and at an even dot position (dot count O position), while proceeding from frame O to frame 7, the predetermined dot is rooooooool.
Displayed as J. In this case, it is assumed that "1" is white and "0" is black (the reverse is also possible). In the case of No. 2, the white ratio is 178, so it is written as 1/8 in the display pattern column of FIG.

In addition, in the case of the same color code information as described in -h, at an even line position (line count O position) and an odd dot position (dot count 1 position), a predetermined dot is displayed while proceeding from frame O to frame 7. is r00'o1
0000" is displayed. In the case of the same color code information as described in 1;, it is an odd line position (line count l position) and an even dot position (dot count O).
, the predetermined dot is displayed as roooloooooJ while proceeding from frame 0 to frame 7. Furthermore, in the case of the same color code information as above, at an odd line position (line callan 1 position), and at an odd number dot position (dot callan l-, 1 position), while proceeding from frame O to frame 7, a predetermined The dot is r O000000
It is displayed in 1J.

In the case of the color code information l listed in 1-, a gray scale display of 1/8 gradation is obtained.

In addition, as mentioned above, for items with a long repetition period,
Color code information may be 3 or 5.

These also have a period of 8 frames each. Those with a long repetition period are suitable for a display device with a relatively long afterglow time.

In addition, the repetition period of color code information 0.7 to C is
Even if the re-rate changes for one frame, the display at the same dot does not change, and the period is very short. Color code information 4. The repetition period in the case of D-F is two frames, and two display units are repeatedly displayed.

In the case of color code information 4, a so-called checkered pattern is formed.

1] The color code information 0, 4.7 to F have a relatively short repetition period, but these cases are suitable for a display device with a short afterglow time.

In this way, each color code display/pattern converter 91
Since the digital video signals output from the three digital video signals have various gradations, the colors of the screen that can be displayed by these three digital video signals are very close to natural colors.

On the other hand, when displaying halftones, it is sufficient to change the ratio of displaying l and 0 for each frame. In this case, if 1 and O are changed simultaneously for any dot within a 2 dot x 2 line area (4 dot area), the change will be in phase with the display position, so flicker will be noticeable. .

In the above embodiment, the dots are set in opposite phase to the adjacent dot positions, thereby making flicker extremely small. For example, the pattern shown in FIG. 4a and the pattern shown in FIG. 4S are alternately displayed. As a result, a half-brightness display with less flicker can be realized on the display screen -L.

In the above embodiment, the area of 2 dots x 2 lines was explained as one unit, but the area of lXn, mXl, m x n is
It may be displayed as one display area (the above m and n are integers). In order to enlarge the above area, it is necessary to increase the number of bits of the dot count signal and the number of bits of the line count signal input to the color code/display pattern converters 91 to 93.

Also, if the area is made larger, any hatch pattern can be used. However, if the area is set too large, it becomes difficult to distinguish the coloring of small areas.

Furthermore, the number of repeated frames can be made larger than 8,
It may be limited to 4 or less. Furthermore, the pattern arrangement of 1 and O may be different from that of the above embodiment.

The line count signal and dot count signal may be input from the CRT controller IO, or the lookup table may be omitted.

[Effects of the Invention] According to the present invention, it is possible to display natural colors in a color monitor that receives a plurality of digital signals.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention. FIG. 2 is a block diagram showing details of the main parts of the above embodiment. FIG. 3 is a chart showing a code conversion table in the above embodiment. FIG. 4 is a diagram showing an example of a display pattern. 20-24...VRAM, 30-34...Shift register, 41-43...Lookup table, 50...Digital video signal control circuit, 51...Frame counter, 52...Line counter , 53... Dot counter, 91-93... Color code/display pattern converter.

Claims (6)

[Claims] (1) A display control device comprising a plurality of digital video signal converting means for converting predetermined color code information into digital video signals in accordance with frames and display positions in a predetermined area of a display screen. (2) In claim 1, the predetermined area is an area specified by a dot counter and a line counter, and the digital video signal converting means converts the output signal of the dot counter and the line counter into an area specified by a dot counter and a line counter. What is claimed is: 1. A display control device that changes a display pattern for each frame while controlling the display pattern two-dimensionally by inputting an output signal of the frame counter and an output signal of a frame counter. (3) The display control device according to claim 2, wherein the change in the display pattern for each frame cancels the phase of flicker. (4) The display control device according to claim 1, wherein the digital video signal conversion means selects a display pattern corresponding to a display device based on a lookup table. (5) In claim 1, the digital video signal converting means is means for converting color code information into a hatch pattern or a frame control intermediate brightness pattern, each of which has m (m is A display control device characterized in that the pattern is set in units of (integer) dots×n (n is an integer) dots. (6) The display control device according to claim 1, wherein the digital video conversion means is provided with three for red, green, and blue.